The appearance of third-generation semiconductors represented by gallium nitride (GaN) material greatly improves the output power of a power amplifier (PA), but the efficiency of the PA needs to be further improved. The Class-F PA reduces the overlap of drain voltage and current by tuning harmonic impedance so that high efficiency is achieved. This paper begins with the principle of class-F PA, regards the third harmonic voltage as an independent variable, analyzes the influence of the third harmonic on fundamental, and points out how drain efficiency and output power vary with the third harmonic voltage with an I?V knee effect. Finally, the best third harmonic impedance is found mathematically. We compare our results with the Loadpull technique in advanced design system environment and conclude that an optimized third harmonic impedance is open in an ideal case, while it is not at an open point with the I?V knee effect, and the drain efficiency with optimized third harmonic impedance is 4% higher than that with the third harmonic open.
A C-band high efficiency and high gain two-stage power amplifier based on AlGaN/GaN high electron mobility transistor (HEMT) is designed and measured in this paper. The input and output impedances for the optimum power-added efficiency (PAE) are determined at the fundamental and 2nd harmonic frequency ( f0 and 2 f0). The harmonic manipulation networks are designed both in the driver stage and the power stage which manipulate the second harmonic to a very low level within the operating frequency band. Then the inter-stage matching network and the output power combining network are calculated to achieve a low insertion loss. So the PAE and the power gain is greatly improved. In an operation frequency range of 5.4 GHz–5.8 GHz in CW mode, the amplifier delivers a maximum output power of 18.62 W, with a PAE of 55.15%and an associated power gain of 28.7 dB, which is an outstanding performance.
We present a design and realization of a high efficiency C-Band (5.2 GHz–5.8 GHz) internally-matched gallium nitride (GaN) power amplifier (PA). To reduce power dissipation and to achieve high efficiency, both input and output matching networks, along with 2nd-harmonic modulation circuits, are designed accurately according to the source and load optimum impedances extracted by source-pull and load-pull measurements. The PA realizes an excellent rf performance under a pulsed condition, demonstrating a maximum output power of 52.2dBm (164 W) with at least 13.5dB gain in the frequency range from 5.2 GHz to 5.8 GHz (10% relative bandwidth). At the same time, a power-added efficiency (PAE) of 69.4% is observed at 5.6 GHz and over 65.0% throughout the whole bandwidth. The PAE is the state-of-art performance for C-band GaN high-electron-mobility transistor PA with such high output power, to the best of our knowledge.
Temperature-dependent surface current measurements were performed to analyze the mechanism of surface conductance of AlGaN/GaN channel high-electron-mobility transistors by utilizing process-optimized double gate structures. Different temperatures and electric field dependence have been found in surface current measurements. At low electric field, the mechanism of surface conductance is considered to be two-dimensional variable range hopping. At elevated electric field, the Frenkel–Poole trap assisted emission governs the main surface electrons transportation. The extracted energy barrier height of electrons emitting from trapped state near Fermi energy level into a threading dislocations-related continuum state is 0.38 eV. SiN passivation reduces the surface leakage current by two order of magnitude and nearly 4 orders of magnitude at low and high electric fields, respectively. SiN also suppresses the Frenkel–Poole conductance at high temperature by improving the surface states of AlGaN/GaN. A surface treatment process has been introduced to further suppress the surface leakage current at high temperature and high field, which results in a decrease in surface current of almost 3 orders of magnitude at 476 K.
A high-efficiency C-band internally matched power amplifier, developed with 12 mm AlGaN/GaN high-electron mobility transistors is described. The second-harmonic frequency (2f 0) tuning network is applied to confine the impedance at 2f 0 in safe efficiency regions. The packaged power amplifier achieves 71% power-added efficiency (PAE) and 102 W output power, associated with 17 dB power gain. The PAE is believed to be the highest of the C-band GaN power amplifiers reported to date.
A new reflection-type wideband 360° monolithic-microwave integrated-circuit(MMIC) analog phase shifter at the Ka-band is proposed. The phase shifter is designed based on the principle of vector synthesis. Three Lange couplers are employed in the phase shifter, which is fabricated by the standard 0.25- m Ga As process. We use four 4 40 m Ga As HEMTs as the reflection loads. A microstrip line in parallel with the device is used as an inductance to counteract the parasitic capacitance of the device so that the reflection load performs like a pure resistance and the insertion loss can be decreased. In this phase shifter, a folded Lange coupler is utilized to reduce the size of the chip. The size of the proposed MMIC phase shifter is only 2.0 1.2 mm2. The measurement results show that the insertion loss is 5.0˙0.8 d B and a 360° continuously tunable range across 27–32 GHz is obtained with miniscule DC power consumption.
In this paper, we present a high-efficiency S-band gallium nitride (GaN) power amplifier (PA). This amplifier is fabricated based on a self-developed GaN high-electron-mobility transistor (HEMT) with 10 mm gate width on SiC substrate. Harmonic manipulation circuits are presented in the amplifier. The matching networks consist of microstrip lines and discrete components. Open-circuited stub lines in both input and output are used to tune the 2nd harmonic wave and match the GaN HEMT to the highest efficiency condition. The developed amplifier delivers an output power of 48.5 dBm (∼70 W) with a power-added efficiency (PAE) of 72.2% at 2 GHz in pulse condition. When operating at 1.8–2.2 GHz (20% relative bandwidth), the amplifier provides an output power higher than 48 dBm (∼ 65 W), with a PAE over 70% and a power gain above 15 dB. When operating in continuous-wave (CW) operating conditions, the amplifier gives an output power over 46 dBm (40 W) with PAE beyond 60% over the whole operation frequency range.
In this paper, a new current expression based on both the direct currect (DC) characteristics of the AlGaN/GaN high election mobility transistor (HEMT) and the hyperbolic tangent function tanh is proposed, by which we can describe the kink effect of the AlGaN/GaN HEMT well. Then, an improved EEHEMT model including the proposed current expression is presented. The simulated and measured results of I–V, S-parameter, and radio frequency (RF) large-signal characteristics are compared for a self-developed on-wafer AlGaN/GaN HEMT with ten gate fingers each being 0.4-μm long and 125-μm wide (Such an AlGaN/GaN HEMT is denoted as AlGaN/GaN HEMT (10 × 125 μm)). The improved large signal model simulates the I–V characteristic much more accurately than the original one, and its transconductance and RF characteristics are also in excellent agreement with the measured data.
A novel source-connected field plate structure, featuring the same photolithography mask as the gate electrode, is proposed as an improvement over the conventional field plate (FP) techniques to enhance the frequency performance in GaN-based HEMTs. The influences of the field plate on frequency and breakdown performance are investigated simultaneously by using a two-dimensional physics-based simulation. Compared with the conventional T-gate structures with a field plate length of 1.2 μm, this field plate structure can induce the small signal power gain at 10 GHz to increase by 5-9.5 dB, which depends on the distance between source FP and dramatically shortened gate FP. This technique minimizes the parasitic capacitances, especially the gate-to-drain capacitance, showing a substantial potential for millimeter-wave, high power applications.
A GaN-based enhancement-mode high electron mobility transistor (HEMT) with a 1.5 nm GaN/9 nm Al 0.65 Ga 0.35 N thin barrier was reported. Without any treatment on barrier layer under the gate, the as-grown HEMTs exhibited a threshold voltage of 0.3 V, a maximum drain current density of 441 mA/mm at V GS = 3 V and a peak extrinsic transconductance of 204 mS/mm at V GS = 1.1 V. At the same time, both a low Schottky leakage current and an insignificant surface defects induced current dispersion were observed. Moreover, drain induction barrier lower (DIBL) effect was determined to be merely 3.28 mV/V at 1 mA/mm for a gate length of 0.5 µm. Additionally, post-gate annealing experiment at step temperatures up to 450 °C was implemented, only causing a minor shift in threshold voltage. These results demonstrated the substantial potential of thin and high Al composition barrier layers for high-voltage and highly reliable enhancement mode operation.
Self-heating in multi-finger AlGaN/GaN high-electron-mobility transistors(HEMTs) is investigated by measurements and modeling of device junction temperature under steady-state operation.Measurements are carried out using micro-Raman scattering to obtain the detailed and accurate temperature distribution of the device.The device peak temperature corresponds to the high field region at the drain side of gate edge.The channel temperature of the device is modeled using a combined electro-thermal model considering 2DEG transport characteristics and the Joule heating power distribution.The results reveal excellent correlation to the micro-Raman measurements, validating our model for the design of better cooled structures.Furthermore,the influence of layout design on the channel temperature of multi-finger AlGaN/GaN HEMTs is studied using the proposed electro-thermal model, allowing for device optimization.
V-gate GaN high-electron-mobility transistors (HEMTs) are fabricated and investigated systematically. A V-shaped recess geometry is obtained using an improved Si3N4 recess etching technology. Compared with standard HEMTs, the fabricated V-gate HEMTs exhibit a 17% higher peak extrinsic transconductance due to a narrowed gate foot. Moreover, both the gate leakage and current dispersion are dramatically suppressed simultaneously, although a slight degradation of frequency response is observed. Based on a two-dimensional electric field simulation using Silvaco ATLAS for both standard HEMTs and V-gate HEMTs, the relaxation in peak electric field at the gate edge is identified as the predominant factor leading to the superior performance of V-gate HEMTs.
We present a detailed analysis of trap states in InAlN/AlN/GaN double-channel high electron mobility transistors grown by pulsed metal organic chemical vapor deposition. By frequency dependent conductance measurements, trap densities and time constants at both InAlN/AlN/GaN interfaces were determined. Two types of traps, with a high density of up to ∼1014 cm−2 eV−1, were observed existing at the higher InAlN/AlN/GaN interface. On the other hand, the density dramatically decreased to ∼1012 cm−2 eV−1 for traps located at lower InAlN/AlN/GaN interface on which a low-temperature grown GaN (LT-GaN) layer was deposited. Additionally, photo-assisted capacitance-voltage measurements were performed to estimate deep-level defects, yielding a low density of 1.79 × 1011 cm−2 acting as negative fixed charges at the LT-GaN and lower InAlN interface.
Kink effect is analyzed in AlGaN/GaN devices primarily. A semiempirical model is given by analyzing the kink effect on AlGaN/GaN high electron mobility transistor and by considering the relationship between Vds,kink and gate voltage. Due to a little error between simulation results and measured data, this model can be used to identify the occurrence of kink effect and change in drain current. The analyses of experimental results and model simulation lead to a conclusion that impact ionization plays an important role in generating kink effect.