A GaN-based E/D mode direct-couple logic 6 transistors SRAM unit and a voltage level shifter were designed and fabricated. E-mode and D-mode AlGaN/GaN HEMTs were integrated in one wafer using fluorine plasma treatment and using a moderate AlGaN barrier layer heterojunction structure. The 6 transistors SRAM unit consists of two symmetrical E/D mode inverters and two E-mode switch HEMTs. The output low and high voltage of the SRAM unit are 0.95 and 0.07 V at a voltage supply of 1 V. The voltage level shifter lowers the supply voltage using four Ni-AlGaN Schottky diodes in a series at a positive supply voltage of 6 V and a negative supply voltage of -6 V. By controlling the states of inverter modules of the level shifter in turn, the level shifter offers two channel voltage outputs of -0.5 and -5 V. The flip voltage of the level shifter is 0.76 V. Both the SRAM unit and voltage shifter operate correctly, demonstrating the promising potential for GaN-based E/D mode digital and analog integrated circuits. Several considerations are proposed to avoid the influence of threshold voltage degradation of D-mode and E-mode HEMT on the operation of the circuit.

The transport mechanism of reverse surface leakage current in the AlGaN/GaN high-electron mobility transistor（HEMT） becomes one of the most important reliability issues with the downscaling of feature size.In this paper,the research results show that the reverse surface leakage current in AlGaN/GaN HEMT with SiN passivation increases with the enhancement of temperature in the range from 298 K to 423 K.Three possible transport mechanisms are proposed and examined to explain the generation of reverse surface leakage current.By comparing the experimental data with the numerical transport models,it is found that neither Fowler-Nordheim tunneling nor Frenkel-Poole emission can describe the transport of reverse surface leakage current.However,good agreement is found between the experimental data and the two-dimensional variable range hopping（2D-VRH） model.Therefore,it is concluded that the reverse surface leakage current is dominated by the electron hopping through the surface states at the barrier layer.Moreover,the activation energy of surface leakage current is extracted,which is around 0.083 eV.Finally,the SiN passivated HEMT with a high Al composition and a thin AlGaN barrier layer is also studied.It is observed that 2D-VRH still dominates the reverse surface leakage current and the activation energy is around 0.10 eV,which demonstrates that the alteration of the AlGaN barrier layer does not affect the transport mechanism of reverse surface leakage current in this paper.

We report normally off AlGaN/GaN high‐electron mobility transistors realized by using the thin and high Al composition barrier design in conjunction with O 2 plasma implantation. The AlGaN barrier layer under the gate is selectively treated by low‐energy O 2 plasma in order to positively shift the threshold voltage of devices. The obtained enhancement‐mode HEMT exhibits a threshold voltage ( V TH ) of +1 V, a high peak transconductance of ∼230 mS mm −1 , and a maximum drain current of 424 mA mm −1 at a gate bias of 3 V for a gate length of 0.6 µm. A suppressed gate reverse leakage current and a high breakdown voltage of 450 V are achieved. Moreover, gradually partial oxidation of AlGaN barrier layer is determined to be responsible for the plasma‐induced V TH modulation effect through a systematic investigation. The results indicate O 2 plasma implantation can be a promising method for fabrication of enhancement‐mode GaN‐based devices.

The parameters of open-gate structures treated with different etching time were monitored during the gate recess process, and their impacts on the threshold voltage (Vth) of final fabricated AlGaN/GaN high electron mobility transistors (HEMTs) based on open-gate structures were discussed in this paper. It is found that Vth can exceed 0 V when channel resistance in the recessed region (Ron-open) increases over ∼275 Ω mm, maximum current (IDmax) decreases below ∼29 mA/mm, or recessed barrier thickness (tRB) is below ∼7.5 nm. In addition, tRB obtained by atomic force microscopy measurements and C-V measurements are also compared. Finally, theoretical common criteria based on the experimental results of this work for tRB and Ron-open were established to evaluate the Vth of a regular normally-off AlGaN/GaN HEMTs. The results indicate that these parameters of open-gate structure can be utilized to achieve normally-off HEMTs with controllable Vth.

By comparing the Schottky diodes of different area and perimeter, reverse gate leakage current of AlGaN/GaN high mobility transistors (HEMT) at gate bias beyond threshold voltage is studied. It is revealed that reverse current consists of area-related and perimeter-related current. An analytical model of electric field calculation is proposed to obtain the average electric field around the gate edge at high revers bias and estimate the effective range of edge leakage current. When the reverse bias increases, the increment of electric field is around the gate edge of a distance of ΔL, and perimeter-related gate edge current keeps increasing. By using the calculated electric field and the temperature-dependent current-voltage measurements, the edge gate leakage current mechanism is found to be Fowler-Nordheim tunneling at gate bias bellows -15V caused by the lateral extended depletion region induced barrier thinning. Effective range of edge current of Schottky diodes is about hundred to several hundred nano-meters, and is different in different shapes of Schottky diodes.

Temperature-dependent surface current measurements were performed to analyze the mechanism of surface conductance of AlGaN/GaN channel high-electron-mobility transistors by utilizing process-optimized double gate structures. Different temperatures and electric field dependence have been found in surface current measurements. At low electric field, the mechanism of surface conductance is considered to be two-dimensional variable range hopping. At elevated electric field, the Frenkel–Poole trap assisted emission governs the main surface electrons transportation. The extracted energy barrier height of electrons emitting from trapped state near Fermi energy level into a threading dislocations-related continuum state is 0.38 eV. SiN passivation reduces the surface leakage current by two order of magnitude and nearly 4 orders of magnitude at low and high electric fields, respectively. SiN also suppresses the Frenkel–Poole conductance at high temperature by improving the surface states of AlGaN/GaN. A surface treatment process has been introduced to further suppress the surface leakage current at high temperature and high field, which results in a decrease in surface current of almost 3 orders of magnitude at 476 K.

Impacts of SiN passivation on the degradation modes of AlGaN/GaN high electron mobility transistors are investigated. The gate leakage current decreases significantly upon removing the SiN layer and no clear critical voltage for the sudden degradation of the gate leakage current can be observed in the reverse-bias step-stress experiments. Gate-lag measurements reveal the decrease of the fast-state surface traps and the increase of slow-state traps after the passivation layer removal. It is postulated that consistent surface charging relieves the electric field peak on the gate edge, thus the inverse piezoelectric effect is shielded.

In this paper, we present a two-dimensional (2D) fully analytical model with consideration of polarization effect for the channel potential and electric field distributions of the gate field-plated high electron mobility transistor (FP-HEMT) on the basis of 2D Poisson's solution. The dependences of the channel potential and electric field distributions on drain bias, polarization charge density, FP structure parameters, AlGaN/GaN material parameters, etc. are investigated. A simple and convenient approach to designing high breakdown voltage FP-HEMTs is also proposed. The validity of this model is demonstrated by comparison with the numerical simulations with Silvaco—Atlas. The method in this paper can be extended to the development of other analytical models for different device structures, such as MIS-HEMTs, multiple-FP HETMs, slant-FP HEMTs, etc.

In this paper, we present a high-efficiency S-band gallium nitride (GaN) power amplifier (PA). This amplifier is fabricated based on a self-developed GaN high-electron-mobility transistor (HEMT) with 10 mm gate width on SiC substrate. Harmonic manipulation circuits are presented in the amplifier. The matching networks consist of microstrip lines and discrete components. Open-circuited stub lines in both input and output are used to tune the 2nd harmonic wave and match the GaN HEMT to the highest efficiency condition. The developed amplifier delivers an output power of 48.5 dBm (∼70 W) with a power-added efficiency (PAE) of 72.2% at 2 GHz in pulse condition. When operating at 1.8–2.2 GHz (20% relative bandwidth), the amplifier provides an output power higher than 48 dBm (∼ 65 W), with a PAE over 70% and a power gain above 15 dB. When operating in continuous-wave (CW) operating conditions, the amplifier gives an output power over 46 dBm (40 W) with PAE beyond 60% over the whole operation frequency range.

In this paper, a new current expression based on both the direct currect (DC) characteristics of the AlGaN/GaN high election mobility transistor (HEMT) and the hyperbolic tangent function tanh is proposed, by which we can describe the kink effect of the AlGaN/GaN HEMT well. Then, an improved EEHEMT model including the proposed current expression is presented. The simulated and measured results of I–V, S-parameter, and radio frequency (RF) large-signal characteristics are compared for a self-developed on-wafer AlGaN/GaN HEMT with ten gate fingers each being 0.4-μm long and 125-μm wide (Such an AlGaN/GaN HEMT is denoted as AlGaN/GaN HEMT (10 × 125 μm)). The improved large signal model simulates the I–V characteristic much more accurately than the original one, and its transconductance and RF characteristics are also in excellent agreement with the measured data.

Frequency dependent capacitance and conductance measurements were performed to analyze the trap states in the AlGaN channel high-electron-mobility transistors (HEMTs). The trap state density in the AlGaN channel HEMTs decreases from 1.26 × 1013 cm−2eV−1 at the energy of 0.33 eV to 4.35 × 1011 cm−2eV−1 at 0.40 eV. Compared with GaN channel HEMTs, the trap states in the AlGaN channel HEMTs have deeper energy levels. The trap with deeper energy levels in the AlGaN channel HEMTs is another reason for the reduction of the reverse gate leakage current besides the higher Schottky barrier height.

A GaN-based enhancement-mode high electron mobility transistor (HEMT) with a 1.5 nm GaN/9 nm Al 0.65 Ga 0.35 N thin barrier was reported. Without any treatment on barrier layer under the gate, the as-grown HEMTs exhibited a threshold voltage of 0.3 V, a maximum drain current density of 441 mA/mm at V GS = 3 V and a peak extrinsic transconductance of 204 mS/mm at V GS = 1.1 V. At the same time, both a low Schottky leakage current and an insignificant surface defects induced current dispersion were observed. Moreover, drain induction barrier lower (DIBL) effect was determined to be merely 3.28 mV/V at 1 mA/mm for a gate length of 0.5 µm. Additionally, post-gate annealing experiment at step temperatures up to 450 °C was implemented, only causing a minor shift in threshold voltage. These results demonstrated the substantial potential of thin and high Al composition barrier layers for high-voltage and highly reliable enhancement mode operation.

We report the studies of In0.15Al0.85N/AlN/GaN metal-insulator-semiconductor (MIS) high electron mobility transistors with a field plate (FP) and a plasma-enhanced chemical vapor deposition (PECVD) SiN layer as the gate dielectric as well as the surface passivation layer (FP-MIS HEMTs). Compared with conventional In0.15Al0.85N/AlN/GaN high electron mobility transistors (HEMTs) of the same dimensions, the FP-MIS HEMTs exhibit a maximum drain current of 1211 mA/mm, a breakdown voltage of 120V, an effective suppression of current collapse, about one order of magnitude reduction in reverse gate leakage, as well as more than five orders of magnitude reduction in forward gate leakage. These results confirm the potential of PECVD SiN in the application of the InAlN/AlN/GaN FP-MIS HEMTs.

Self-heating in multi-finger AlGaN/GaN high-electron-mobility transistors(HEMTs) is investigated by measurements and modeling of device junction temperature under steady-state operation.Measurements are carried out using micro-Raman scattering to obtain the detailed and accurate temperature distribution of the device.The device peak temperature corresponds to the high field region at the drain side of gate edge.The channel temperature of the device is modeled using a combined electro-thermal model considering 2DEG transport characteristics and the Joule heating power distribution.The results reveal excellent correlation to the micro-Raman measurements, validating our model for the design of better cooled structures.Furthermore,the influence of layout design on the channel temperature of multi-finger AlGaN/GaN HEMTs is studied using the proposed electro-thermal model, allowing for device optimization.

V-gate GaN high-electron-mobility transistors (HEMTs) are fabricated and investigated systematically. A V-shaped recess geometry is obtained using an improved Si3N4 recess etching technology. Compared with standard HEMTs, the fabricated V-gate HEMTs exhibit a 17% higher peak extrinsic transconductance due to a narrowed gate foot. Moreover, both the gate leakage and current dispersion are dramatically suppressed simultaneously, although a slight degradation of frequency response is observed. Based on a two-dimensional electric field simulation using Silvaco ATLAS for both standard HEMTs and V-gate HEMTs, the relaxation in peak electric field at the gate edge is identified as the predominant factor leading to the superior performance of V-gate HEMTs.

We present a detailed analysis of trap states in InAlN/AlN/GaN double-channel high electron mobility transistors grown by pulsed metal organic chemical vapor deposition. By frequency dependent conductance measurements, trap densities and time constants at both InAlN/AlN/GaN interfaces were determined. Two types of traps, with a high density of up to ∼1014 cm−2 eV−1, were observed existing at the higher InAlN/AlN/GaN interface. On the other hand, the density dramatically decreased to ∼1012 cm−2 eV−1 for traps located at lower InAlN/AlN/GaN interface on which a low-temperature grown GaN (LT-GaN) layer was deposited. Additionally, photo-assisted capacitance-voltage measurements were performed to estimate deep-level defects, yielding a low density of 1.79 × 1011 cm−2 acting as negative fixed charges at the LT-GaN and lower InAlN interface.