Academic social networks are platforms formed by scholars and their social relationships. Compared with general-purpose social networks, academic social networks exhibit more complex structural patterns and user behaviors, while retaining distinct academic characteristics. Understanding such networks is essential for fostering scholarly communication and collaboration. In this paper, we conduct a multi-dimensional analysis of SCHOLAT, a representative academic social network in China, focusing on four aspects: network topology, user connectivity, academic output, and information dissemination. Our findings show that the SCHOLAT network exhibits both small-world and scale-free properties, along with a prominent rich-club structure. Although cross-community links are relatively sparse, they play a key role in information diffusion. We also identify a positive correlation between users’ interest diversity and their cross-community connectivity. Finally, we observe two distinct dissemination dynamics: individual users tend to generate sustained and broad-reaching content, whereas team and institutional accounts facilitate rapid but short-lived propagation. These findings offer new insights into the structure and function of academic social platforms.

Session-based recommendation has demonstrated notable advantages, since it dynamically adjusts recommendations based on user’s behavior and context within the current session. Recently, researchers have extensively investigated the integration of knowledge graphs (KGs) into recommendation systems, with Graph Neural Network (GNN) achieving impressive results in deeply exploring and learning the relationships between users. However, despite these encouraging results, previous studies have overlooked the semantic information of items within sessions and the contextual environment outside sessions, making it challenging to mine the complex associations between items. Simultaneously, traditional algorithms encounter issues with high computational costs and excessive memory usage. To address the above challenges, in this paper, we propose a KG-enhanced session-based recommendation with two-stage feature filtering, named KGFF-SR. We introduce KG as an external knowledge base and utilize the link information between entities in the graph to enrich the session graph. Furthermore, we propose a two-stage item feature filtering mechanism to capture potential relationships between users and items while reducing computational and storage costs effectively. We conduct extensive experiments on three real-world public sub-datasets, and the results show that our proposed method significantly outperforms powerful baseline models in performance.

The task of Programming Knowledge Tracing (PKT) is to predict student next programming performance using their history interactions with questions. Though rich features have been utilized in PKT such as code text, most existing methods only consider temporal features in student answer sequences. However, actual student programming process are more complex. In this work, we propose Interactive Programming Knowledge Tracing (IPKT), which uses an Interactive Memory Network (IMN) combined with Adversarial Training (AT) to simulate the learning process of reviewing question. Firstly, we design the IMN which learns the relation between knowledge state with answer information as the PKT backbone. Meanwhile, we predict the performance of the next question by fully connected network and use AT to enhance model's generalization of the question recognition. Extensive experiments are conducted on two real-world datasets and the experimental results demonstrate the effectiveness of our proposed model.

Retrieval-Augmented Generation (RAG) systems effectively leverage external knowledge to deliver accurate, domainspecific responses. This process typically involves retrieving relevant context from documents that are segmented into chunks, embedded, and stored in vector databases. While this architecture supports dynamic knowledge updates, a critical limitation arises from the lack of fine-grained control over these update operations. Consequently, modifying knowledge often necessitates reprocessing entire documents or large segments, leading to substantial computational overhead and latency, particularly when updates are frequent and involve only minor textual changes. To address this challenge, we propose euRAG, a system engineered for the efficient, real-time detection and updating of partial knowledge modifications. euRAG introduces two core techniques: a Specialized Wrapped Knowledge Base File and a Parallel I/O Pipeline at Chunk-Level Granularity. The specialized file structure meticulously records chunk boundaries and associated metadata, enabling the precise identification and immediate synchronization of modified knowledge chunks. Furthermore, euRAG optimizes update throughput by effectively overlapping I/O operations with CPU computations, thereby minimizing processing bottlenecks. Experimental evaluations demonstrate that euRAG accelerates partial knowledge updates by a factor of $\mathbf{1. 2} \times$ to $\mathbf{1. 6} \times$ compared to prominent frameworks such as LangChain and LlamaIndex, across three vector databases.

Graph data is becoming dynamic and large-scale, demanding high-performance and large-capacity graph storage. Therefore, due to the performance approaching DRAM and the larger capacity than DRAM, persistent memory (PM) has been adopted in large-scale dynamic graph storage systems. However, existing PM-based dynamic graph storage systems have issues, especially PM write amplification caused by the unsorted data structure used to store edges. To improve this issue, we propose a PM-based dynamic graph storage system, HDGraph, using sorted data structure to store edges on DRAM-PM hybrid memory architecture. To better adapt the sorted data structure on PM, HDGraph employs edge buffering on DRAM, merging small writes to reduce write amplification in PM. Moreover, HDGraph also triggers buffer flushing based on a heat evaluating strategy to alleviate DRAM space pressure. Finally, HDGraph maintains a buffering log in PM for edge-level data consistency, enabling quick recovery after a crash. Experimental results show that HDGraph achieves 1.09× to 1.52× higher edge ingestion performance, compared with the only PM-based dynamic graph storage system XPGraph, which use unsorted data structure to store edges.

Due to its higher storage density and lower energy consumption compared to DRAM, persistent memory (PM) holds the potential to address the growing memory demands of applications, such as Deep Neural Network (DNN) training. However, PM also suffers from longer latency and lower bandwidth, making it impractical to completely replace DRAM. The hybrid memory architecture, which combines DRAM and PM, is expected to improve this issue. Nevertheless, it also introduces a challenging problem: the state-of-the-art page placement mechanism designed for DRAM-only systems with NUMA ignores the performance disparities between DRAM and PM, resulting in sub-optimal performance. To improve this problem, we propose PM-Migration, a page placement mechanism tailored for real-time systems with hybrid memory architecture. PM-Migration prioritizes placing frequently accessed pages in DRAM and increases the access frequency of write-intensive pages to leverage the read-write asymmetry of Intel Optane DC persistent memory module (DCPMM), a commercially available PM hardware. It also incorporates a transmission handover strategy to select the transfer engine according to the size of the page and then utilizes DMA technology for migrating pages of size 2 MB. Experimental results demonstrate that PM-Migration provides an average throughput improvement of 1.31 × to 3.6 × compared to existing mechanisms proposed for the hybrid memory architecture.

The training process of large language models (LLMs) sometimes may raise an error, often necessitating the usage of checkpointing mechanisms to save training states periodically. However, this can lead to a waste of training time and impact performance due to frequent I/O operations. Intel Optane Data Center Persistent Memory Module (DCPMM) is a novel memory device that combines non-volatility, high bandwidth, and low latency. Intuitively, deploying LLMs on DCPMM could enhance I/O performance, but the DCPMM cannot fully adapt to the current deep learning frameworks and the read/write granularity mismatch of DCPMM needs to be resolved. To this end, we propose PMCKPT, a checkpointing scheme customized for hybrid memory architectures (DRAM-PM). PMCKPT provides a storage engine to mitigate the impact of frequent I/O operations on training. Furthermore, PMCKPT ensures data persistence and consistency through a persistence scheme based on the persistent memory development kit (PMDK). Finally, it also incorporates a checkpointing management strategy to handle historical version checkpointing and optimize storage management. We implement PMCKPT in ChatGLM and the experimental results demonstrate that PMCKPT can effectively reduce training time by about 34% compared to traditional schemes which use SSDs.

In the 6G era, the service demand for extreme performance of artificial intelligence (AI) applications poses a huge performance challenge for edge computing servers. The introduction of non-volatile memory (NVM) can effectively improve the storage performance and unleash the computing power of edge servers. However, most NVM technologies have intrinsic weaknesses such as asymmetric performance in reading and writing. As a result, if the server follows the traditional data-update mechanism, such as copy-on-write (CoW), the write latency may be amplified and thus the performance of AI applications may be impaired. To improve this issue, we propose a novel data-update mechanism on NVM without any consistency losses, called PostMerge. It stores the data increments directly into a new NVM space and then merges them into the target blocks later. A low-overhead metadata-management policy is also introduced for maintaining the read performance. We implement the PostMerge mechanism on PMFS, a well-known NVM file system. The experimental results show that PostMerge adds only a slight software overhead and has an obvious advantage over CoW in write-intensive tasks. When writing large data blocks, PostMerge achieves an improvement 1.7 times greater than that of the write bandwidth of the original CoW.

In traditional CPU scheduling systems, it is challenging to customize scheduling policies for datacenter workloads. Therefore, distributed cluster managers can only perform coarse-grained job scheduling rather than fine-grained CPU scheduling, although the latter is also critical to application performance in the clusters. Some scheduling systems have been proposed to facilitate the implementation and deployment of custom policies. However, these systems neither adequately capture the resource requirements of workloads nor cooperatively manage the CPU scheduling of distributed nodes, thus may failing to fully utilize CPU resources in the clusters. To tackle these issues, we present ADSwitch, a distributed CPU scheduling system that manages CPU resources adaptively in datacenter clusters. We train an efficient workload classification model based on a recurrent neural network (RNN), which enables ADSwitch to dynamically identify the demand of the running workload and switch to an appropriate scheduling policy through a reliable online update mechanism. We implement ADSwitch and evaluate it in a distributed cluster with synthetic workloads. The experimental results demonstrate that ADSwitch achieves up to 33% lower tail latency and 28% higher throughput than the existing scheduling systems without workload characteristic awareness.

Compared to traditional relational databases (RDBMS), specialized graph databases (GDBs) can efficiently store and process graph data in both time and space. Hence, domains like social networks often use GDBs for data management, such as representing friendships. Optane DC Persistent Memory Module (DCPMM) is a novel memory device combining byte-addressability, non-volatility, high density and superior performance. Intuitively, applying GDB on DCPMM with the Non-Uniform Memory Access (NUMA) architecture may improve I/O performance, yet the real performance may be unstable due to stacked hardware characteristics. Specifically, DCPMM exhibits serious NUMA effects and unexpected read/write asymmetry compared to DRAM. To tackle these issues, we propose a NUMA-aware graph database called NAPGDB. NAPGDB employs delegated thread pools to improve the latency of accessing remote nodes. Additionally, it categorizes read/write requests into short-running and long-running tasks, with the former being served synchronously instead of using delegated threads to improve CPU utilization. We implement NAPGDB and the experimental results show that NAPGDB can improve the remote throughput by 1.3x-1.7x compared with the multithreaded Redis with RedisGraph.

Due to the expected near DRAM performance, popular async I/O systems are disabled on local persistent memory (PM) file systems, which instead use the pseudo-async I/O path (namely the sync one), to serve async I/O (AIO) requests of applications. This paper first identifies the performance shortcomings of this kind of I/O method and argues the necessity of applying the real async I/O on PM device. Then, this paper proposes PM-AIO, a general method to create an effective async I/O path on PM file systems. PM-AIO leverages kernel-level threads to achieve real asynchronism and concurrency. We implement PM-AIO in the Native-AIO of PMFS and NOVA respectively. Extensive experiments are conducted to verify the advantages of PM-AIO on a real PM platform. Compared with the original I/O methods of PM file systems, the results show that PM-AIO can reduce the latencies of AIO requests up to 3 orders of magnitude while reaping up to 2.11× IOPS in realistic workloads which contain relatively large I/O operations (often $\geq$ 4 KB). Meanwhile, PM-AIO incurs up to 4% overhead when handling small I/O operations (often $<$ 4 KB) because of the inherent overhead.

Deploying user data or programs in cloud risks divulging their privacy because the cloud‐side supervisors, such as system administrators, can leverage the higher privilege to snoop the user data. Based on the trusted execution environment (TEE) technology, Intel Software Guard eXtension (SGX) is a practical remedy to user privacy, which employs hardware‐assisted enclave to wrap the sensitive data, preventing them from the disclosure. However, the application performance is hurt due to the CPU‐expensive and frequent operations on the enclave creation and destruction. In this paper, we propose SGXPool, an application‐level framework of resource management to relieve the above issue. SGXPool first uses a preallocated resource pool to assign/revoke the enclave on demand and avoids its cost of dynamical creation and destruction. Then, SGXPool utilizes another resource pool to constrain the threading overhead such as thread initialization, scheduling, and destruction. In addition, SGXPool exposes the simple and clear interface, allowing users or programmers to apply SGXPool without any intrusive modifications on the original SGX application. We implement SGXPool in the typical web servers which use the multithreading to handle the concurrent user requests. The evaluation results show that SGXPool can improve the performance of the original multithreading system up to 19 times. Meanwhile, the original security of SGX is maintained.

Typical applications of smart cities, such as smart public services, require a large memory footprint to store user data and facilitate the responsive results of user queries, thus inevitably activating the memory swap mechanism between memory and storage to expand the capacity of main memory. Frequent page swapping can cause performance interference for hard real-time operating systems such as SylixOS. In a hybrid memory architecture, namely the novel persistent memory (PM) alongside the conventional DRAM, the swap mechanism often uses the PM to act as the swap partition and executes memory copying to transfer the data between DRAM and PM, resulting in frequent I/O operations and high CPU consumption. Eventually, the memory performance is sub-optimal. By leveraging a general DMA technology of memory-to-memory (M2M), namely Intel I/OAT, we propose PM-Swap, a swap mechanism without heavy CPU consumption. PM-Swap further contains three techniques: (1) a new memory reclamation algorithm based on instruction sampling and page awareness, which reduces the unnecessary swap operations; (2) according to the data size, a switching strat-egy selects the suitable swapping path between the original CPU and the DMA, to maintain reasonable memory performance; (3) bulk transferring is employed for improving the overall throughput of the page swapping. We implement PM-Swap in a stable Linux kernel (5.17.9). The experimental results show that PM-Swap can decrease CPU overhead by more than 39% and increase page swapping bandwidth by up to $1.76\times$.

To bridge the performance gap between network and storage, performance tuning of file systems according to different workloads has become an important work on the Internet of Things (IoT). However, existing methods on file system tuning mainly focused on tailoring the file system kernel codes, or cannot scope to high dimensional parameters and dynamically changing workloads. In this paper, we propose an automatic I/O performance tuning system FSbrain that recommends reasonable and performance-efficient configurations for file systems by using machine learning. It makes the configuration recommendations based on current workloads within an acceptable time, however, without any manual interventions or kernel code modifications. In specific, FSbrain mainly consists of two phases which are model training and configuration tuning. Since tuning attempts will cause frequent remounting on target file systems, we deploy FSbrain and conduct the tuning sessions on an experimental node called “shadow server”. We evaluate FSbrain on three representative file systems (namely, Ext4, F2FS, and PMFS). The experimental results show that the configuration recommended by FSbrain can improve the I/O performance by up to 1.28× averagely than the default configuration. Besides, FSbrain reduces the overall tuning time by 90% compared to manual tuning.

Key-value (KV) store, which regards data as key-value pairs, has been widely deployed in the cloud while demanding highly responsive query operations. A novel persistent memory device, Intel Optane DC Persistent Memory Module (DCPMM), provides the opportunity for boosting the performance. In this paper, we propose a KV store based on LSM tree, called PMDB, which is tailor-made for a hybrid memory architecture, namely the traditional DRAM device alongside the DCPMM. PMDB stores data on DCPMM for persistence and establishes an auxiliary index in the DRAM for improving the read performance. To improve write amplification which is caused by the physical characteristic of DCPMM, PMDB performs both the operations of flush and compaction at a performance-friendly granularity (256Bytes). In addition, by using the local thread of the CPU node, PMDB is able to improve the NUMA latency of DCPMM effectively. We implement PMDB in a realistic DCPMM environment. The experimental results show that, compared to the state-of-art LSM-based KV stores, PMDB improves the throughput of random read by up to 2.72×.

Non-volatile memory, also called persistent memory (PM), has the features of byte addressing, non-volatility and the similar performance with traditional DRAM, but still shows obvious latency in several common scenarios which adopt the synchronous (sync) I/O, such as the application transferring large PM data or accessing the remote PM data in a NUMA architecture. These problems motivate the asynchronous (async) I/O of a PM file system. In this paper, we first investigate the efficiency of the combination of PM and IO_uring, which is a novel and highly-efficient async I/O system proposed recently. We find IO_uring on PM still incurs a serial of performance issues: (1) pseudo-async I/O path; (2) low efficiency memory allocation of I/O data and (3) unnecessary CPU overhead on user polling. Then we introduce LWAIO, a lightweight async I/O system to relieve the above issues. It mainly contains three techniques: (1) kernel-level threading; (2) dynamic memory pool and (3) kernel pushing. We implement LWAIO in NOVA, a well-known PM file system and conduct extensive experiments to verify its advantages on a real PM platform. The experimental results show that LWAIO brings up to 13% IOPS benefit when dealing with random write I/O operation, as well as 45% IOPS improvement when dealing with the random reads.

Memory copying is one of the most common operations in modern software. Usually, the operation reflects a synchronous (sync) CPU procedure of memory copying, incurring overheads such as cache pollution and CPU stalling, especially in the scenario of bulk copying with large data. To improve this issue, some works based on I/OAT, which is a dedicated and popular hardware copying engine on Intel platform, is proposed but still exists several problems: (1) lacking atomic allocation/revocation at the granularity of I/OAT channel; (2) deficiency of interrupt support and (3) complicated programming interfaces. We propose RAMCI, an asynchronous (async) memory copying mechanism based on Intel I/OAT engine, not only improves the sync overheads, but also overcomes the above three issues through (1) a lock mechanism by using low-level CAS instruction; (2) a lightweight interrupt mechanism for the completion of memory copying, instead of using the polling pattern which consuming large CPU resource and (3) a group of well-defined and abstract interfaces, allowing the programmers to utilize the underlying free I/OAT channels transparently. To support the interfaces, a novel scheduler of the I/OAT channels is introduced. It splits the source copying data into several pieces, and each of them can be allocated with a dedicated I/OAT channel intelligently to transfer the data with parallelism. We evaluate RAMCI and compare it with other memory copying mechanisms in four NUMA scenarios. The experimental results show that RAMCI improves memory copying performance up to 4.68 $$\times $$ while achieving almost full ability of parallel computing.

The basic I/O operations of a system can be categorized as two distinct modes: synchronous (sync) I/O and asynchronous (async) I/O, whose performance varies on the system statues, workloads and storage devices. Appropriately applying I/O modes is critical to the system performance. However, the I/O access of diverse applications in a server, especially in a cloud, is volatile and irregular. As a result, this can lack a flexible and adaptive I/O modes, leading to the sub-optimal I/O performance. To tackle this problem, in this paper, we propose IObrain, an intelligent I/O mode recommendation system, which can adopt the appropriate I/O mode in a dynamic and self-adaptive manner according to both application needs and system statuses. IObrain first trains a lightweight recommendation model with decision tree. Then, a query hook is interposed into the storage engine to intercept the read/write operations from upper application. In this way, IObrain queries the recommendation model first before executing a read/write operation to find the right I/O mode. In addition, two techniques, called inference cache and gRPC bridge, are proposed to reduce the inherent query latency. We practically implement IObrain and verify the advantage of IObrain based on the prototype system. The experimental results show that, compared to existing approach, IObrain improves the I/O performance by up to 1.33× with mild running costs.

Persistent memory (PM) can play an important role in storing the edge data of IoT devices, but their capacities are restrained by the embedded system, which only provides the limited host space and energy resource. Therefore, a deduplication system is required to improve the PM utilization and energy consumption. According to our observations, the current inline deduplication algorithms incur nonnegligible latency when applied to the PM file systems (PMFSs), mainly because (i) the low tolerance to the extra deduplication I/O path, (ii) the long fingerprint calculation, and (iii) the unnecessary duplication detection when writing content with low duplication ratio. To improve this issue, we propose LO‐Dedup, a novel and low‐overhead deduplication system for PM. LO‐Dedup adopts PM‐friendly design, both in fine‐grained data load/store and fast hash scheme to reduce overhead. Moreover, LO‐Dedup can adaptively sample duplication detection according to the recent contents. We implement a prototype of LO‐Dedup in PMFS, which is a well‐known PMFS. The experimental results show that the write performance only has a slight drop when writing data and saves up to 45% space in PMFS.