The requirements on the radiation hardness (RH) of mass produced products must be confirmed for each wafer lot. The core manufacturing process (CMP) must be controlled to ensure the accuracy and stability of all the declared product parameters, including RH. The development of a monitoring and statistical control system for the CMP is based on the data obtained during the radiation-oriented characterization (ROC) of the CMP or during preliminary tests during the product development process. At each stage of manufacturing, appropriate test structures (TSs) are used to predict an estimate of the radiation hardness of the product. Based on the results of an analysis of engineering practice and the published data, a set of TSs for monitoring the technological process using the example of 250-nm SOI CMOS technology, which meets the requirements for radiation hardness, is proposed in this study. Statistical processing of the data from monitoring production batches of wafers is aimed at checking the degree of deviation of the current batch from the base group, which is selected as the reference. However, as the sample size is only 3 pieces, it is proposed to evaluate the homogeneity of production batches using nonparametric statistical evaluation criteria. The considered approach makes it possible to guarantee radiation hardness due to the controllability and stability of the CMP, which helps to minimize technical and economic costs and the volume of radiation tests.

An analysis of the monitoring of the current system of radiation hardness (RH) shows that in order to work effectively, the RH needs to be monitored during fabrication, taking into account the features of each stage of the life cycle of microelectronic products. In this study an approach is proposed to provide predictive control of the stability of the RH of microelectronic products in the production process, taking into account the category of RH of each type of microcircuit. It is shown that the developed basic algorithms for the predictive control of the stability of the RH of microcircuits in mass production for each of the categories of RH guarantee the necessary completeness, reliability, and information control, while minimizing the technical and economic costs and the volume of radiation tests.

This paper proposes that the radiation response of an integrated circuit (IC) die lot can serve as a unique identifier, analogous to a Physical Unclonable Function (PUF). Comparing the variability of radiation responses between die or wafer lots during manufacturing and distribution can provide valuable predictive data for: (1) assessing IC lot quality and parameter stability; (2) identifying manufacturing process changes, such as fab transfers (with a possible IC redesign) or process modifications, which may involve alterations in process flow, layout and materials due to supply chain disruptions; and (3) detecting undeclared changes to IC photomasks, whether for layout optimization or the insertion of malicious hardware. The results of safe low-energy laser and X-ray testing can be useful for process development, die and wafer identification, and defect or failure analysis. A continuously updated database of ICs' radiation responses can provide unique quantitative information to ensure its trustworthiness for critical applications.

A key aspect of the safe operation of computing systems in environments with exposure to ionizing particles (such as ions, protons, and neutrons) is single-event effects (SEE) hardness assurance. Statistically reliable determination of the probability of failure-free operation of integrated circuits (ICs) based on radiation testing results poses several fundamental challenges. In the absence of observed failures during testing, it becomes nearly impossible to interpret the results conclusively without utilizing prior knowledge about the device and the nature of SEEs. Prior quantitative information about SEE behaviour of the devices of the same type can be used to justifiably reduce test requirements while the desired confidence level in the hardness assessment. This paper proposes a method for determining testing requirements based on Bayesian methodology. In this approach, SEE sensitivity parameters are treated as a random vector variable, and the prior probability distribution for this variable is constructed from available empirical data. Both parametric and non-parametric methods for constructing the prior distribution from empirical data are considered. The analysis reveals that the uncertainty in testing requirements estimation is predominantly influenced by the prior information and its representation, while accounting for sample-to-sample variability and particle fluence measurement errors only slightly increases test requirements. The proposed approach was also used for assessing the confidence level of hardness requirements compliance check based on prior information without conducting actual tests.

The ultra-high frequency (UHF) tag IC’s main part of the power management unit (PMU) design technique is presented. The technique is a step-by-step algorithm for designing a PMU and consists of five interrelated stages. At the first stage, the requirements for the parameters of the PMU (output voltage, output DC power, efficiency, output capacitor capacity) and the Q-factor of the tag analog front-end are determinates. At the second stage, the design of an electrical circuit of a voltage multiplier (VM) is carried out. VM is required to convert the voltage of the input radio frequency (RF) signal into an DC voltage. During the third stage, the design of the electrical circuit of the DC voltage limiter is carried out, which is necessary to reduce the output voltage of VM to a safe level. The result of stage 4 is an electrical circuit of surge protection designed to provide the required level of immunity of the tag IC to the effects of electrostatic discharge and a high-power RF signal. As part of the final stage, the evaluation and alignment with the required Q-factor value of the tag IC analog front-end is carried out. The proposed technique can be used for the development of domestic UHF tag ICs (ISO 18000-6C, GJB 7377.1, etc.) based on CMOS technological processes, including ICs designed for radio frequency identification of critical infrastructure objects. Using the presented technique, the design of a PMU with an estimated efficiency value of 70%, an estimated Q-factor of the analog front-end of less than 15 at an RF input signal power of -12.7 dBm was performed.

This paper analyzes the feasibility of using a standard X-ray inspection setup to assess the mass thickness of integrated circuit packages. Such assessments are necessary for accurately determining the values of ion linear energy transfer during experimental studies on high-energy ion accelerators involving encapsulated microelectronic products. Preliminary results demonstrating this possibility are presented. The design and operational characteristics of the X-ray inspection system are discussed, revealing that the results of the assessments are significantly influenced by the instability of the X-ray unit's characteristics, the divergence of the X-ray radiation, and the accuracy of the positioning of the integrated circuits. A method for evaluating the mass thickness of packages is justified, utilizing simultaneous irradiation of a wedge made of a known material alongside the sample under investigation. To minimize the impact of dimensional effects, trimming part of the package is permitted when feasible.

This paper presents the results of the study of sigma-delta analog-to-digital converters` main spectral parameters` dependence on the total ionizing dose (TID). Within the framework of this study the main parameters of analog-to-digital converters (ADC) (dynamic, static and electrical) were controlled. The main dynamic characteristics of sigma-delta ADC are signal-to-noise ratio (SNR), spurious-free dynamic range (SFDR), signal-to-noise and distortion ratio (SINAD) and total harmonic distortion (THD). Those have been determined from the spectrum of digitized sine signal using the fast Fourier transform (FFT). Static parameters (integrated nonlinearity (INL), offset and gain errors) were determined using a straight line that linearizes the transfer function, according to the method which is described in the IEEE Standard for Terminology and Test Methods for Analog-to-Digital Converters. National Instruments modular measuring equipment was used for testing ADC`s parameters. Comparative data on the dose dependence of static and dynamic parameters of two sigma-delta ADC and one sigma-delta modulator are obtained. Based on the results, it was concluded that the most sensitive parameters of sigma-delta ADC to TID are its dynamic parameters. Therefore, when assessing the sigma-delta ADC`s radiation hardness, the spectral characteristics of absorbed dose should be kept under control.

This paper presents the design, implementation, and experimental investigation results of the UHF power amplifier (PA) based on a silicon MOSFET manufactured by vertical diffusion technology (VDMOS). The designed PA has operating frequency range from 800 to 1100 MHz, power gain 10 dB and maximal PAE 36 %. Single-event effects (SEEs) and total ionizing dose (TID) test results are presented for VDMOS transistors in this study.

Modern transceivers are widely used in the design of the on-board equipment of spacecraft. The effects of space ionizing radiation can lead to failures in operation of transceivers, leading to a loss of the transmitted data. It is necessary to provide radiation hardness assurance of transceivers in order to evaluate the rate of upsets in the operation of transceivers used the on-board equipment of spacecraft. The paper describes main types of failures observed in interface ICs operating in space radiation environment. The classification of functional failures in transceivers exposed to ionizing radiation and monitoring methods are presented in this paper. Parameters of transceivers that has to be monitored during radiation testing are listed. We reviewed National Instruments equipment used in radiation testing of different types of transceivers. A measuring system based on this equipment was used for radiation testing of TLK2711 transceiver in loop operation mode over a serial data channel.

In the light of the improvements of integration technologies and testing instruments, an automated testing system based on state-of-the-art technical solutions for automatic test equipment is introduced. The use of PXIe-6570 in the development process of automatic test equipment is presented. Some aspects of importance when migrating to PXIe-6570 are given. Efficiency of newly developed features of PXIe-6570 is demonstrated on the introduced automated testing system. The advantage of digital pattern instruments over digital waveform instruments is presented in the comparison of the essential features of those instruments. The architecture of the project developed in Digital Pattern Editor is given. The application for conducting parametric measurements of the microcircuitry is described. It is shown that digital pattern instruments enhance the facilities of development of automated testing systems with the features of modularity, which allows to make small changes in the modules, without affecting the whole project and to customize given projects to conduct tests on various microcircuits.

The article is devoted to the problem of identifying counterfeit electronic components. The article presents the results of complex test methods such as weighing and X-ray structural analysis. It is shown that the same counterfeit defects can be detected in different ways. But the best performance and reliability of the results are provided by a set of methods.

Power MOSFET transistors are the main part of the power supply system for any equipment, including spacecraft. Modern vertical MOSFETs are designed as regular matrix structures of elementary parallel cells (mini-transistors), made according to submicron process. Single event burnout (SEB) of a vertical cell is the main mechanism for failure of vertical MOSFETs from single particle effect. In addition to SEB, there are several other reasons for the MOSFET burnout, caused by extremal bias, that are tested during manufacturing. The MOSFETs SEB sensitivity prediction model is presented. The model is based on the analysis of burnout bias characteristics from the datasheets. The comparison of experimental data and model prediction results is presented in the article. The figure of merit (FOM) for SEB sensitivity prediction is proposed. The optimal value of FOM for n-MOSFETs and LET 40 MeV cm2/mg is presented. So, the model helps to determine the most sensitive MOSFET transistors before expensive testing done.

An advanced thermoelectric system has been developed to set a low temperature to the heat-generating power semiconductor devices. The system provides the setting the temperature down to -60°C in a volume of 80x40x12 mm3 at the heat-release up to 13 W. Accuracy of setting the temperature is in the range of ± 3°C. The design of developed system is adopted for long-term tests, including tests in harsh environment. The cooling chamber in may be placed up to 6 m away from the heat exchanger and control unit. One of the main features of new development is its mobility and easy installation when carrying out various types of tests.

A description of the system for setting a lowered environment temperature based on Peltier modules is presented. The development was carried out taking into account the peculiarities of the radiation test: minimum distance from exposure source to DUT; stand-alone use during long-term radiation test; minimum overall dimensions, transportability and flexibility when conducting tests on various exposure sources. Cooling box consists of 3-level stacked assembly of the Peltier modules, which is cooled by liquid refrigerant. Control of the assembly of Peltier modules was performed according to proportional integral and differential algorithm, provided by microcontroller with feedbacks on Pt thermoresistors. The system provides temperature stabilization of the DUT up to 23х17х12 mm in size and with released heat power up to 0.4 W at minus (60 ± 3) ºС. Temperature establishing time is less than 10 minutes. Typical power consumption of developed system is about 500W.

We provide a brief evolution trends overview of the modern microelectronic devices and its radiation behaviour, focusing on new structures and materials effects due to Total Ionizing Dose (TID) and Single Event effects (SEE) in CMOS elements. Evolution of test facilities driven by these changes in radiation behaviour of modern devices is also considered.

This work focuses on the design issues of radio frequency (RF) bipolar integrated circuits (ICs) as a part of frequency synthesizers for extreme environmental applications. It is shown that silicon-germanium (SiGe) and gallium arsenide (GaAs) heterojunction bipolar transistors (HBTs) as well as bipolar RF ICs (including frequency dividers, voltage-controlled oscillators, and wide-band amplifiers) are highly sensitive to ambient temperature and radiation-induced displacement damage. This article also presents a design approach based on specialized HBT macromodels and hardening techniques.

The paper presents an analysis of existing approaches to estimation of single event rate (SER) in integrated circuits under effects of charged particles of space radiation environment. These issues are of significant importance in the light of the expansion of the scope of practical application of cyber-physical control systems for space objects, since it is mainly due to the SER that information is lost in the register elements and in the memory cells of the electronic blocks of spacecraft. It is shown that existing models based on energy deposition in fixed sensitive volume are not applicable for SER estimations in case of high threshold linear energy transfer (LET) values. An alternative approach is proposed. It is based on diffusion charge collection model, which can be used to estimate the SER cross-sections in isotropic particle field. A universal dependence for SER estimation in integral circuits (ICs) at geostationary orbit is proposed and used as a basis for establishing classification of devices based on hardness assurance levels. The obtained results provide the grounds for setting test requirements that has to be met during single event effects testing of ICs.

Singe event effect (SEE) simulation in modern integrated circuits (ICs) by femtosecond laser irradiation through the substrate allows eliminating a lot of problems connected to the presence of multiple opaque metal layers above the IC active layer. With this irradiation geometry, the proper wavelength of laser radiation should be chosen to generate sufficient amount of nonequilibrium charge in the active layer on the one hand, and to avoid significant laser energy losses in the thick substrate on the other hand In this paper several typical microelectronic ICs were selected to investigate the dependence of SEE generation effectiveness on the laser wavelength when irradiating through the substrate of various thickness. It was found, that the most appropriate laser wavelength for the silicon substrate thicknesses of 300 to 800 mu m lies in the 1030 to 1070 nm range.

The paper presents single event upset (SEU) experimental results in Spartan-6 FPGA due to direct and indirect proton ionization. High energy proton beam and aluminum foils were used to decrease proton energy down to 1... 20 MeV to observe proton direct ionization upsets.

The article describes an optoisolators radiation hardness testing method to the effects of absorbed dose using an x-ray unit. Technological issues and features of the research are highlighted.