Lanxia Cheng, G. Mordi, Young Gon Lee, Jiyoung Kim Dept. of Material Science and Engineering, University of Texas at Dallas, Richardson, Texas 75080, USA jiyoung.kim@utdallas.edu Abstract Graphene, an atomic thick of sp bonded hexagonal carbon network, has been investigated extensively as the most promising material for future nanoelectronics because of its exceptional physical and electrical properties, such as high mobility, high thermal conductivity, excellent mechanical strength and chemical stability. However, a number of issues need to overcome prior to the practical realizing the excellent electrical performance of graphene based logic devices, in particular, the uniform deposition of scalable layer of dielectric films owing to the inert nature of graphene basal plane. Furthermore, the good scalability of dielectrics film on graphene is considered of particularly critical for such novel applications as graphene tunnel FET (GFET) and graphene bilayer pseudo-spin FET (BiSFET) electronics in which an extremely thin dielectric layer on graphene is required as tunneling barrier and to reduce the screen effect. In addition to the efforts on downscaling uniform inorganic oxide dielectrics on graphene, engineering ultrathin layer of organic low-k dielectrics also become attractive with regard to its low cost, good scalability and flexibility not only as gate dielectrics for flexible electronics but also as seeding and passivation layers. In this work, the physical and electrical characteristics of thin film of organic low-k dielectrics deposited using CVD on graphene have been investigated using Raman, XPS, STM and Graphene FETs, respectively. Our CVD deposition of parylene-C, a cross-linkable polymer with hydrophobic nature, on graphene showed good film thickness scalability down to ~7 nm without revelation of process induced defects. Electrical results of the GFET using this thin organic as top gate dielectric demonstrated good dielectric properties with minimal doping, low leakage current (~10A/cm at ±2V) and low dielectric constant of ~2.1 as well as low hysteresis less than 30 mV during top gate operation (-2.5V to 2.5V), an indication of low trapped charges introduced by parylene. In addition to parlyene, self-assembled a few layer of PTCDA on graphene were also investigated to further scale the dielectric thickness down to sub-nanometer, which forms very ordered and uniform single crystal hexagonal molecular networks with a band gap of ~1.9 eV and ~2.4 eV derived for monolayer and trilayer PTCDA film, respectively. PTCDA film of 3 and 5 nm with a extracted dielectric constant of around 2.02 show much lower leakage current comparing to 4 layer of h-BN, this, in addition to the tunneling conduction mechanism revealed within its uniform molecular networks, suggests PTCDA as an excellent candidate for organic low-k dielectrics for graphene based tunneling devices. Our experimental results have also demonstrated the feasibility of using parlylene and PTCDA as organic low-k dielectrics for graphene based electronics.

Despite the number of existing studies that showcase the promising application of fluorinated graphene in nanoelectronics, the impact of the fluorine bonding nature on the relevant electrical behaviors of graphene devices, especially at low fluorine content, remains to be experimentally explored. Using CF4 as the fluorinating agent, we studied the gradual structural evolution of chemical vapor deposition graphene fluorinated by CF4 plasma at a working pressure of 700 mTorr using Raman and X-ray photoelectron spectroscopy (XPS). After 10 s of fluorination, our XPS analysis revealed a co-presence of covalently and ionically bonded fluorine components; the latter has been determined being a dominant contribution to the observation of two Dirac points in the relevant electrical measurement using graphene field effect transistor devices. Additionally, this ionic C-F component (ionic bonding characteristic charge sharing) is found to be present only at low fluorine content; continuous fluorination led to a complete transition to a covalently bonded C-F structure and a dramatic increase of graphene sheet resistance. Owing to the formation of these various C-F bonding components, our temperature-dependent Raman mapping studies show an inhomogeneous defluorination from annealing temperatures starting at ∼150 °C for low fluorine coverage, whereas fully fluorinated graphene is thermally stable up to ∼300 °C.

The effect of room temperature ultraviolet-ozone (UV-O3) exposure of MoS2 on the uniformity of subsequent atomic layer deposition of Al2O3 is investigated. It is found that a UV-O3 pre-treatment removes adsorbed carbon contamination from the MoS2 surface and also functionalizes the MoS2 surface through the formation of a weak sulfur-oxygen bond without any evidence of molybdenum-sulfur bond disruption. This is supported by first principles density functional theory calculations which show that oxygen bonded to a surface sulfur atom while the sulfur is simultaneously back-bonded to three molybdenum atoms is a thermodynamically favorable configuration. The adsorbed oxygen increases the reactivity of MoS2 surface and provides nucleation sites for atomic layer deposition of Al2O3. The enhanced nucleation is found to be dependent on the thin film deposition temperature.

The deposition of ultra-thin metal oxides on graphene is challenging due to the inert nature of the sp2 bonded graphene lattice. The feasibility of e-beam deposition of hafnium and hafnium oxide layers as seeds for further growth by atomic layer deposition on graphene CVD graphene is presented here. It is shown that metallic hafnium deposited in an ultra high vacuum environment readily reacts with graphene, forming a metal-carbide, rendering it unsuitable as a seed layer for the deposition of gate oxide materials. The deposition of HfO2 by reactive e-beam under an O2 partial pressure on the other hand eliminates the reaction with the underlying graphene. The uniformity of the e-beam HfO2 seed layers is found to control the uniformity of the subsequent films deposited by atomic layer deposition. Contrary to previous studies on graphite and exfoliated graphene substrates it is found that the uniformity and thickness scalability of atomic layer deposited thin films is limited on CVD graphene, most likely due to transfer induced residues on the graphene surface.

We use a triangular-pulse measurement technique to obtain the hysteretic electrical characteristics of flexible graphene field-effect transistors (GFETs). To minimize charge trapping, the gate-voltage scanning rate was controlled (up to 2 V/mu s) by varying the triangular-pulse rise and fall times. This method makes it possible to measure the intrinsic-like transfer characteristics of chemical vapor deposition graphene devices. The maximum electron (hole) mobility measured by a dc measurement is similar to 4800 (5200) cm(2)/Vs, whereas the maximum electron (hole) mobility measured by the triangular-pulse technique with a gate-voltage scanning rate of 0.4 V/mu s is similar to 10 600 (8500) cm(2)/Vs. For measurements with a triangular gate pulse, the shift of the Dirac voltage is less than that measured by the dc method. These results indicate that the triangular-gate-pulse measurement is a promising technique with which to determine the intrinsic properties and ambipolar transfer characteristics of GFETs.

The performance of graphene field effect transistors fabricated on flexible substrates is easily degraded by deformation, delamination and shrinkage during the device fabrication. Multiple thermal annealing on graphene devices could be performed without damages to the flexible substrate using a rigid supporting substrate, poly(dimethylsiloxane) coated Si, holding the flexible substrate during the device fabrication. As a result, a very high performance including electron mobility ∼12980 and hole mobility ∼9214 cm2/Vs could be achieved. The performance enhancement is attributed to the effective removal of polymer residues using a high temperature vacuum anneal and a reduced interfacial reaction between the graphene and the hydrophobic flexible substrate.

We demonstrate and explain the operation of a multi-level nonvolatile memory system using dual-gated single-layer graphene field-effect transistor with a polymer ferroelectric as top-gate dielectric and a linear bottom-gate dielectric. The multiple memory states are represented by various levels of graphene channel resistance obtained by changing the doping type and the number of p−n junctions in graphene. This is achieved by controlling the polarity of the domains in the ferroelectric thin film using a biased metal-coated atomic force microscope tip. We show a five level memory with the resistance change between the lowest and highest state greater than 200%.

Structures created through Atomic Layer Deposition (ALD) of titania (TiO 2 ) on top of Scanning Tunneling Microscope (STM) based hydrogen depassivated patterns on Si(100) are demonstrated. The UHV prepared samples retain their patterns after exposure to atmosphere, with high selectivity shown between patterned areas and background. Atomic Force Microscopy (AFM) measurements indicate correlation between hydrogen depassivation saturation in the STM patterned areas and the resulting height of the deposited TiO 2 . Additionally, it is shown that for the narrowest linewidths, there is a correlation between linewidth and height of the TiO 2 structure. After deconvolution of tip shape with the observed AFM linewidths, patterned ALD lines with heights of 2.5 nm and widths of less than 6 nm are observed.

During chemical-vapor-deposited graphene transfer onto target substrates, a polymer film coating is necessary to provide a mechanical support. However, the remaining polymer residues after organic solvent rinsing cannot be effectively removed by the empirical thermal annealing in vacuum or forming gas. Little progress has been achieved in the past years, for little is known about the chemical evolution of the polymer macromolecules and their interaction with the environment. Through in situ Raman and infrared spectroscopy studies of PMMA transferred graphene annealed in nitrogen, two main processes are uncovered involving the polymer dehydrogenation below 200 degrees C and a subsequent depolymerization above 200 degrees C. Polymeric carbons over the monolayer graphitic carbon are found to constitute a fundamental bottleneck for a thorough etching of PMMA residues. The dehydrogenated polymeric chains consist of active C=C bonding sites that are readily attacked by oxidative gases. The combination of Raman spectroscopy, X-ray photoemission spectroscopy, and transmission electron microscopy reveals the largely improved carbon removal by annealing in oxidative atmospheres. CO2 outperforms other oxidative gases (e.g., NO2, O-2) because of its oxidative strength to remove polymeric carbons efficiently at 500 degrees C in a few minutes while preserving the underlying graphene lattice. The strategy and mechanism described here open the way for a significantly improved oxidative cleaning of transferred graphene sheets, which may require optimization tailored to specific applications.

Patterned fabrication depends on selective deposition that can be best achieved with atomic layer deposition (ALD). For the growth of TiO2 by ALD using TiCl4 and H2O, X-ray photoelectron spectroscopy reveals a marked difference in growth on oxidized and hydrogen terminated silicon surfaces, characterized by typical and predictable deposition rates observed on SiO2 surfaces that can be 185 times greater than the deposition rates on. hydrogen terminated. Si(100) and Si(111) surfaces. Large-scale patterning is demonstrated using wet. chemistry, and nanometer-scale. patterned TiO2 growth is achieved through scanning tunneling microscopy (STM) tip based lithography and ALD. The initial adsorption mechanisms of TiCl4 on clean, hydrogen terminated, and OH-terminated Si(100)-(2 X 1) surfaces are investigated in, detail through :density functional theory calculations. Varying the reactive groups on the substrate is found to strongly affect the probability of precursor nucleation on the surface during the ALD process. Theoretical studies provide quantitative understanding of the experimental differences obtained for the SiO2, hydrogen-terminated, and clean Si(100) and Si(111) surfaces.

Integration of graphene field-effect transistors (GFETs) requires the ability to grow or deposit high-quality, ultrathin dielectric insulators on graphene to modulate the channel potential. Here, we study a novel and facile approach based on atomic layer deposition through ozone functionalization to deposit high-κ dielectrics (such as Al(2)O(3)) without breaking vacuum. The underlying mechanisms of functionalization have been studied theoretically using ab initio calculations and experimentally using in situ monitoring of transport properties. It is found that ozone molecules are physisorbed on the surface of graphene, which act as nucleation sites for dielectric deposition. The physisorbed ozone molecules eventually react with the metal precursor, trimethylaluminum to form Al(2)O(3). Additionally, we successfully demonstrate the performance of dual-gated GFETs with Al(2)O(3) of sub-5 nm physical thickness as a gate dielectric. Back-gated GFETs with mobilities of ~19,000 cm(2)/(V·s) are also achieved after Al(2)O(3) deposition. These results indicate that ozone functionalization is a promising pathway to achieve scaled gate dielectrics on graphene without leaving a residual nucleation layer.

We demonstrate the characteristics of dual gated graphene field effect transistors using a thin layer (∼7 nm) of parylene-C as a top-gate dielectric. Our devices exhibit good dielectric properties with minimal doping, low leakage current (∼10−6 A/cm2 at ±2 V), and a dielectric constant of ∼2.1. Additionally, Raman spectroscopy did not reveal any process induced defects after dielectric deposition. Electrical characterization performed in air showed a carrier mobility of ∼5050 cm2/Vs with hysteresis less than 30 mV during top gate operation (−2.5 V to 2.5 V) which indicates that parylene and its interface with graphene does not have a significant amount of trapped charges.

In this study, we present in-situ electrical studies of back-gated graphene field-effect transistors (GFETs) exposed to ozone at room temperature. Here, we compare the effect of the ozone exposure on transport characteristics in two different environments using a vacuum probe station with static vacuum and an atomic layer deposition (ALD) chamber having a dynamic environment with continuous nitrogen purge. We observed that in both the cases there is a p-type doping in graphene upon exposure to ozone, but, there is a significant difference in the ozone exposure time required to witness a noticeable effect on the transport properties, with the dynamic environment requiring a longer ozone treatment period. The observed effect on graphene devices was found to be reversible under vacuum suggesting a physisorption process. We also demonstrate top-gate GFETs on chemical vapor deposited (CVD) graphene using 10 nm ALD Al2O3 as gate dielectric deposited with the ozone functionalization approach.

In this article we demonstrate the use of an ozone based functionalization scheme of graphene surface for depositing thin, high-k dielectrics using atomic-layer deposition (ALD) technique. It is found that the ozone functionalization at room temperature provides nucleation sites for atomic layer deposition without causing any substantial damage to the electronic properties of graphene devices. The capacitance of the Al2O3 films was extracted using DC and CV measurements and was found to be similar from both types of measurements. A charge carrier mobility of upto ~5000 cm2/V-s at room temperature was extracted for top-gated graphene devices with ALD Al2O3 deposited using ozone functionalization.

The initial growth mechanism of Al2O3 films deposited by atomic layer deposition (ALD) using trimethylaluminum (TMA) and ozone as a precursor and an oxidant, respectively, on Highly Ordered Pyrolytic graphite (HOPG) has been investigated. Trimethylaluminum (TMA)/water ALD process has been reported to deposit Al2O3 along the step edges of HOPG while ozone process induce nucleation sites leading to a conformal deposition on the basal plane and step edges. Here we demonstrate a uniform and conformal Al2O3 deposited at 25°C from 6 cycles of (TMA)/ozone as a seed layer toward the integration of high-K dielectrics for top-gated graphene devices. Through this decoration of nucleation sites on graphene due to ozone, we investigate the mechanism of the ozone based process.

We present characteristics of dual-gated graphene devices with an Al2O3 gate dielectric formed by an O3-based atomic-layer-deposition process. Raman spectra reveal that a O3 process at 25°C on single-layered graphene introduces the least amount defects, while a substantial number of defects appear at 200 °C. This graphene device with O3-based Al2O3 dielectric demonstrates a heterojunction within the graphene sheet when applying VTG and VBG and possesses good dielectric properties with minimal chemical doping, including a high dielectric constant ∼8, low hysteresis width ∼0.2 V, and low leakage current and a carrier mobility of 5000 cm2/V s 25°C in ambient.