Incorporating ZnO as a buffer layer in thin film CdSeTe/CdTe solar cells leads to high conversion efficiencies. However, the sub-optimal band alignment at the ZnO/CdSeTe interface limits the V-oc. In this study, Ce is used to alloy the ZnO buffer layer to widen the band gap and improve band alignment, leading to an increase in J(sc) and V-oc. The 50 nm and 100 nm thick ZnO and CeZnO buffer layers are deposited on SnO2:F coated soda-lime glass using radio frequency sputtering. To study the effect of Ce alloying, the Ce atomic percent is varied from 3% to 9%. The buffer layers are fabricated into As-doped CdSeTe/CdTe devices using First Solar's process. The device incorporating the 3% CeZnO buffer layer leads to the highest efficiency and V-oc. However, the saturation current density and ideality factor are observed to increase as the Ce content increases, suggesting that Ce alloying degrades the quality of the front p-n junction. The interface defect density is estimated using C- V and DLCP profiling, the interface defect density is observed to increase significantly when incorporating more than 3% Ce. There is an apparent trade-off between front interface passivation and band alignment.

Thin film cadmium telluride is the most important second-generation solar cell technology. Although the photo-absorber is polycrystalline, high conversion efficiency has been achieved by effectively passivating the grain boundaries and other bulk defects. In this paper, we report on the use of a bilayer SnO2/ZnO n-type buffer to improve passivation at the p-n junction interface to achieve 21.7% efficiency. We have assessed the quality of the interface with highly sensitive electrical measurements and a combination of high-resolution electron microscopy and cathodoluminescence. High-resolution cathodoluminescence has enabled the measurement of the recombination velocity to quantify the improvement in interface defect passivation. We have combined this with direct observation of the coherence of the interface at the atomic scale. The use of these techniques will revolutionize our ability to assess future passivation strategies at the front p-n junction and also at the back contact of thin film photovoltaic devices.

The analyses of surface morphology and microstructural properties of CdTe thin film absorber layers, deposited by metal organic chemical vapour deposition (MOCVD) on CdS/CdZnS/FTO-coated glass substrates as a function of different growth conditions (non-saturated or Cd-saturated growth condition and post-growth CdCl2 heat treatment) are presented. Scanning electron microscopy (SEM) images showed that the CdTe absorber surface morphology was relatively smoother with Cd-saturated growth compared to non-saturated conditions, while using a similar II/VI precursor partial pressure ratio. Microstructural characterisation using electron back scatter diffraction (EBSD) measurements indicate a strong influence of the II/VI ratios on the crystalline structure and degree of recrystallisation in Cd-saturated deposited CdTe absorber layers. CdTe absorber layers from a low II/VI ratio of 2 showed a strong Te(A1) Raman spectra band, characteristic of a Te rich composition, whilst a Cd-saturated composition was confirmed in the case of II/VI ratio of 4, as Te(A1) band was significantly suppressed. Cd-saturated grown CdTe:As (II/VI = 4), combined with a CdCl2 activation process at 440 degrees C, yielded optimum, highly randomized textured absorber with large grains. Reduced [111] oriented grains and suppression of Te(A1) mode was found to lead to higher V OC in devices. A high efficiency CdTe:As solar cell with a high V OC of 825 mV was measured based on the optimum growth condition for the absorber layers.

The use of SnO2 buffer layers has led to highly efficient and stable thin film CdSeTe/CdTe solar cells. However, chlorine segregation was observed at the SnO2/CdSeTe interface, suggesting that the quality of the p-n junction could be improved. In this work, ZnO was incorporated between the SnO2 and CdSeTe to study its passivation effect. Including a similar to 10 nm thick ZnO layer improved conversion efficiency, V-oc, J(sc), and FF, suggesting an improvement in junction quality. The bilayer SnO2 (70 nm)/ZnO (30 nm) buffer layer achieved an efficiency of 21.7% without an anti-reflection coating. High-resolution TEM analysis showed atomically coherent boundaries at the SnO2/ZnO and ZnO/CdSeTe interfaces, indicating that ZnO creates a highquality interface. The discovery that ZnO can be used as a passivation layer opens up new pathways to achieve highly efficient solar cells.

The front buffer layer plays an important role in CdSeTe/CdTe solar cells and helps achieve high conversion efficiencies. Incorporating ZnO buffer layers in the CdSeTe/CdTe device structure has led to highly efficient and stable solar cells. In this study, the optimization of ZnO buffer layers for CdSeTe/CdTe solar cells is reported. The ZnO films are radio frequency sputter‐deposited on SnO 2 :F coated soda‐lime glass substrates. The substrate temperature for the ZnO deposition is varied from 22 to 500 °C. An efficiency of 20.74% is achieved using ZnO deposited at 100 °C. The ZnO thickness is varied between 40 nm and 75 nm. Following the ZnO depositions, devices were fabricated using First Solar's CdSeTe/CdTe absorber, CdCl 2 treatment, and back contact. The optimal ZnO deposition temperature and thickness is 100 °C and 65 nm, respectively. The STEM‐EDX analysis shows that within the detection limits, chlorine is not detected at the front interface of the devices using ZnO deposited at 22 °C and 100 °C. However, depositing ZnO at 500 °C results in chlorine segregation appearing at the ZnO/CdSeTe boundary. This suggests that chlorine is not needed to passivate the ZnO/CdSeTe interface during the lower temperature depositions. The nanocrystalline ZnO deposited at lower temperatures results in a high‐quality interface.

A range of microstructural changes occur during the deposition and activation of CdTe based thin film solar cells. In particular, the cadmium chloride (CdCl2) activation treatment results in wholesale recrystallisation which transforms the conversion efficiency of the solar cell. One of the noticeable effects is the change of preferred orientation of the CdTe absorber. Highly orientated [111] texture is observed in as deposited or under-treated CdTe based devices. Optimized activation results in a more randomized texture and the [111] preferred texture component is significantly weakened. In this paper we use Electron Backscatter Diffraction to characterise absorber cross-sections. The focus is on how randomization of the absorber texture reflects device performance. We have had access to a range of CdTe devices using a variety of deposition techniques. We have observed a clear pattern that shows that devices with a highly orientated [111] texture have poor efficiency. Devices with a randomized texture have much higher efficiency. Here we illustrate this empirical correlation using devices deposited by Metal Organic Chemical Vapour Deposition with a range of efficiencies from 13.1 % to 17 %. We have also included the analysis of an absorber from a 18.7% high efficiency CdSeTe/CdTe device to show that texture is similarly important in these advanced devices. We have been able to quantify the effect of texture by using multiples of uniform density or (MUD) values from the inverse pole figures. MUD figures close to 1 correlate with highest efficiency. Although the random texture of the absorber microstructure is only one of several important process factors, it appears to be a necessary feature for highest efficiency CdTe-based polycrystalline solar cells.

In this study, the use of intrinsic and highly insulating ZnO buffer layers to achieve high conversion efficiencies in CdSeTe/CdTe solar cells is reported. The buffer layers are deposited on commercial SnO2:F coated soda-lime glass substrates and then fabricated into arsenic-doped CdSeTe/CdTe devices using an absorber and back contact deposited by First Solar. The ZnO thickness is varied from 30 to 200 nm. The devices incorporating a 50 nm ZnO buffer layer achieved an efficiency of 21.23% without an anti-reflection coating. An improved efficiency of 21.44% is obtained on a substrate with a multilayer anti-reflection coating deposited prior to device fabrication. The highly efficient ZnO based devices are stable and do not develop anomalous J-V behavior following environmental tests. High resolution microstructural analysis reveals the formation of a high-quality ZnO/CdSeTe interface. Unusually, chlorine is not detected as a discrete layer at the interface, these observations point to a high-quality interface. The extrapolation of Voc to 0 K indicates that interface recombination dominates, suggesting that further improvement is possible. Using device modeling, an attempt is made to understand how this type of device performs so well. The incorporation of a ZnO buffer layer in the CdSeTe device structure has led to conversion efficiencies exceeding 21%. The ZnO carrier concentration is orders of magnitude lower than that of the conventional SnO2 buffer. ZnO creates a high-quality interface with CdSeTe, resulting in the unusual omission of Cl at the front interface.image

Film and epitaxy growth form an essential part of engineering components, electronic and photonic devices. This chapter provides a summary of commonly used techniques both in research and for production scale. Examples of materials and applications are given for each of the techniques described. The chapter is broadly divided into two sections depending on the method to deliver elements onto the deposition surface. Vapor phase deposition includes evaporation techniques, chemical vapor deposition and energy assisted processes, covering a range of vapor pressures from atmospheric down to ultra-high vacuum. Solution based methods can be aqueous or solvent based and will normally entail a heterogeneous reaction to yield the required material onto the substrate. This includes chemical bath deposition, sol-gel and electrodeposition. Epitaxial growth is covered with descriptions of the commonly used techniques of molecular beam epitaxy (MBE), metal organic vapor phase epitaxy (MOVPE) and liquid phase epitaxy (LPE).

Tin dioxide (SnO2) buffer layers with varying thicknesses were deposited onto commercial F: SnO2 coated soda lime glass substrates using RF sputtering. The buffer layers were then incorporated into arsenic doped CdSeTe/CdTe devices at First Solar. The devices and films were characterised to determine the effect of buffer layer thickness on device performance. The best performing device used a 70 nm thick SnO(2)buffer layer deposited in 25% oxygen at 500 degrees C. A strong trend was observed in which device efficiency increased with buffer layer thickness. The best device achieved a conversion efficiency of 19.79%, V-oc of 833 mV, J(sc) of 30.16 mA/cm(2) and Fill Factor of 78.74%.

Concentrating photovoltaics is an attractive route for achieving high power output with thin film solar cells, using low-cost optics. In this work, the performance of CdTe:As thin film solar cells on two different transparent conducting oxide (TCO)-coated substrates is investigated and compared under varying concentrated light intensities (1-6.3 Suns). Samples tested had CdZnS/CdTe:As devices deposited atop of either a soda-lime glass with a fluorine-doped tin oxide TCO or an ultra-thin glass (UTG) with an aluminium zinc oxide TCO and ZnO high-resistive transparent (HRT) layer. Device current density was found to increase linearly with increased light intensities, for both sample configurations. Power conversion efficiencies of both device samples decreased with increased light intensity, due to a decrease in fill factor. The fill factor, for both sample configurations, was affected by reducing shunt resistance with increasing illumination intensity. The two device types performed differently at the high illumination intensities due to their series resistance. Light-soaking devices under 6.3 Suns illumination intensity for 90 min showed no significant performance degradation, indicative of relatively stable devices under the highest illumination intensity tested. Efficiency limiting factors are assessed, evaluated and discussed.

Photovoltaics (PV) is an attractive candidate for powering the rapidly growing market of smart devices in the Internet-of-Things (IoT) such as sensors, actuators, and wearables. Using solar cells and rechargeable batteries to power IoT devices avoids the expensive replacement of disposable batteries and reduces the environmental impact. IoT devices are often operated indoors under artificial light, which differs from (outdoor) sunlight as it is a much narrower, mainly visible spectrum with typically a factor of 500-1000 lower intensity. In this work, the performances of state-of-the-art devices of eight different PV technologies (amorphous and crystalline silicon, copper indium gallium selenide, cadmium telluride, III-V, organic, dye-sensitized, and perovskite) are compared under identical indoor illumination conditions. Their performance under low illuminances between 100 and 1000 lx is analyzed, and the crucial importance of sufficiently large parallel resistance is highlighted. Absorber materials with larger band gaps show less thermalization losses and thus reach higher power conversion efficiencies, in agreement with theoretical expectations. The best device, a gallium indium phosphide solar cell, with a band gap of 1.89 eV shows a record efficiency of 39.9% under 500 lx cold white LED light.

SnO2 buffer layers of different thickness were deposited onto TEC 15 Fluorine doped tin oxide coated glass substrates using rf magnetron sputtering. The buffer layers were then incorporated into Cu-doped CdSeTe/CdTe devices using a range of CdCl 2 activation treatments and CuCl2 annealing temperatures to determine the effects of buffer layer thickness on device performance. Results show that all devices fabricated with thinner buffer layers resulted in much better J ― V characteristics than their thicker counterparts. This was mainly due to a reduced open-circuit voltage $(\mathrm{V}_{\text{oc}})$ when using thicker buffer layers. The best device produced a conversion efficiency of 16.59%, fill factor of 71.62%, Jsc of 28.44 mA/cm 2 and $\mathrm{V}_{\text{oc}}$ of 814.23 mV.

The increasing power demands of spacecraft payloads and the realistic prospect of space based solar power (SBSP) stations as a means of providing zero carbon electricity in the 2030s, means that there is an emerging requirement for large area, yet lightweight, solar photovoltaic (PV) arrays that will provide far greater power (kW(peak)) than is currently available. To be practical, such arrays will need to use solar cells which have a much higher specific power (i.e., power per unit mass) and a much lower cost per watt than current space-rated solar PV technologies. To this end, the Centre for Solar Energy Research (CSER) at Swansea University have been working on a new solar cell technology, based on thin-film cadmium telluride (CdTe), deposited directly onto ultra-thin space qualified cover glass material. This offers a potentially high specific power and when adopting the conventional CdTe manufacturing process, a low-cost technology. The ultra-thin glass can produce a solar cell which is sufficiently flexible to allow "roll-out" deployment strategies. Four prototype cells were flown as part of the Thin-Film Solar Cell (TFSC) experimental payload, developed by CSER and the Surrey Space Centre (SSC), on the joint Algerian Space Agency (ASAL) - UK Space Agency AlSAT-1N Technology Demonstration CubeSat, launched into a 661 km x 700 km, 98.20 degrees Sun Synchronous orbit, on September 26, 2016. The experiment has provided the first in-orbit current/voltage (I/V) measurements of this novel technology, and more than five years of flight results have now yielded new insights into its longer-term performance and inherent radiation hardness, which makes them particularly attractive for maintaining high end-of-life (EOL) performance for long duration space missions. The results help to strengthen the argument for further development of this technology for space application. The data, collected over similar to 30,000 orbits, show no signs of cell delamination (a potential risk for such technologies), no deterioration in short circuit current or in series resistance. However, all four cell's fill factors were observed to decrease over the duration of the mission, caused primarily by a decrease in their shunt resistance. This has been attributed to the diffusion of gold atoms from the back electrical contacts. We conclude therefore that further development of this technology should utilize more stable back contacting methodologies more commonly employed for terrestrial CdTe modules. However, this flight has proven the basic soundness of the technology for use in space.

Release of the alkaline (mainly sodium) impurities from the soda-lime glass (SLG) substrate can compromise scaling-up of thin film photovoltaic (PV) devices deposited at high temperatures. This does not only degrade electronic device quality but also results in catastrophic effects such as delamination of the semiconductor thin films. Device scale-up can be further hindered by the pinholes that may exist across the large panel areas, causing serious shunt paths. We demonstrate fabrication of uniform CdTe mini-modules on the SLG using a facile photolithography process. This process effectively suppresses sodium release and prevents film delamination from the substrate whilst plugging the pinholes within the semiconductor p-n junction layers. Mini-module devices with repeatable device response are demonstrated using an industrial laser scribing system operating long (microsecond)-pulses of a green laser for thin film scribing.

CdTe:As devices grown by MOCVD in the superstrate configuration have been reconfigured to a substrate structure, by employing a cleaving and reconstruction technique. Indium and aluminium doped Zinc oxide (IZO and AZO) layers were used as the transparent front interface without a metal grid. A substrate efficiency of 12.3% was realized with AZO front contact, retaining 80% of the superstrate device efficiency and an impressive ~99% of the open-circuit voltage. The IZO-based substrate device on the other hand performed at $\sim$ 69 % retained efficiency. The crucial role of front interfaces is highlighted by the two contacts used here. The results in this work show promise for the development of highly efficient substrate CdTe:As devices.

Determining the thermodynamic conditions in MOCVD growth of II-VI semiconductor materials is not as straightforward as in III-V growth where Group V hydrides are generally used. This paper establishes a technique, using in situ laser reflectometry, to ensure that the thermodynamic equilibrium is under metal saturated growth. This has been applied to the arsenic doping of CdTe solar cells where it was shown that increasing the II/VI precursor ratio resulted in an increase in As dopant incorporation. The growth kinetics were determined by the diisopropyl tellurium (DIPTe) concentration for II/VI precursor ratios above 2. A method is presented where the change in II/VI precursor ratio can be predicted for different positions in a horizontal MOCVD chamber that has, in turn, enabled variation in NA and the solar cell open circuit voltage (Voc) to be determined as a function of the II/VI precursor ratio. This gives new insight to the thermodynamic drivers in MOCVD growth for improved solar cell Voc and is a method that could be applied to MOCVD of other II-VI semiconductors.

Incorporating transparent n-type buffer layers in the CdTe photovoltaic device structure has led to significant efficiency improvements. In this study, we report on the use of ZnO buffer layers to achieve high device efficiencies. The 50 nm and 100 nm thick buffer layers were deposited on 3.8 mm thick NSG TEC™ 15 glass substrates and then fabricated into arsenic doped CdSeTe/CdTe devices using First Solar's absorber. The device incorporating the 50 nm ZnO buffer layer achieved an efficiency of 19.5 % without the addition of an anti-reflective coating. Results show that the highly efficient ZnO based devices are stable and do not develop the anomalous J - V behavior frequently observed with MgZnO buffer layers. While intrinsic ZnO buffers can be used to fabricate high efficiency devices, the performance is limited by interface recombination.

Microstructural analysis of high efficiency thin film CdTe solar cells has been obtained over large areas. Analysis regions are device cross-sections approximately 0.325 mm in length. The samples have been prepared using a xenon-plasma focused ion beam (Xe- PFIB). The detailed images of the microstructure were obtained using backscattered electron imaging and electron backscatter diffraction (EBSD). As deposited devices and those with a low level of cadmium chloride treatment both show strong (111) growth texture. A high density of twins is seen in the columnar grains. Three As doped FTO/CdZnS/CdTe with varying process conditions we devices with 13.1 %, 16.3% and 17% conversion efficiency were investigated. Lowest efficiency device was CdCl 2 treated at 420°C for 10 minutes while the 16.3 and 17% devices were both treated at 440°C for 10 minutes. The large area analysis revealed a partial recrystallisation state in the 16.3% efficient device which was induced by an incomplete chloride activation process. The analysis confirms that the efficiency of the devices tends to correlate with grain size. It also showed that a strong correlation exists between device efficiency and the randomization of the texture away from the (111) grain orientation. EBSD can be used to survey large areas and to mark out features for more detailed analysis using transmission electron microscopy (TEM). As an example, we show how using an EBSD scanned cross-sectional area can identify a partially recrystallized region which is then extracted and analyzed in detail using TEM.

Thin film CdSeTe/CdTe solar cells have achieved > 22 % record efficiency and generated solar electricity at a cost as low as 3 US cents per kW.hr in large scale utilities. In this work, the use of ZnO based n-type emitters is considered with the aim of improving the thin film CdSeTe/CdTe photovoltaic device efficiency still further. The measured conduction band offsets (CBOs) between ZnO and CdSeTe are determined to be in the “cliff” conformation. These CBOs will be optimized to achieve a “spike” conformation by incorporating suitable dopants to achieve high device efficiency. This work identifies new pathways to highly efficient ZnO based n-type emitters for arsenic doped CdTe solar cells. In particular, we have identified Sn, Ce and Cs as suitable dopants to generate the preferred ‘spike’ in the band alignment between the emitter layer and the CdSeTe absorber. Suitably doped emitter layers will be used in device research to reduce the deficit in open circuit voltage.

In-situ Cd-saturated growth of polycrystalline CdTe:As thin film was performed by metal organic chemical vapour deposition at a low temperature of 350 °C, to investigate the impact on As doping and device V OC . Device characterization showed conversion efficiency of ∼14%, and V OC of 772 mV, which is an improvement to the baseline device with CdTe:As absorber layer grown at 390 °C under non-saturated conditions. When the low temperature Cd-saturated growth was combined with chlorine heat treatment at a higher temperature of 440 °C (in contrast with the standard 420 °C) for 10 min, device efficiency improved to ∼17% with a high V OC of 877 mV. As a result, ∼100 mV boost in V OC from baseline is demonstrated with Cd-saturated CdTe:As device. Micro-photoluminescence and time-resolved photoluminescence measurements performed on these Cd-saturated CdTe:As devices confirmed that minority carrier lifetime significantly improved.