In this paper, significant improvement in cascode LNA performance is demonstrated by using a new high self gain (HSG) common gate (CG) transistor. Emphasis has been on making the output conductance gds lower and flatter with drain bias. A prototype cascode LNA is designed and fabricated using the developed HSG device in state-of-the-art 0.13 RF SOI technology. Thanks to the HSG device, more than +5 dBm input inter-modulation product (IIP3) improvement is seen in measurements. Very high gain of 19.5 dB at 2.5 GHz with IIP3 value of +1.5 dBm are seen in measurements. Due to optimized transistor sizing, the designed LNA operates at low power of 6.25 mW where 5.2 mA of current is drawn from 1.2 V supply. With integrated high quality factor inductors on high resistivity SOI substrate, the LNA also demonstrates very low noise figure of 0.85 dB. Furthermore, excellent correlation between model simulations and measurements is demonstrated.

Integration of high performance switch with Low Noise Amplifier (LNA) devices results in state of the art performance for 5G Front End Module applications. Here we review switch+ LNA performance metrics and its evolution over the last 10 years and highlight directions for the future.

Shallow trench isolation (STI) plays an important role in preventing current leakage between active semiconductor regions and enables the industry to scale device density. STI is created early during the device fabrication process, before transistors are formed. There are mainly two ways to create the isolation: through oxide growth between active shapes (referred to as LOCOS), and by etching the trenches, filling with dielectric and removing the excessive dielectric using chemical-mechanical planarization, which is a CMP based STI technique. CMP STI can be done in 3 ways namely direct, mask aligned (Process A) and self-aligned (Process B).

We present a monolithic CMOS Integrated Nano Photonic transmitter with a link sensitivity comparable to a 25 Gb/s commercial reference transmitter, exhibiting a 5.2 dB extinction ratio, 4.9 dB insertion loss, and error free operation up to 32 Gb/s.

Over the past few years, CMOS Silicon-oninsulator (SOI) has emerged as the dominant technology for RF switches in RF front end modules for cell phones and WiFi. RF SOI technologies were created from silicon processes originally used for high speed logic applications, but the technology was modified to meet the performance needs of RF switches. The RF SOI technologies have been improved to follow the evolving system requirements for insertion loss, isolation, voltage tolerance, linearity, integration and cost. In this paper, the performance results of the latest generations of RF SOI switch technologies from IBM are reviewed and technology elements that contribute to improved performance are discussed. Future improvements are also discussed.

We present a 16-Gb/s transmitter composed of a stacked voltage-mode CMOS driver and periodic-loaded reverse biased pn junction Mach-Zehnder modulator. The transmitter shows 9-dB extinction ratio and 10.3-pJ/bit power consumption and operates with 1.3 μm light. Penalties as low as 0.5 dB were seen as compared to a 25-Gb/s LiNbO 3 transmitter with both a monolithic metal-semiconductor-metal receiver and a reference receiver at 16-Gb/s operation. We also present an analytic expression for relative transmitter penalty (RTP), which allows one to quickly assess the system impact of design parameters such as peak-to-peak modulator drive voltage, modulator figure of merit, and transmitter extinction ratio to determine the circumstances under which a stacked CMOS cascode driver is desirable.

We present the electrical characteristics of the first 90nm SiGe BiCMOS technology developed for production in IBM's large volume 200mm fabrication line. The technology features 300 GHz fT and 360 GHz fMAX high performance SiGe HBTs, 135 GHz fT and 2.5V BVCEO medium breakdown SiGe HBTs, 90nm Low Power RF CMOS, and a full suite of passive devices. A design kit supports custom and analog designs and a library of digital functions aids logic and memory design. The technology supports mm-wave and high-performance RF/Analog applications.