Crack-free Sm-doped Bi2Ti2O7 (Sm:BTO) thin films with strong (111) orientation have been prepared on Pt (111) substrates using a chemical solution deposition (CSD) method. The structural properties and crystallizations were studied by X-ray diffraction. The surface morphology and quality were examined using atomic force microscopy (AFM). The insulating and dielectric properties were also evaluated at room temperature. The results demonstrate that the Sm:BTO films exhibit improved electrical performances as compared to the pure Bi2Ti2O7 thin films and suggest a strong potential for utilization in microelectronics devices.

We report a mechanism for controlling conductance in polymer nanostructures. Poly(3-dodecylthiophene-2,5-diyl) (PDDT) nanostructures were directly written between gold electrodes using thermal dip pen nanolithography and then characterized in UHV. We find that the conductivity of a PDDT nanostructure can be increased by more than five orders of magnitude (from <10−4 to 10 S cm−1) by exposure to energetic electrons, and then repeatedly returned to a semi-insulating state by subsequent exposure to hydrogen. Based on systematic measurements complemented by calculations of electronic structure and electron transport in PDDT, we conclude that the conductance modulation is caused by H desorption and reabsorption. The phenomenon has potential applications in hydrogen sensing and molecular electronics.

The authors describe a Pd/Ru/Au Ohmic contact with enhanced thermal stability over the more commonly used Pd/Pt/Au Ohmic contact for InAlSb/InAs high electron mobility transistors. Transmission electron microscopy shows that reaction between Pd and the semiconductor begins in samples even before they are annealed. Decreases in contact resistance are correlated with increasing reaction between Pd and the semiconductor for annealing and aging at 175–225 °C for 3 h or 1 week. Small voids form in severely aged samples but do not increase the contact resistance. The Ru diffusion barrier is never observed to react with any other materials in either the contact or the semiconductor, and Au remains isolated from the Pd-bearing reaction products and semiconductor.

A wafer-level-packaging technology was used to integrate the 0.1 mum AlSb/InAs HEMT low-noise amplifiers with power amplifiers, switches and phase shifters to form a compact tri-stack transmit/receive module for light-weight and ultralow-power applications. The high manufacturability of AlSb/InAs HEMT receivers operating at 0.9 mW was demonstrated on a tri-stack wafer. This demonstration of manufacturable tri-stack transmit/receive modules is essential for phased-array applications requiring light weight and ultralow power.

We report the thermal stability of Pd/Pt/Au Ohmic contacts to InAlSb/InAs high electron mobility transistors. An initial drop in contact resistance correlates with consumption of the InAs electron channel through reaction of both Pd and Pt with the semiconductor heterostructure during a 3 h 175 °C anneal, as determined using transmission electron microscopy. Voids form in the unreacted Pt layer after samples are aged for 1 week at 175 °C, and they grow larger when the samples are aged for 1 week at 200 °C. The contact resistance increases by more than a factor of 2 after samples are aged for 1 week at 225 °C. We discuss the degradation of the contact resistance in light of the interfacial reactions that occur during aging.

2009 International Conference on Solid State Devices and Materials,High Performance High-K Metal-Gate Poly-Si TFTs with Subthreshold Swing < 200 mV/dec for Monolithic 3D Integrated Circuits Applications

Ferroelectric Bi3.5Sm0.5Ti3O12 (BST) thin film has been grown on n-type Si (100) substrate by chemical solution deposition and spin coating technique. X-ray diffraction and atomic force microscope analyses confirmed that the film crystallized well at 700°C. Metal-ferroelectric-semiconductor (MFS) configuration has been fabricated using BST as ferroelectric layer. The electrical measurements were conducted in MFS capacitor. The current–voltage characteristic displayed good insulating properties. Apparent counterclockwise hysteresis of capacitance–voltage curve for this film as the ferroelectric hysteresis was observed. The measurements of dielectric constant and dissipation factor as a function of frequency exhibited excellent dielectric properties. The MFS structure can be valuable for ferroelectric-gate field effect transistor.

Wafer-level-packaging (WLP) AISb/InAs HEMT receivers have been developed for lightweight and ultralow-power applications. To warrant successful insertion of WLP AISb/InAs HEMT receivers for military and space applications, highreliability demonstration is essential. In this study, we performed three-temperature lifetesting to evaluate the reliability performance of WLP AlSb/InAs HEMT receivers. For the first time, the high-reliability performance of WLP AISb/InAs HEMT receivers was demonstrated. The results show a median time to failure (MTF) of approximately I.98x10 6 hours at T junction of 85 °C with activation energy (Ea) of approximately 1.87 eV. High-reliability performance is essential for successful insertion of WLP AISb/InAs HEMT receivers for military and space applications with light-weight and ultralow-power requirements.

Four types of gate metallization were investigated to evaluate the manufacturability of 0.1 mum AlSb/InAs HEMTs. It has been found that device performance strongly depends on the gate metallization. This information is essential for the manufacturability of 0.1 mum AlSb/InAs HEMTs for ultralow-power applications.

The degradation mechanisms of 0.1 mum AlSb/InAs HEMTs subjected to elevated-temperature lifetesting at three temperatures in N 2 atmosphere were investigated. Device degradation exhibits the increase of non-pinch-off drain current (I DS ), the decrease of transconductance (g m ) and the gate current (I G ) increase. The I G increase was found to correlate with material degradation on the gate-recess and Al 0.7 Ga 0.3 Sb-mesa-floor surfaces. Higher oxygen content was detected on these surfaces, indicating that they were modified by oxidation, which resulted in the I G increase. Despite the degradation observed in 0.1 mum AlSb/InAs HEMTs, the three-temperature lifetesting shows that the activation energy (E a ) is approximately 1.5 eV and demonstrates a median time to failure (MTF)of 2times10 6 hours at T junction of 85degC. This reliability result is essential for successful insertion of AlSb/InAs HEMTs into systems with ultralow-power requirements. Moreover, ohmic-metal lateral diffusion of Pd and Au elements was observed. To avoid potential ohmic-metal-lateral-diffusion induced device failure, lifetesting temperatures were kept below 190degC in this investigation.

-A 0.1 mum n+-InAs-AlSb-InAs MMIC technology was developed for phased-array applications requiring ultralow power consumption. An n doped cap layer was utilized to provide lower access resistance and to reduce detrimental effects of cap layer etching during the process. As a result, the performance and manufacturability can be enhanced. In this work, we have demonstrated excellent DC and RF uniformity on both devices and low-noise amplifiers (LNA) using 0.1 mum n+-InAs-AlSb-InAs HEMTs on 3-inch GaAs substrates. In addition, the LNAs also demonstrate excellent RF performance while operating at ultralow power (~1 mW). This accomplishment is crucial for phased-array applications requiring ultralow power dissipation.

This paper describes the implementation of a fully integrated antenna front-end that leverages Northrop Grumman Space Technology's (NGST's) novel wafer level packaging technique to marry the optimal technology per function through the bonding of III-V wafers. To demonstrate the proposed approach, a 4-element Q-band linear array has been assembled and tested to validate the concept.

A thin-film bilayer structure consisting of polycrystalline Bi0.5Nd0.5Ti3O12 (BNdT) and preferential (111)-orientated Bi2Ti2O7 (BTO) has been prepared on n-type Si (100) substrate by a chemical solution deposition and spin-coating technique. The crystallization of BNdT film can be enhanced and the surface consists of larger grains because of the intervention of BTO. We fabricated the Au/BNdT/BTO/Si and Au/BNdT/Si structures, respectively. Compared with BNdT, the BNdT/BTO film shows better insulating and memory properties. The room temperature resistivity is 10(11) Omega cm. at a dc bias of 5 V The C-V hysteresis curve is referred to as polarization-type switching and the memory window is about 3 V. All these results show that the BTO is an effective diffusion-barrier and plays a brilliant role as a seeding layer. (c) 2007 Elsevier B.V. All rights reserved.

The electrical and the optical properties of In2O3-ZnO (IZO) films grown by using the pulsed dc magnetron sputtering method are investigated. We find that the average transmittance of the films in the visible range becomes over 85% and that the optical band gap is about 3.3 eV, irrespective of the repetition frequency. The X-ray diffraction patterns for the film with a Zn content of 22 at.% show the crystalline structure to be amorphous. The growth rate and the sheet resistance of the film are shown to increase with increasing repetition frequency. Also, in a range of relatively thin thickness, the films grown with higher repetition frequency have higher refractive indices while, in the range of relatively thick thicknesses, the refractive index is nearly independent of the frequency.

A 0.1 mu m In0.2Al0.8Sb-InAs HEMT MMIC technology was developed for phased-array applications with ultralow-power and oxidation-free requirements. An In0.2Al0.8Sb layer was utilized to replace the upper AlSb layer in the conventional AlSb-InAs HEMT in order to mitigate the oxidation incurred by the AlSb layer. In this work, we have demonstrated excellent dc and rf performance on both devices and low-noise amplifiers (LNAs) using 0.1 mu m In0.2Al0.8Sb-InAs HEMTs on 3-inch GaAs substrates. This accomplishment is crucial for phased-array applications with ultralow-power and oxidation-free requirements.

Three-temperature lifetesting was performed to evaluate the reliability performance of 0.1 μm AlSb/InAs HEMT low noise amplifiers (LNAs) for ultralow-power applications. For the first time, the reliability performance of 0.1 μm AISb/lnAs HEMT LNAs was demonstrated. The results show a median time to failure of approximately 2x106 hours at Tjunction of 85°C with activation energy of 1.5 eV. High-reliability performance is essential for successful insertion of 0.1 μm AISb/lnAs HEMT LNAs for military and space applications with ultralow-power requirements.

The authors demonstrate a silicon-based single-electron transistor (SET) in the few-electron regime. Our structure is similar to a metal-oxide-semiconductor field-effect transistor. The substrate, however, is undoped and could be isotope enriched so that any nonuniformity and spin decoherence due to impurity and nuclear spins can be minimized. A bilayer-gated configuration provides flexibility in manipulating single electrons. The stability chart measured at 4.2K shows diamondlike domains with a charging energy of 18meV, indicating a quantum dot of 20nm in diameter. The benefits of using this enhancement-mode SET in silicon and its potential application for scalable quantum computing are discussed.