Discusses developments which offer scenarios that, to some military strategists, would justify the use of nuclear weapons. The sorts of nuclear weapons likely to figure into war planners' recommendations are much smaller than those designed to wipe out entire cities, and they would be targeted at hardened, isolated military installations. Broadly speaking, nuclear weapons fall into two categories. Strategic weapons have explosive yields in the range of several hundred kilotons up to several megatons. Tactical weapons have much lower yields, down to a few kilotons. Strategic weapons were meant to destroy an entire city. Tactical nuclear weapons were intended for use at closer range-for example, on a battlefield, perhaps launched by a large artillery cannon.
Ionization and displacement phenomena in semiconducting materials are reviewed. How these basic effects lead to changes in the electrical characteristics of transistors and diodes and the functionality of integrated circuits are discussed. The fundamental radiation limits for various semiconductor technologies are summarized. Recommendations and precautions are given regarding the applicability of various microelectronic technologies to different accelerator environments. >
In this paper the problem of determining a piece-part test program based on system reliability objectives is considered. In particular we show how conventional single-sample plans can be extended to include a demonstration of system reliability by numerical simulation of system tests. A theoretical basis for test planning is suggested which may be of use to both producers and consumers of radiation hardened piece parts.
The authors observed that neutron-induced fission of uranium contaminants present in alumina ceramic package lids results in the release of fission fragments that can cause hard errors in metal-nitride-oxide nonvolatile RAMs (MNOS NVRAMs). Hard error generation requires the simultaneous presence of (1) a fission fragment with a linear energy transfer (LET) greater than 20 MeV/mg/cm/sup **2/ moving at an angle of 30 degrees or less from the electric field in the high-field, gate region of the memory transistor, and (2) a WRITE or ERASE voltage on the oxide-nitride transistor gate. In reactor experiments, they observe these hard errors when a ceramic lid is used on both MNOS NVRAMs and polysilicon-nitride-oxide (SNOS) capacitors, but hard errors are not observed when a gold-plated kovar lid is used on the package containing these die. They mapped the tracks of the fission fragments released from the ceramic lids with a mica track detector and used a Monte Carlo model of fission fragment transport through the ceramic lid to measure the concentration of uranium present in the lids. The authors' concentration measurements are in excellent agreement with other's measurement of uranium concentration in ceramic lids. The authors' Monte Carlo analyses also agree closely with theirmore » measurements of hard error probability in MNOS NVRAMs.« less