The authors observed that neutron-induced fission of uranium contaminants present in alumina ceramic package lids results in the release of fission fragments that can cause hard errors in metal-nitride-oxide nonvolatile RAMs (MNOS NVRAMs). Hard error generation requires the simultaneous presence of (1) a fission fragment with a linear energy transfer (LET) greater than 20 MeV/mg/cm/sup **2/ moving at an angle of 30 degrees or less from the electric field in the high-field, gate region of the memory transistor, and (2) a WRITE or ERASE voltage on the oxide-nitride transistor gate. In reactor experiments, they observe these hard errors when a ceramic lid is used on both MNOS NVRAMs and polysilicon-nitride-oxide (SNOS) capacitors, but hard errors are not observed when a gold-plated kovar lid is used on the package containing these die. They mapped the tracks of the fission fragments released from the ceramic lids with a mica track detector and used a Monte Carlo model of fission fragment transport through the ceramic lid to measure the concentration of uranium present in the lids. The authors' concentration measurements are in excellent agreement with other's measurement of uranium concentration in ceramic lids. The authors' Monte Carlo analyses also agree closely with theirmore » measurements of hard error probability in MNOS NVRAMs.« less