Defects intrinsic to synthetic transition metal dichalcogenide (TMD) monolayers, such as bilayer islands, grain boundaries, and point defects, degrade performance of future electronic and optical devices based on these novel semiconductors. Such defect types are often both difficult to detect and modify via standard methods in high-volume semiconductor manufacturing. Herein, we demarcate and modify individual defect types in the prime n-type TMD material, molybdenum disulfide (MoS 2 ), through a manufacturable approach based on chlorine gas (Cl 2 ) across industry-standard substrate sizes (300 mm). Cl 2 preferentially reacts with defects such as exposed MoS 2 crystal domain edges, resulting in the selective etching of MoS 2 bilayer islands and grain boundaries. By exploiting different reaction pathways and associated activation energies, a selectivity window opens for universal monolayer thickness and defect control in single-crystalline group-VI TMDs. Furthermore, co-injecting a chalcogen precursor (such as hydrogen sulfide, H 2 S) shifts the reaction equilibrium to disfavor etching while simultaneously promoting defect healing. Complementary optical characterization confirms passivation/healing of point defects and Cl incorporation into the lattice. As a result of these treatments, the value and variability of various device metrics such as the on-state current, carrier mobility, threshold voltage and subthreshold swing of MoS 2 field effect transistors improved by ~ 20–80% due to the removal of bilayer scattering and the passivation/healing of PD. The proposed concept of selective and tunable etching and chlorination presents a fast and atomically-controlled approach to demarcate and reduce defects in TMD semiconductors and to ultimately selectively dope from a chemical vapor, compatible with most advanced semiconductor fabrication plants.

Wafer scale transition metal dichalcogenides (TMDCs), MoS2 and WS2 multilayers grown by metalorganic chemical vapor deposition (MOCVD) on template AlN/sapphire(0001) substrates were characterized by azimuthal reflection high-energy electron diffraction (ARHEED). Each TMDC has a small lattice mismatch (< 2 %) with AlN. The atomic force microscopy images show features of multilayers. The ARHEED patterns from MoS2 on AlN and WS2 on AlN show stripes, spots, and short arcs. The periodic intensity modulations of spots provides lattice parameters of TMDCs and AlN. The 2D maps constructed from ARHEED patterns show additional intensity spots between adjacent hk lattice sites of the 6-fold symmetry of epitaxial MoS2 and WS2. The locations of these additional intensity spots also depend on the values of momentum transfer of diffracted electron wavevectors. These spots are from MoS2 and WS2 multilayers and AlN nanocrystals. These findings indicate co-existence of TMDCs multilayers and AlN nanocrystals. The finding of heteroepitaxy TMDCs multilayers beyond monolayer broadens the applications of ARHEED and serves as a first step towards optimizing growth conditions for the TMDC multilayer as a buffer layer for the growth of detachable and flexible AlN epitaxial film under the concept of van der Waals epitaxy.

Contact engineering for two-dimensional (2D) field effect transistors (FETs) has advanced rapidly, with near-quantum-limit contact resistances (R_C) now reported for top contacts formed by physical vapor deposition (PVD) techniques. However, top contacts are inherently scaling-unfriendly because they are limited by transfer-length (L_T). As contact length (L_C) shrinks below L_T, current crowding inflates R_C, constraining footprint scaling. Furthermore, this contact geometry is also ill-matched to stacked nanosheet and gate all around (GAA) transistor technology, which demands tier-addressable, minimal-footprint contacts, i.e., edge contacts. Early reports on edge contact to 2D materials involve PVD approaches with minimal control on the contact/2D interface. Here we introduce a scalable, chemistry-defined edge-contact platform based on atomic layer deposition (ALD) of metallic transition-metal chalcogenides, which exploits the intrinsic reactivity contrast between inert 2D basal planes and under-coordinated edges. Using ALD-grown TiS2 as a prototype, we form conformal edge contacts to wafer-scale monolayer MoS2, WS2, MoSe2 and WSe2, as well as to a multi-tier MoS2 nanosheet stack, illustrating natural compatibility with 2D GAA geometries. For TiS2–MoS2 edge contacts we obtain a contact resistance of ~130 kΩ·µm, consistent with a Schottky barrier of ~0.43 eV, and establish wafer-scale reproducibility through statistics on 100 n-type and 100 p-type devices. First-principles quantum-transport calculations both reproduce the measured barriers and identify alternative ALD-compatible metals that approach near-ohmic edge injection, while revealing that mode matching and edge termination are as critical as band alignment. Finally, complementary inverters assembled from MoS2/WSe2 edge-contacted FETs demonstrate functional logic with well-defined gain, noise margins and static power, positioning ALD-engineered edge contacts as a practical route to high-density 2D CMOS and 3D-integrated nanosheet technologies.

Over the past two decades, 2D materials have rapidly evolved into a diverse and expanding family of material platforms. Many members of this materials class have demonstrated their potential to deliver transformative impact on fundamental research and technological applications across different fields. In this roadmap, we provide an overview of the key aspects of 2D material research and development, spanning synthesis, properties and commercial applications. We specifically present roadmaps for high impact 2D materials, including graphene and its derivatives, transition metal dichalcogenides, MXenes as well as their heterostructures and moiré systems. The discussions are organized into thematic sections covering emerging research areas (e.g., twisted electronics, moiré nano-optoelectronics, polaritronics, quantum photonics, and neuromorphic computing), breakthrough applications in key technologies (e.g., 2D transistors, energy storage, electrocatalysis, filtration and separation, thermal management, flexible electronics, sensing, electromagnetic interference shielding, and composites) and other important topics (computational discovery of novel materials, commercialization and standardization). This roadmap focuses on the current research landscape, future challenges and scientific and technological advances required to address, with the intent to provide useful references for promoting the development of 2D materials.

Combinatorial optimization of a discrete system with an arbitrary set of constraints is a computationally intensive task typically solved by search algorithms that iteratively explore the solution space. Simulated annealing (SA), a metaheuristic algorithm inspired by physical annealing processes, solves this class of problems by performing a stochastic search wherein thermally modulated acceptance criteria enable probabilistic transitions across high-energy states. This allows the system to escape local minima and progressively converge toward a global optimum, even within complex and non-convex solution landscapes. In this work, we present the hardware acceleration of SA for spatial optimization under constrained environments, specifically targeting drone placement for maximum coverage while avoiding no-fly zones. Stochasticity is introduced through a true random number generator based on two-dimensional (2D) materials, which initializes the system states and drives probabilistic transitions. The system energy is evaluated using a Boolean logic circuit, wherein the acceptance of candidate solutions is governed by a programmable 2D circuit with tunable threshold behavior. This hardware implementation achieves an 1800-fold acceleration compared to exhaustive brute-force trials. Furthermore, simulations of the annealing accelerator reveal that the degree of search acceleration scales favorably with both system size and agent count, demonstrating enhanced efficiency in larger and more complex configurations. This work also underscores the potential of 2D-material-enabled stochastic and programmable hardware for real-time constrained optimization.

In the field of semiconductors, three-dimensional (3D) integration not only enables packaging of more devices per unit area, referred to as 'More Moore'1 but also introduces multifunctionalities for 'More than Moore'2 technologies. Although silicon-based 3D integrated circuits are commercially available3-5, there is limited effort on 3D integration of emerging nanomaterials6,7 such as two-dimensional (2D) materials despite their unique functionalities7-10. Here we demonstrate (1) wafer-scale and monolithic two-tier 3D integration based on MoS2 with more than 10,000 field-effect transistors (FETs) in each tier; (2) three-tier 3D integration based on both MoS2 and WSe2 with about 500 FETs in each tier; and (3) two-tier 3D integration based on 200 scaled MoS2 FETs (channel length, LCH = 45 nm) in each tier. We also realize a 3D circuit and demonstrate multifunctional capabilities, including sensing and storage. We believe that our demonstrations will serve as the foundation for more sophisticated, highly dense and functionally divergent integrated circuits with a larger number of tiers integrated monolithically in the third dimension.

The semiconductor industry is transitioning to the 'More Moore' era, driven by the adoption of three-dimensional (3D) integration schemes surpassing the limitations of traditional two-dimensional scaling. Although innovative packaging solutions have made 3D integrated circuits (ICs) commercially viable, the inclusion of through-silicon vias and microbumps brings about increased area overhead and introduces parasitic capacitances that limit overall performance. Monolithic 3D integration (M3D) is regarded as the future of 3D ICs, yet its application faces hurdles in silicon ICs due to restricted thermal processing budgets in upper tiers, which can degrade device performance. To overcome these limitations, emerging materials like carbon nanotubes and two-dimensional semiconductors have been integrated into the back end of silicon ICs. Here we report the M3D integration of complementary WSe2 FETs, in which n-type FETs are placed in tier 1 and p-type FETs are placed in tier 2. In particular, we achieve dense and scaled integration through 300 nm vias with a pitch of <1 µm, connecting more than 300 devices in tiers 1 and 2. Moreover, we have effectively implemented vertically integrated logic gates, encompassing inverters, NAND gates and NOR gates. Our demonstration highlights the two-dimensional materials' role in advancing M3D integration in complementary metal-oxide-semiconductor circuits.

The adoption of three-dimensional (3D) integration has revolutionized NAND flash memory technology, and a similar transformative potential exists for logic circuits, by stacking transistors into the third dimension. This pivotal shift towards 3D integration of logic arrives on the heels of substantial improvements in silicon device structures and their subsequent scaling in size and performance. Yet, advanced scaling requires ultrathin semiconducting channels, which are difficult to achieve using silicon. In this context, field-effect transistors based on two-dimensional (2D) semiconductors have drawn notable attention owing to their atomically thin nature and impressive performance milestones. In addition, 2D materials offer a broader spectrum of functionalities — such as optical, chemical and biological sensing — that extends their utility beyond simple ‘more Moore’ dimensional scaling and enables the development of ‘more than Moore’ technologies. Thus, 3D integration of 2D electronics could bring us unanticipated discoveries, leading to sustainable and energy-efficient computing systems. In this Review, we explore the progress, challenges and future opportunities for 3D integration of 2D electronics. Since the most advanced nodes in silicon are reaching the limits of planar integration, 2D materials could help to advance the semiconductor industry. With the potential for use in multifunctional chips, 2D materials offer combined logic, memory and sensing in integrated 3D chips.

Abstract Three-dimensional (3D) integration is an emerging technology that is revolutionizing the semiconductor industry. On one hand, it enables the packaging of more devices per unit volume, also referred to as “More Moore”, while on the other hand, it empowers multifunctionality, also known as “More than Moore”, both of which are key toward the development of low-cost, energy-efficient, and high-performance smart electronic systems. While silicon-based 3D integrated circuits (ICs) are already commercially available, there is limited effort on 3D integration of emerging nanomaterials such as two-dimensional (2D) materials despite their novel functionalities that may benefit many applications. Here we demonstrate monolithic 3D integration of a large volume (in excess of 600 transistors in each tier) of aggressively scaled field effect transistors (FETs) based on monolayer MoS2 at low-thermal budget (with processing temperature < 185 °C). We also realize 3D circuits and demonstrate multifunctional capabilities including sensing, memory storage, as well as logic gates in any tier across the 3D stack. We believe that our demonstration will pave the path for more sophisticated, highly dense, and functionally divergent ICs with a larger number of tiers integrated monolithically in the third dimension.

Wafer-scale epitaxial growth of semiconducting transition metal dichalcogenide (TMD) monolayers such as MoS 2 , WS 2 and WSe 2 is of significant interest for device applications to circumvent size limitations associated with the use of exfoliated flakes. Epitaxy is required to achieve single crystal films over large areas via coalescence of TMD domains with the same crystallographic direction. The prospects and challenges associated with the epitaxial growth of wafer-scale TMD monolayers and heterostructures for the development of large area 2D devices will be discussed. Metalorganic chemical vapor deposition (MOCVD) has emerged as an enabling growth technology for TMDs due to its ability to achieve a combination of high growth temperatures (>700°C) and large chalcogen overpressures which are needed to obtain stoichiometric epitaxial films. The unique aspects of van der Waals epitaxy of TMDs on sapphire substrates will be presented including the effects of crystallographic orientation of the substrate on nucleation density and domain orientation and the role of surface passivation and steps on domain alignment and defects. Techniques for wafer-scale 2D layer transfer for device integration will be reviewed and applications for wafer-scale TMD monolayers in nanoelectronics, sensing and photonics will be presented.

Abstract Development of low-power and smart vision sensors is critical for many emerging applications including the acceleration of edge intelligence. In this article, we introduce an active pixel sensor (APS) technology with in-sensor compute capability based on atomically thin two-dimensional (2D) semiconducting material such as monolayer MoS2. The presented 2D APS uses only one programmable phototransistor (1T cell), which significantly reduces the area overhead allowing one to fit 900 pixels in ~0.09 cm2. Phototransistors in the array exploit gate tunable persistent photoconductivity to exhibit high responsivity (~3.6×107 A/W), high specific detectivity (~5.6×1013 Jones), spectral uniformity, and high dynamic range (~80 dB) and electrical programmability to achieve fast reset (~ 100 µs) and in-sensor de-noising capabilities. Commonly encountered problems in the field of 2D material based vision sensors are also resolved by showing near-ideal yield and low device-to-device variation in photoresponse owing to high quality growth, damage-free transfer, and relatively clean fabrication process flow. Remarkably, the energy expenditure by 2D APS was found to be miniscule and in the range of hundreds of femto Joules per pixel. We believe, our low-power 2D APS technology with in-sensor image processing capabilities can be transformative for many edge applications.

In-sensor processing, which can reduce the energy and hardware burden for many machine vision applications, is currently lacking in state-of-the-art active pixel sensor (APS) technology. Photosensitive and semiconducting two-dimensional (2D) materials can bridge this technology gap by integrating image capture (sense) and image processing (compute) capabilities in a single device. Here, we introduce a 2D APS technology based on a monolayer MoS 2 phototransistor array, where each pixel uses a single programmable phototransistor, leading to a substantial reduction in footprint (900 pixels in ∼0.09 cm 2 ) and energy consumption (100s of fJ per pixel). By exploiting gate-tunable persistent photoconductivity, we achieve a responsivity of ∼3.6 × 10 7 A W −1 , specific detectivity of ∼5.6 × 10 13 Jones, spectral uniformity, a high dynamic range of ∼80 dB and in-sensor de-noising capabilities. Further, we demonstrate near-ideal yield and uniformity in photoresponse across the 2D APS array.

Atomically thin, 2D, and semiconducting transition metal dichalcogenides (TMDs) are seen as potential candidates for complementary metal oxide semiconductor (CMOS) technology in future nodes. While high-performance field effect transistors (FETs), logic gates, and integrated circuits (ICs) made from n-type TMDs such as MoS2 and WS2 grown at wafer scale have been demonstrated, realizing CMOS electronics necessitates integration of large area p-type semiconductors. Furthermore, the physical separation of memory and logic is a bottleneck of the existing CMOS technology and must be overcome to reduce the energy burden for computation. In this article, the existing limitations are overcome and for the first time, a heterogeneous integration of large area grown n-type MoS2 and p-type vanadium doped WSe2 FETs with non-volatile and analog memory storage capabilities to achieve a non-von Neumann 2D CMOS platform is introduced. This manufacturing process flow allows for precise positioning of n-type and p-type FETs, which is critical for any IC development. Inverters and a simplified 2-input-1-output multiplexers and neuromorphic computing primitives such as Gaussian, sigmoid, and tanh activation functions using this non-von Neumann 2D CMOS platform are also demonstrated. This demonstration shows the feasibility of heterogeneous integration of wafer scale 2D materials.

Natural intelligence has many dimensions, with some of its most important manifestations being tied to learning about the environment and making behavioral changes. In primates, vision plays a critical role in learning. The underlying biological neural networks contain specialized neurons and synapses which not only sense and process visual stimuli but also learn and adapt with remarkable energy efficiency. Forgetting also plays an active role in learning. Mimicking the adaptive neurobiological mechanisms for seeing, learning, and forgetting can, therefore, accelerate the development of artificial intelligence (AI) and bridge the massive energy gap that exists between AI and biological intelligence. Here, we demonstrate a bioinspired machine vision system based on a 2D phototransistor array fabricated from large-area monolayer molybdenum disulfide (MoS2) and integrated with an analog, nonvolatile, and programmable memory gate-stack; this architecture not only enables dynamic learning and relearning from visual stimuli but also offers learning adaptability under noisy illumination conditions at miniscule energy expenditure. In short, our demonstrated "all-in-one" hardware vision platform combines "sensing", "computing", and "storage" to not only overcome the von Neumann bottleneck of conventional complementary metal-oxide-semiconductor (CMOS) technology but also to eliminate the need for peripheral circuits and sensors.

Detecting a potential collision at night is a challenging task owing to the lack of discernible features that can be extracted from the available visual stimuli. To alert the driver or, alternatively, the maneuvering system of an autonomous vehicle, current technologies utilize resource draining and expensive solutions such as light detection and ranging (LiDAR) or image sensors coupled with extensive software running sophisticated algorithms. In contrast, insects perform the same task of collision detection with frugal neural resources. Even though the general architecture of separate sensing and processing modules is the same in insects and in image-sensor-based collision detectors, task-specific obstacle avoidance algorithms allow insects to reap substantial benefits in terms of size and energy. Here, we show that insect-inspired collision detection algorithms, when implemented in conjunction with in-sensor processing and enabled by innovative optoelectronic integrated circuits based on atomically thin and photosensitive memtransistor technology, can greatly simplify collision detection at night. The proposed collision detector eliminates the need for image capture and image processing yet demonstrates timely escape responses for cars on collision courses under various real-life scenarios at night. The collision detector also has a small footprint of ∼40 μm2 and consumes only a few hundred picojoules of energy. We strongly believe that the proposed collision detectors can augment existing sensors necessary for ensuring autonomous vehicular safety.

Wafer-scale synthesis of semiconducting transition metal dichalcogenide (TMDs) monolayers is of significant interest for device applications to circumvent size limitations associated with the use of exfoliated flakes. Promising results have been demonstrated for epitaxial films deposited by vapor phase techniques such as CVD and MOCVD. However, the three-fold symmetry of TMDs such as MoS2 and WSe2, results in two energetically equivalent domain alignments, often referred to as 0o and 60o domains, when grown on substrates such as c-plane sapphire and graphene. The oppositely oriented domains give rise to inversion domain boundaries (IDBs) upon coalescence which exhibit a metallic character and are generally undesirable. In this study, we demonstrate the epitaxial growth of unidirectional TMD monolayers on 2” diameter c-plane sapphire substrates with a significantly reduced density of inversion domains. Steps on the sapphire surface are shown to break the surface symmetry giving rise to a preferred domain orientation. Metalorganic chemical vapor deposition (MOCVD) was used for the epitaxial growth of WSe2 and WS2 monolayers on c-plane sapphire in a cold-wall horizontal quartz-tube reactor. The as-received sapphire substrates, which are miscut ~0.2o toward <112 ̅0>, consist of steps with sub-1 nm step height separated by 50-70 nm wide terraces. A three-step nucleation-ripening-lateral growth process, carried out at temperatures ranging from 850oC to 1000oC, was used to achieve epitaxial films using W(CO)6, H2Se and H2S as precursors in a H2 carrier gas. Nucleation was observed to occur at the terrace edge and the growing domains align epitaxially with the underlying (0001) sapphire lattice. As a result of the nucleation process, the domains grow with a zig-zag edge facing the terrace edge which imparts a preferential direction to the domains. The percentage of domains with a preferred direction ranges from 75%-86% depending on MOCVD growth conditions. Continued lateral growth for times ranging from 10-30 minutes results in fully coalesced TMD monolayers that are epitaxially oriented on the sapphire, as assessed by in-plane x-ray diffraction, with a reduced density of inversion domain boundaries. The results demonstrate the important role of surface structure in nucleation and epitaxial growth of TMD monolayers.

This project provided financial support for early career participants who attended the 19th International Conference on Crystal Growth and Epitaxy (ICCGE-19) which was held jointly with the 19th U.S. Biennial Workshop on Organometallic Vapor Phase Epitaxy (OMVPE-19) July 28-August 2, 2019 at the Keystone Conference Center, Keystone, Colorado USA. ICCGE-19/OMVPE-19 consisted of technical sessions for presentation and discussion of recent research and development activities in all aspects of crystal growth, epitaxy, characterization and applications including both general sessions and special topical symposia. Three specialized symposia were also held in conjunction with the meeting: the 4th Symposium on 2D Materials and other Low Dimensional Materials and Devices, the 2nd Symposium on Epitaxy of Complex Oxides and the 2nd Symposium on Ferroelectric Crystals and Textured Ceramics. There were 639 attendees at the conference from 31 countries, including 50% from the U.S., 20% from Europe, 19% from Japan and 4.5% from China.

Accurately detecting a potential collision and triggering a timely escape response is critical in the field of robotics and autonomous vehicle safety. The lobula giant movement detector (LGMD) neuron in locusts can detect an approaching object and prevent collisions within a swarm of millions of locusts. This single neuronal cell performs nonlinear mathematical operations on visual stimuli to elicit an escape response with minimal energy expenditure. Collision avoidance models based on image processing algorithms have been implemented using analogue very-large-scale-integration designs, but none is as efficient as this neuron in terms of energy consumption or size. Here we report a nanoscale collision detector that mimics the escape response of the LGMD neuron. The detector comprises a monolayer molybdenum disulfide photodetector stacked on top of a non-volatile and programmable floating-gate memory architecture. It consumes a small amount of energy (in the range of nanojoules) and has a small device footprint (~1 µm × 5 µm).