We present a system-level integration of active silicon photonic biosensors. With on-chip photodetectors, sensors are characterized in the photovoltaic mode. A biotin-avidin affinity assay is employed to exemplify the detection of small molecule interactions, showing a detection limit in the order of 10 -5 M.

Novel sub-wavelength silicon photonic waveguides for label-free sensors are demonstrated in this article. We use silicon-on-insulator (SOI) waveguides that consist of sub-wavelength grating (SWG) structures, where the waveguides are made of small silicon arrays (180 × 180 nm2 rectangles with 60 nm gaps). They are used to form microring and Bragg grating resonators which measure the change of refractive index by monitoring the resonant wavelength shift. Due to the high surface contact area and low optical confinement of the proposed waveguide, the sensitivity (both bulk and surface) can be significantly increased. The bulk sensitivity of 580 nm/RIU for the microring and 610 nm/RIU for the Bragg grating are better than other recently published resonator sensors. Moreover, a standard biological sandwich assay demonstrates an enhanced surface sensitivity of 2050 pm/nm for both devices. Theoretical models and experimental results are investigated, indicating the predominant losses are from the water absorption at 1550 nm and scattering by sidewall roughness.

Using in-resonator photoconductive heaters to monitor and tune the light intensity inside the resonators, a four-ring Vernier filter is automatically tuned across the entire C-band and stabilized over a 40 °C temperature range.

This work develops an enhanced Monte Carlo (MC) simulation methodology to predict the impacts of layout-dependent correlated manufacturing variations on the performance of photonics integrated circuits (PICs). First, to enable such performance prediction, we demonstrate a simple method with sub-nanometer accuracy to characterize photonics manufacturing variations, where the width and height for a fabricated waveguide can be extracted from the spectral response of a racetrack resonator. By measuring the spectral responses for a large number of identical resonators spread over a wafer, statistical results for the variations of waveguide width and height can be obtained. Second, we develop models for the layout-dependent enhanced MC simulation. Our models use netlist extraction to transfer physical layouts into circuit simulators. Spatially correlated physical variations across the PICs are simulated on a discrete grid and are mapped to each circuit component, so that the performance for each component can be updated according to its obtained variations, and therefore, circuit simulations take the correlated variations between components into account. The simulation flow and theoretical models for our layout-dependent enhanced MC simulation are detailed in this paper. As examples, several ring-resonator filter circuits are studied using the developed enhanced MC simulation, and statistical results from the simulations can predict both common-mode and differential-mode variations of the circuit performance.

While silicon photonic resonant cavities have been widely investigated for biosensing applications, enhancing their sensitivity and detection limit continues to be an area of active research. Here, we describe how to engineer the effective refractive index and mode profile of a silicon-on-insulator (SOI) waveguide using sub-wavelength gratings (SWG) and report on its observed performance as a biosensor. We designed a 30 μm diameter SWG ring resonator and fabricated it using Ebeam lithography. Its characterization resulted in a quality factor, Q, of 7 · 103, bulk sensitivity Sb = 490 nm/RIU, and system limit of detection sLoD = 2 · 10-6 RIU. Finally we employ a model biological sandwich assay to demonstrate its utility for biosensing applications.

Electronic circuit designers commonly start their design process with a schematic, namely an abstract representation of the physical circuit. In integrated photonics on the other hand, it is very common for the design to begin at the physical component level. In order to build large integrated photonic systems, it is crucial to design using a schematic-driven approach. This includes simulations based on schematics, schematic-driven layout, layout versus schematic verification, and post-layout simulations. This paper describes such a design framework implemented using Mentor Graphics and Lumerical Solutions design tools. In addition, we describe challenges in silicon photonics related to manufacturing, and how these can be taken into account in simulations and how these impact circuit performance.

Silicon photonics is a scalable, cost-effective technology for the production of photonic integrated circuits (PICs). The emergence of silicon photonics as a dominant technology for PICs is largely because it leverages decades of investment in design and fabrication technologies for electronic integrated circuits. However, the lithography requirements for photonic and electronic components are importantly different: geometries are generally curved; sidewall roughness is critically important; and, while the feature sizes are generally much larger, photonic device performance can be extraordinarily sensitive to the precise final geometry. For example, rounding of 90 degree corners in y-branches or multimode interferometers can have a dramatic impact on performance. The use of optical proximity correction (OPC) can greatly reduce these problems but does not eliminate them altogether. The designer is therefore faced with the problem of potentially optimizing a component using highly accurate numerical simulations that cannot be manufactured to the desired geometry, leading to a discrepancy between desired and actual performance. To solve this problem, we present a method for designing and optimizing photonic components that are lithography friendly so that the simulated geometry can be readily manufactured. As an example, we consider the case of waveguide Bragg gratings which are particularly challenging to manufacture by lithography.

We present a novel design methodology for silicon photonic integrated circuits (PICs) that integrates Cadence’s Spectre with Lumerical’s INTERCONNECT. It supports parametric analysis of bidirectional, multi-mode PICs, with electrical feedback.

Built around the Virtuoso® custom design platform, an electronic-photonic design environment has been developed, enabling schematic driven design for photonic and electronic circuits, photonic component parameter extraction and model generation, photonic circuit simulation and photonic mask layout implementation for monolithic and hybrid photonic circuits.

Electronic circuit designers commonly start their design process with a schematic, namely an abstract representation of the physical circuit. In integrated photonics on the other hand, it is common for the design to begin at the physical component level, and create a layout by connecting components with interconnects. In this paper, we discuss how to create a schematic from the physical layout via netlist extraction, which enables circuit simulations. Post-layout extraction can also be used to predict how fabrication variability and non-uniformity will impact circuit performance. This is based on the component position information, compact models that are parameterized for dimensional variations, and manufacturing variability models such as a simulated wafer thickness map. This final step is critical in understanding how real-world silicon photonic circuits will behave. We present an example based on treating the ring resonator as a circuit. A silicon photonics design kit, as described here, is available for download at http://github. com/lukasc-ubc/SiEPIC_EBeam_PDK.

Using in-resonator photoconductive heaters to both sense and control the intra-cavity light intensity of microring resonators, automatic tuning of a silicon-on-insulator two-ring Vernier filter is demonstrated across the entire C-band.

A new design concept to improve the quality factor of ring resonators using quarter Bezier curves has been investigated. Quality factor improvements by 3 times have been achieved for a 3-mu m radius ring resonator.

We report on a wave length-selective polarization rotating reflector using a partially-etched asymmetric Bragg grating on a silicon-on-insulator strip waveguide that has a maximum polarization-extinction-ratio greater than 27 dB and a 1-dl! bandwidth of 2.6 nm.

Standard silicon photonic strip waveguides offer a high intrinsic refractive index contrast; this permits strong light confinement, leading to compact bends, which in turn facilitates the fabrication of devices with small footprints. Sub-wavelength grating (SWG) based waveguides can allow the fabrication of low loss devices with specific, engineered optical properties. The combination of SWG waveguides with optical micro-resonators can offer the possibility of achieving resonators with properties different from the traditional SOI rings. One important property that SWG rings can offer is decreased light confinement in the waveguide core; this improves the resonator's sensitivity to changes in the cladding refractive index, making the rings ideal for refractive index sensing applications. In this paper, we present the design and experimental characterization of SWG based rings realized on SOI chips without upper cladding (permitting their use as sensors). The fabricated rings offer quality factors in the range of ~1k-6k, depending on SWG parameters. Based on the comparison of experimental and simulated data we expect sensitivities exceeding 383 nm/RIU in water and 270 nm/RIU in air, showing excellent potential for use in sensing applications.

We demonstrate spiral Bragg grating waveguides (BGWs) on the silicon-on-insulator (SOI) platform for the fundamental transverse magnetic (TM) mode. We also compare TM spiral waveguides to equivalent transverse electric (TE) spiral waveguides and show that the TM spiral waveguides have lower propagation losses. Our spiral waveguides are space-efficient, requiring only areas of 131×131 µm(2) to accommodate 4 mm long BGWs, and, thus, are less susceptible to fabrication non-uniformities. Due to the lengths and reduced susceptibility to fabrication non-uniformities, we were able to obtain narrow bandwidth, large extinction ratio (ER) devices, as narrow as 0.09 nm and as large as 52 dB, respectively. Finally, we demonstrate a 4 mm long TM chirped spiral Bragg grating waveguide with a negative, average, group delay slope of -11 ps/nm.

We experimentally demonstrate apodized focusing subwavelength grating couplers for both the fundamental transverse electric (TE00) mode and the fundamental transverse magnetic (TM00) mode. A measured insertion loss of 3.2 dB with a 1-dB bandwidth of 36 nm has been obtained for the TE00 mode, and a measured insertion loss of 3.3 dB with a 1-dB bandwidth of 37 nm has been obtained for the TM00 mode. Back reflections of -24 dB and -21 dB have been obtained for the TE00 and TM00 modes, respectively.

We demonstrate a 1 cm long Bragg grating filter, on a compact spiral SOI waveguide, for the fundamental transverse magnetic mode, that has a 0.5 nm bandwidth, 40 dB extinction ratio, and 1 dB/cm loss.

We present a vision for photonic circuit simulation within sophisticated EDA-style design flows and the tool development roadmap to achieve it. Our approach aims to deliver highly-usable, predictive capabilities for a variety of use cases, that seamlessly interoperates with 3 rd -party, best-in-class design tools.