This article presents a radar-enabled impulse radio ultrawideband (IR-UWB) system by adopting a self-interference-resistant RF transceiver. It demonstrates that child presence detection (CPD) using IR-UWB radar is feasible through the implementation of a radar system that includes physical (PHY), media access control (MAC), and application (APP) processors. The RF transceiver shows high receiver (RX) sensitivity and high transmitter (TX) peak power with low power. In addition, a radar-dedicated TX is used to improve the TX signal isolation to the RX. To achieve the high RX chain gain and low noise figure (NF) of RX, an RX front end (RX-FE) low-noise amplifier (LNA) and voltage-to-current (V2I) with a 50% duty cycle local oscillator (LO) is implemented. Furthermore, a notch pulse shaping filter (PSF) technique is proposed to meet spectrum emission mask (SEM) specifications with low power consumption. An LNA with wide gain ranges is also proposed to improve the sensitivity and support various applications related to radar and positioning applications. The UWB transceiver achieves -96.5-dBm sensitivity at BPRF 6.81 Mb/s and 14-dBm TX peak power and supports radar operation with UWB channels 5 and 9.

Unlike received signal-strength-indicator (RSSI)-based localization methodology of Wi-Fi and BLE, which have a distance error of several meters or more [1], impulse-radio ultra-wideband (IR-UWB) using narrow pulse width enables accurate distance information within a few centimeters [2]. Additionally, IR-UWB has demonstrated stand-alone radar capabilities [3], enabling expanded radar applications such as child presence detection, augmented reality, and motion sensing. With the expansion of UWB applications, multiple UWB ICs are widely used in various areas such as IoT devices, mobile devices, and automobiles. Consequently, there is growing concern in the market about the potential for these devices to interfere with each other's communication. Furthermore, the channel environment is getting worse as the 6GHz band is becoming increasingly crowded due to both Wi-Fi and cellular New Radio (NR) bands. With the UWB solution of previous works [3], [4] only supporting two channels (ch5 and ch9), there are limitations in handling multiple users effectively. To address these issues, UWB technology needs to support multiple channels to make better use of the channel environment. In addition, to minimize the number of antennas, previous works [3]–[5] have adopted a cost-effective structure that shares TX/RX antennas using RF switches. In [5], external RF switches based on the silicon-on-insulator (SOI) process are used to share TX and RX antennas; however, the use of external RF switches and the system-in-package (SiP) incur additional costs, which can be challenging for mass production. In [3], [4], the RF switches are fully integrated using the CMOS process, but the high insertion loss of the internal RF switch increases RX noise figure (NF), leading to degraded sensitivity.

This paper presents a radar-enabled IR-UWB system by adopting a self-interference resistant RF transceiver. It shows that child presence detection using IR-UWB radar is possible by implementing a radar system including PHY, MAC, and APP processor. RF transceiver shows high receiver sensitivity and transmitter peak power with low power. Furthermore, a radar dedicated transmitter is used to improve the transmitter signal isolation to the receiver. Proposed notch pulse shaping filter is adopted to satisfy the spectrum emission mask specification. Additionally, a low noise amplifier with wide gain ranges is proposed to improve the sensitivity and support various applications such as radar and positioning detection application. The UWB transceiver achieves -96.5 dBm sensitivity at BPRF 6.81 Mb/s and 14 dBm transmitter peak power and supports the UWB channel 5 and 9.

In recent years, precision positioning and secure access technology between indoor and outdoor devices have been attracting attention, and related applications are explosively expanding. In the meantime, a method for estimating a distance using a received signal strength indicator (RSSI) in Wi-Fi and Bluetooth Low Energy has been proposed. However, the method has a technical limitation in that the accuracy error is more than a few meters. Thereby, Ultra-wideband (UWB), compliant with IEEE 802.15.4/4z, is in the spotlight as a promising solution that enables both secure access and accurate ranging within a centimeter accuracy. Owing to these advances in technology, the global UWB market is growing exponentially to support new demands such as internet of things (loT), mobile handsets, smart tags, and smart-car key applications. In order to satisfy these demands and to achieve strong synergy with widespread use, low-cost implementation is essential, so all functions must be integrated into a single chip as a system-on chip (SoC). Prior works have proposed high-data-rate (>1 Gb/s) UWB transceivers [1], [2], but these researches are specialized in certain applications such as loT or bio-networks and do not satisfy the recent atandards. [2], [3] reported low-power transmitters that propose simplified pulse-generation techniques, but they are susceptible to supply voltage and ambient temperature variations, resulting in low sidelobe suppression in the spectrum. A coherent transceiver [4] integrates RF, modem and power-management units (PMU), but RF-FE (SOl) and transceiver (CMOS) are combined in a system-in-package (SiP) with excessive cost overhead.

This article presents a fully integrated ultrawideband (UWB) system-on-chip (SoC) that complies with IEEE 802.15.4/4z standard, providing precise positioning and secure communication capabilities. The proposed UWB SoC includes a radio frequency (RF) transceiver, a modem, a microcontroller unit (MCU), an eFlash, a power management unit (PMU), clock generation IPs, and peripheral blocks. The RF transceiver integrates RF switches and comprises two transmitters and three receivers. The proposed nonuniform quantization digital-to-analog converter (NQ-DAC) is used in the transmitter to enhance the quality of pulse sidelobe, and a receiver I/Q mismatch estimation technique using a double-sideband (DSB) transmitter as a reference is proposed. The UWB SoC operates in the frequencies at 6.5 GHz (Ch5) and 8 GHz (Ch9), achieving a location estimation precision of a few centimeters. The prototype UWB SoC is fabricated in a CMOS 28-nm process, and the experimental results under base pulse repetition frequencies (BPRFs) 6.81 Mbps show a receiver sensitivity of −96.1 dBm and a transmitter output peak power of 14.25 dBm, achieving the state-of-the-art performance. The prototype UWB SoC demonstrates the power consumption of 198.6 mW during transmitter operation and 309.7, 442.5, and 528.9 mW for 1-RX, 2-RX, and 3-RX during packet reception. The proposed UWB SoC architecture and techniques provide a practical and efficient solution for IEEE 802.15.4/4z compliant UWB systems.

This letter presents a two-step SAR ADC that uses coarse and fine comparators with dedicated SAR logics and asynchronous clock generators for each comparator to increase the energy efficiency by optimizing comparators and reduce output loading of the comparators and asynchronous clock generators. The relative offset of the two comparators is calibrated by redundancy-based offset detection and input transistor-transconductance controlled offset correction method without compromising the power. A constant impedance skewed inverter saves reference current with low short circuit current without additional CDAC settling time and logic. The ADC is fabricated in an 8-nm FinFET process, and achieves 63.6-dB SNDR at 250-MS/s while consuming 0.56 mW, resulting in Walden FoM of 1.81 fJ/conversion $\cdot $ step.

This paper presents a SAR ADC that uses coarse and fine comparators with dedicated SAR logics and asynchronous clock generators. The mutual offset of the comparators are calibrated without compromising power consumption and impedance sustained skewed inverters save reference current with low short circuit current without additional CDAC settling time. The ADC achieves 63.6dB SNDR at 250MS/s while consuming 0.56mW, resulting in a 1.81fJ/c.∙s. FoM W .