Stacking multiple SiSiGe channels in advanced logic devices faces severe thermal budget accumulation, which degrades interfaces via Ge-Si interdiffusion and strain relaxation.This strategy lowers the Ge diffusion coefficient to 5.6-7% of its value at 650C (Arrhenius estimate), suppressing interdiffusion and preserving pseudomorphic strain. The 4 + 4 channel stack exhibits clear XRD satellite peaks, fully coherent strain state (reciprocal space mapping), sharp interfaces (1.5-2.6 nm transition width) and low RMS roughness (0.08 nm). Quantitative analysis from bottom to top reveals that prolonged high-temperature exposure broadens bottom interfaces and dilutes Ge concentration (from 20% to 18.5%), while the top stack maintains design targets. This work provides a process-physics understanding of thermal budget effects in multi-channel superlattices and establishes a high-quality material foundation for advanced logic devices beyond 2 nm node.

Spin-orbit-torque devices offer inherent advantages for reconfigurable and energy-efficient computing. However, spin logic schemes rely on hysteretic switching loops and therefore require state resetting, incurring additional power and area costs. Here, we demonstrate the non-resetting reconfigurable spin-orbit torque logic gates, including XOR, NOT, AND, OR and NAND logics. These logic gates are realized by non-hysteretic magnetization switching, which results from symmetry breaking, current induced Neel domain wall motion and all-linear magnetization switching mechanism at designed 0 degrees and 90 degrees lateral interfaces between ion implantation and non-implantation zones. Thanks to the non-hysteresis relationship between output and input during the current-induced magnetic switching, the proposed device in this work do not require resetting before each operation. This non-resetting reconfigurable SOT device holds great potential for high speed, low energy consumption and area-efficient logic-in-memory computation.

Atomically dispersed transition metal sites offer a unique platform to manipulate electronic structure; however, their role in governing photo-induced charge dynamics remains poorly understood. Here, we report the incorporation of Co single atoms into Nb2O5 and systematically elucidate their impact on morphology, local coordination, and light-driven electronic behavior. Advanced microscopy and spectroscopy confirm the formation of isolated Co-O coordination environments without cluster formation. X-ray absorption analysis reveals a partially oxidized Co state with a coordination number of similar to 5, closely resembling the Nb local environment. Under illumination, Co incorporation induces a red-shift in optical absorption and significantly suppresses carrier recombination, as evidenced by photoluminescence and transient absorption spectroscopy. Electron paramagnetic resonance and density functional theory calculations demonstrate that Co atoms act as electron acceptor centers, introducing impurity states near the Fermi level that facilitate charge separation and electron localization. These photo-induced electronic shifts generate an electron-rich surface. This work establishes a direct structure-property relationship for single-atom and highlights how atomic-scale dopants can be leveraged to engineer light-driven electronic processes.

We performed high-field magnetization, magnetocaloric effect (MCE), and NMR measurements on the Ising triangular-lattice antiferromagnet Rb2Co(SeO3)2. The observations of the 1/3-magnetization plateau, the NMR line splits, and the thermal activation behaviors of the spin-lattice relaxation rate 1/T1 between 2 and 15.8 T provide unambiguous evidence of a gapped up–up–down (UUD) magnetic ordered phase. For fields between 15.8 and 18.5 T, the anomaly in the magnetic susceptibility, the slow saturation of the NMR line spectral ratio with temperature, the decrease of the NMR line split with field, and the power-law temperature dependence of 1/T1 provide evidence consistent with a spin supersolid with gapless spin excitations. Further increasing the field, the Grüneisen ratio, extracted from the MCE data, reveals a continuous quantum phase transition at HC ≈ 19.5 T and a universal quantum critical scaling with the exponents νz ≈ 1. Near HC, the large high-temperature MCE signal and the broad peaks in the NMR Knight shift and 1/T1, manifest the strong spin fluctuations driven by both magnetic frustration and quantum criticality.

In this article, for the first time, we proposed one-novel atomic LaOx flip technique to achieve WFM-free multi-V(T)s modulation by a single dipole shifter in CMOS GAA NSFETs. By mitigating the atomic LaOx dipole layer from the down-side HfO2 surface to the up-side, named in the atomic flip dipole technique (AFDT), the dipole force direction is successfully inverted, causing a band-edge impact on p-type work function metal (WFM) modulation, resulting in a linear 4-level V(T)s modulation within a similar to 250mV range of NSFETs. Furthermore, by flip/interfacial hybrid CMOS integration strategy, the 6N+ 6P multi-V-T results were demonstrated, exhibiting precise V-T control. The V-T tuning range is similar to 330mV for GAA nFETs, and similar to 400mV for GAA pFETs, with an average of similar to 66mV/level for nFETs and similar to 80mV/level for pFETs and V-T distribution have been achieved on for WFM-free GAA n/pFETs with less carrier mobility penalty, which provides a promising method to lessen limitations in p-type dipole modulation technology and one lower cost dipole V-T modulation solution for CMOS NSFET integration with higher transistor performance.

High germanium content silicon germanium (SiGe) epitaxy is critical for strain engineering in advanced gate all around (GAA) transistors. This paper demonstrates a physics guided exponential function model that quantitatively links selective epitaxial growth (SEG) parameters to Ge incorporation kinetics in nanoscale trenches. By coupling surface diffusion limited transport, gradient strain, and competitive adsorption dynamics, the model predicts optimal conditions for bottom-up filling with maximal Ge content. For trenches with widths of approximately 60 nm, the optimized process achieved a maximum Ge content of 57.93% and demonstrated 100% selectivity against silicon nitride (SiN) and silicon dioxide (SiO). Cross sectional TEM and EDS analyses reveal a graded Ge profile that minimizes interfacial defects and strain energy. Our results show that the established process physics correlation will significantly facilitate the development of GAA devices with 5nm CMOS technology nodes and beyond.

In this work, we demonstrate a back-end-of-line (BEOL)-compatible seed-iteration-epitaxy (SIE) technique, achieving high-quality Si crystallization with a grain size of 1.83 μm and an integrity factor of 0.9. The SIE technique consists of two sequential steps: (1) grain-filter (GF)-based seed preparation to form high-quality poly-Si seeds and (2) seed-assisted crystallization, where liquid phase epitaxy (LPE)-like growth occurs using the underlying seeds as templates. At the device level, by utilizing the SIE approach, excellent electrical performance is achieved for NMOS, showing ON-OFF current ratio (ION/IOFF) of 2.1 × 107, subthreshold swing (SS) of 82.8 mV/dec, and field-effect mobility (μFE) of 605 cm²/V·s. This approach provides a promising pathway for integrating high-mobility channel materials with potential relevance to future three-dimensional integration and memory applications.

In the extreme environments of high-luminosity colliders, traditional planar silicon sensors suffer severe radiation-induced performance degradation and fail to satisfy the stringent demands of high-precision tracking and high-speed timing in particle physics. 3D silicon sensors enhance radiation hardness by shortening charge collection distance, yet conventional designs with columnar or square-cell trench electrodes exhibit non-uniform electric fields, including saddle points and low-field regions, which degrade charge collection efficiency and timing resolution. This work presents a novel racetrack 3D-trench silicon sensor with continuous racetrack electrodes surrounding a long central collection electrode, aiming to eliminate electric field inhomogeneities. For the first time, a 23 μm shallow-etched device was fabricated on an 8-inch platform, which provides a promising basis for its subsequent mass production and engineering applications. The device performance was systematically evaluated through theoretical analysis, 3D TCAD simulations, and characterization using semiconductor parameter analyzers and transient current technique (TCT) measurements. The sensor achieves leakage current below 0.2 nA, breakdown voltage above 110 V, full depletion voltage as low as a few volts, capacitance as low as 650 fF, collected charge of 4 fC, time response of about 640 ps, and time resolution of 50 ps. This large-scale manufacturable, shallow-etched racetrack 3D-trench silicon sensor provides a competitive device solution for portable radiation detection and next-generation 4D tracking under high-radiation and high-event-rate conditions.

Driven by the exponential growth of artificial intelligence, the internet of things, and cloud computing, the surge in global data generation has intensified the demand for memory technologies that offer high density, ultrafast operation, and low power consumption. While conventional static random-access memory-widely employed as cache memory-faces limitations due to high static power and poor scalability, spin-orbit torque magnetic random-access memory (SOT-MRAM) presents a compelling alternative with its non-volatility, picosecond-scale switching, and ultrahigh endurance, positioning it as a promising candidate for embedded cache applications. However, its widespread adoption has been impeded by the need for an external magnetic field to achieve deterministic magnetization switching. Here, we introduce a field-free switching mechanism via controlled magnetic domain wall (DW) chirality due to time-reversal symmetry breaking. We establish a tensile-strain-mediated easy-cone magnetic anisotropy system in a W/CoFeB/MgO heterostructure, where we control the DW chirality by a one-time magnetic initialization process. The controllable DW chirality breaks time-reversal symmetry and induces deterministic magnetization switching by spin-orbit torque without external field. Fabricated on an industry-standard 300 mm wafer platform, our sub-100 nm SOT-magnetic tunnel junctions achieve near 100% field-free switching probability, a thermal stability factor of 64, endurance exceeding 1012 cycles, a tunnel magnetoresistance of 116%, and robust thermal stability up to 350 degrees C. This work establishes a chirality-mediated switching paradigm that integrates materials innovation with scalable manufacturing, providing a viable pathway toward high-performance, energy-efficient SOT-MRAM for the data-centric era.

Near a quantum critical point (QCP), the low-temperature thermodynamics follow universal scaling laws. Using copper sulfate pentahydrate --- a canonical spin-1/2 antiferromagnetic Heisenberg chain compound--- we report the observation of a universal magnetocaloric effect (MCE) near a field-driven QCP. Remarkably, in the 1D quantum critical regime, we measure the universal magnetocaloric scaling function via adiabatic demagnetization process, which agrees with the analytical solution ΨΓF(x) of critical 1D Fermi gas. This establishes copper sulfate crystal as an ideal platform for studying quantum criticality and universal phenomena. Upon further cooling, our MCE and NMR measurements reveal a dimensional crossover to a 3D quantum critical regime of the Bose-Einstein condensation (BEC) universality class, characterized by the scaling lawTc∝(Bc-B)2/3and a clear data collapse of the magnetic Gr"uneisen ratio with 3D Bose-gas scaling function ΨΓB(x). Practically, this quantum-critical MCE enables cooling to 68.7 mK near the QCP and achieves a lowest temperature of 12.8 mK at zero field without the need for helium-3. Our work identifies a universal MCE in a common compound, establishing this magnon BEC system as a prototypical quantum critical coolant and a platform for next-generation millikelvin refrigeration.

The photothermal conversion of CO2 into selective multi-carbon hydrocarbons remains an unresolved challenge due to the instability of the key intermediates and the high barrier for C-C coupling. Here, we report an atomically integrated Cu-Au heteronuclear catalyst on carbon nitride (Cu-Au/CN) that converts CO2 to ethane (C2H6) with 87% selectivity at a rate of 30 mmol g-1 h-1, maintaining steady performance for over 200 hours and structural integrity for over one year. This catalyst surpasses the existing selectivity benchmarks for photothermal CO2 hydrogenation. The Cu-Au interface induces cooperative electronic asymmetry and charge redistribution, extending carrier lifetimes by over 160%. These effects stabilize the *CO and *CH3 intermediates, lower the C-C coupling barrier, and establish a durable and atomically precise platform for continuous C2 hydrocarbon production toward sustainable CO2 valorization.

In this letter, a work-function metal-free (WFM-free) threshold voltage (VT) modulation scheme is demonstrated in stacked nanosheet gate-all-around (NS GAA) FETs using an in-situ trimethylaluminum (TMA) gas pre-treatment strategy. The TMA-induced Al dipoles effectively compensate the strong La-dipole effect, reducing the VT modulation range by 355 mV for NFETs and 493 mV for PFETs. Nearly linear VT modulation is achieved over 2–9 La2O3 cycles, with average tuning rates of 70.3 mV/cycle and 60.6 mV/cycle for NFETs and PFETs, respectively. Enhanced Ion/Ioff, increased electron and hole effective mobilities, and reduced subthreshold swing (S.S.) and drain-induced barrier lowering (DIBL) are simultaneously achieved, indicating improved carrier transport and electrostatic integrity. This work demonstrates a scalable WFM-free dipole engineering strategy for multi-VT integration in advanced stacked NS GAA FET technologies.

In this paper, we investigate the evolution of hydrogen (H) behavior in back-gated IGZO/HfO2 transistors subjected to low-temperature annealing (200 degrees C in air), focusing on its impact on initial electrical characteristics (I-d-V-g) and positive bias temperature instability (PBTI). For initial electrical performance, a negative threshold voltage shift is observed in the I-d-V-g curve after annealing. Combined with X-ray photoelectron spectroscopy (XPS) analysis, this shift is attributed to an increase in hydroxyl-related hydrogen within the IGZO layer. Regarding device reliability, a model-based decoupling analysis is employed to separate the contributions of electron trapping (e-trapping) and hydrogen doping (H-doping). The results reveal that hydrogen-induced degradation is suppressed by approximately 10.67% to 26.02% after annealing. Based on this, a physical model for H states in IGZO/HfO2 films during annealing was proposed. These results offer new insight into the role of hydrogen in IGZO devices and provide a theoretical and experimental foundation for the optimization of H-doping during process integration.

Three-dimensional sensors have demonstrated excellent performances (radiation hardness, signal collection, detection efficiency, power consumption, etc.) comparable or even better than traditional planar sensors, especially after high irradiation fluences, mainly due to the shorter drift length of the generated carriers. These characteristics have made it the most attractive sensor technology for the detection and track reconstruction of charged particles in high-energy physics (HEP). In addition, its application is also being explored in astronomy, microdosimetry, and medical imaging. This article presents the design and fabrication of a novel 3D trench-column sensor featuring a deep enclosed trench surrounding the central columnar cathode. This novel sensor has been fabricated on the 8-in CMOS pilot line at the Institute of Microelectronics of the Chinese Academy of Sciences (IMECAS) where ultranarrow etch width of 0.5 mu m and an ultrahigh depth-to-width ratio (aspect ratio) (>70) were achieved. Its preliminary simulation and characterization results, including electrostatic potential, electric field, current-voltage (I-V), capacitance-voltage (C-V), and charge collection before irradiation, will be presented in this article.

High specific contact resistivity (ρc) and anneal-induced parasitic resistance (Rparasitic) are major challenges for downscaled DRAM peripheral transistors. Here, the effects of ultra-thin Ti and TiN thickness on the ρc of TiSix/n⁺-Si ohmic contacts and on their thermal stability are systematically investigated as a function of annealing temperature and duration. The results show that ρc is strongly dependent on Ti thickness, whereas it is only weakly affected by TiN thickness. A Ti/TiN bilayer of 50 Å/50 Å achieves ρc on the order of 10⁻⁸ Ω·cm2 after a DRAM-relevant anneal of 750 °C for 30 min. Oxygen gettering and redistribution in the Ti layer are discussed as the primary mechanism responsible for the observed trends.

Multiferroic materials have attracted significant attention for their potential applications in multifunctional spintronic devices. However, conventional multiferroics exhibit limited magnetoelectric coupling, as the magnetic and ferroelectric orders typically arise from distinct and incompatible mechanisms. In this study, we introduce a specific theoretical approach to magnetoelectric coupling that capitalizes on the intrinsic tunability of two-dimensional (2D) materials. Taking the prototypical 2D magnet CrI3 as an example, we demonstrate the following issues: (i) the easy magnetization axis of anti-aligned bilayer CrI3 exhibits an inherent inclination, attributed to crystalline symmetry breaking as determined by interlayer shifts; and (ii) spontaneous sliding ferroelectricity emerges, wherein the reversal of polarization signifies a phase transition between energetically preferable states. These findings reveal a strong interplay among magnetization, polarization, and layer degree of freedom, establishing a stacking-engineering mechanism for multiferroic modulations, further offering innovative insights into realizing magnetoelectric coupling effects and multi-state control paradigm in type-I multiferroic systems.

This work systematically investigates the dissolution behavior of hafnium oxide (HfO2) in 85 wt% phosphoric acid (H3PO4) and proposes a silane-assisted surface passivation strategy for ultra-high selectivity wet etching of silicon nitride (Si3N4) over both silicon oxide (SiO2) and HfO2. Spectroscopic and surface analyses indicate that HfO2 dissolution in hot H3PO4 is closely associated with hydroxyl-mediated phosphate adsorption and inner-sphere complexation. To suppress HfO2 loss, two short-chain silane coupling agents, vinyltrimethoxysilane (VTMS) and allyltrimethoxysilane (ATMS), were introduced into the etchant. These agents passivate the surface by forming a hydrophobic siloxane network, reducing available adsorption sites for phosphate ions. Consequently, ultra-high selectivities of > 1.4 × 10 ³ (1456) for Si3N4 over HfO2 and > 10⁴ for Si3N4 over SiO2 are simultaneously achieved with the addition of 0.1 M VTMS, representing a 22-fold enhancement for Si3N4/HfO2 selectivity compared to that of pure H3PO4. The process was further validated using patterned Si3N4/SiO2/HfO2 multilayer stacks and high-k metal gate air-spacer structures, where the oxide layers were preserved within the resolution of cross-sectional characterization. This work clarifies the dissolution behavior of HfO2 in industrial hot phosphoric acid processes, and provides a potentially extendable surface modification approach for regulating the dissolution behavior of hydroxyl-terminated functional oxides.

stacked Si/Si0.5Ge0.5 nanosheet (NS) field effect transistor (FET) is successfully prepared utilizing a novel structure of compressively strained Si/Si0.5Ge0.5 stack epitaxially grown on a three-layer strain-relaxed buffer (SRB). The above newly structure features superior quality and no obvious defect of three-period Si/Si0.5Ge0.5 stack with thermal stability at 750 degrees C. Meanwhile, this stacked Si0.5Ge0.5 NSFET shows excellent electrical performance and scaling characteristics by achieving an Ion /Ioff ratio of 1.2x105, a subthreshold swing (SS) of 85.7 mV/dec, and a low drain-induced barrier lowering (DIBL) of 13.5 mV/V. Compared with the stacked Si0.7Ge0.3 NSFET using the similar process, its Ion and peak transconductance (gMAX) are enhanced by 26% and 20%, respectively. Peak hole mobility has been improved by 36%. Furthermore, to clarify the factors contributing to the Ion improvement, technical computer-aided design (TCAD) 3-D device simulation is employed. The results show that Ion improvement is achieved by Ge concentration increase and compressive stress provided by the three-layer SiGe SRB. Therefore, the stacked Si/Si0.5Ge0.5 NSFET fabricated on a three-layer SiGe SRB has great potential to further improve pFET performance in the next-generation CMOS logic technology.

The dead-layer at the HfxZr1-xO2 (HZO)/metal interface degrades the morphotropic phase boundary (MPB) effect, thereby limiting permittivity (kappa) enhancement. In this letter, novel ((HZ)(16)Z(8)) (HZZ8) stacks are proposed to realize MPB-HZO, enabling EOT scaling while suppressing interfacial dead-layer. Specifically, 6-nm HZZ8 shows a permittivity of 46 after RTP at 500 degrees C. Moreover, the stronger Zr-O bonding of ZrO2 effectively suppresses TiN-induced oxygen scavenging relative to HfO2. As a result, HZZ8 shows lower TiOxNy and oxygen vacancy (V-o) fractions, leading to reduced leakage current, higher breakdown voltage, and robust kappa-value in MFM capacitors. Thereby, HZZ8 achieves both reduced EOT (1.02/0.7 nm @ 6/3 nm) and leakage (1.5 & times; 10(-7)/5.9 & times; 10(-3) A/cm(2)@ 6/3 nm) in MFIS capacitors. Furthermore, a 6-nm HZZ8 is integrated into GAA-NSFET, showing a 36.3% increase in I-on and an 8.1% reduction in SS relative to a 6-nm-HfO2-based GAA-NSFET, highlighting a promising EOT scaling pathway for HZZ8 in advanced logic nodes.