As an emerging p-type semiconductor, the precise control of process parameters in tin monoxide (SnO) thin-film transistor (TFT) is crucial for their integration into complementary circuits. However, the metastability of Sn2+ ions promotes excessive oxidation to Sn4+ and degrades film morphology, impairing electrical characteristics. This study systematically explores the impact of multidimensional process vectors in enhancing the performance and stability of SnO TFT. By integrating a high- k HfO2 gate dielectric, the gate capacitance per unit area was increased, effectively reducing the threshold voltage. Optimal device performance was achieved at a sputtering power of 50 W and a substrate temperature of 200 degrees C, exhibiting a field-effect mobility of 2.10 cm(2)/V & sdot;s, an ON-OFF current ratio of 1.13 & times; 10(4), a threshold voltage of -0.39 V, and a subthreshold swing (SS) of 0.97 V/dec. Material characterization confirmed a dominant Sn2+ phase with minor Sn-0 content, alongside a continuous, filmed morphology with low surface roughness, collectively contributing to enhanced carrier transport. Moreover, the device demonstrated excellent reliability under negative bias stress (NBS), with a threshold voltage shift of only -0.48 V, attributed to low bulk and interface trap state densities.

Indium gallium zinc oxide (IGZO) thin-film transistors (TFTs) fabricated by atomic layer deposition (ALD) are promising for large flat-panel display technology requiring low thermal budgets (<400 degrees C), which is critical for next-generation displays and back-end-of-line electronics. However, the choice of precursor affects the feasibility of low-temperature processes. In this study, two gallium precursors-triethylgallium (TEGa) and trimethylgallium-were employed to achieve low-temperature fabrication of IGZO TFTs by fully thermal ALD. A high field-effect mobility (mu(FE)) of 40.09 cm(2)/V s was achieved at 250 degrees C for the IGZO TFTs fabricated by TEGa, which has a lower thermal budget than other methods. This performance is attributed to the unique beta-hydride elimination pathway of TEGa, which not only enables low-temperature deposition but also significantly reduces the defect state density in the IGZO films. The TFT devices exhibited excellent stability under a 30-min positive bias stress test, with a threshold voltage shift (Delta V-th) of merely 8 mV. These findings provide a new approach for the low-temperature deposition of metal oxide semiconductor devices.

This study reports N-doped InHfZnO (IHZO:N) thin-film transistors (TFTs) fabricated by all-thermal atomic layer deposition using NH3 as the nitrogen source. The effects of N doping on film properties and device performance were systematically characterized. Optimal N doping produces amorphous IHZO:N films with low roughness and high transparency, where N atoms substitute O sites to form stable Zn-N bonds, effectively passivating oxygen vacancies. Consequently, IHZO:N TFTs with 15 NH3 cycles achieve a field-effect mobility of 17.6 cm2/V & sdot;s, a subthreshold swing of 0.2 V/dec., and a threshold voltage of 0.15 V. They also exhibit excellent thermal stability from 293 K to 353 K, with a threshold voltage shift of only 0.5 V. Temperature-dependent measurements reveal that the 15-cycle device has the lowest density of states, indicating fewer thermally excited carriers and enhanced stability at elevated temperatures. Thus, all-thermal ALD nitrogen doping is an effective strategy to improve TFT performance, enabling high-resolution, fast-response wearable devices and flexible displays.

The doping of two-dimensional (2D) transition metal dichalcogenides (TMDCs) by an approach compatible with circuit integration is crucial. However, ion implantation, the most commonly used method for doping semiconductors, poses significant challenges for 2D-TMDCs because of the requirement for ultralow ion energy and the difficulty of restoring damaged 2D materials. Here, we achieve bipolar transport in intrinsic n-type WS2 monolayers through phosphorus (P) ion implantation using commercial ion implanters. Millisecond flash lamp annealing is employed to remove ion-induced defects and activate P. Experimental results show a clear change in carrier type with increasing ion fluence. Samples implanted with a fluence of 7.5 x 10(12) cm(-2) display ambipolar transport behavior with an on/off ratio of 4.4 x 10(5) and 1.6 x 10(6) for p- and n-branch, respectively. At the same time, the optical and structural properties of WS2 are well preserved. All of these findings not only complement the fundamental understanding of 2D-TMDCs but also provide a possible route for heterointegration of TMDCs into current Si-based semiconductor technologies.

Amorphous indium gallium zinc oxide (a-IGZO) thin films have been investigated to meet the high-resolution demands of augmented reality (AR) and virtual reality (VR) applications. In this study, we report on thin-film transistors (TFTs) derived from fully thermal atomic layer deposition (ALD), using IGZO as the channel layer and Al2O3 as the gate dielectric. By optimizing the deposition sequence and post-treatment processes, we achieved a high field-effect mobility of 52.5 cm(2)/Vs and a steep subthreshold swing of 116 mV/decade. This exceptional performance is attributed to the elevated In2O3 content in the IGZO thin films, which induces a substantial increase in sub-gap states adjacent to the conduction band minimum (CBM) and valence band maximum (VBM) while concurrently reducing the bandgap. At an elevated measurement temperature of 125 degrees C, the device exhibited an enhanced field-effect mobility of 60.4 cm(2)/Vs. These findings offer a new approach for optimizing metal oxide-based electronics.

This study presents the first successful demonstration of growing elemental bismuth (Bi) thin films via thermal atomic layer deposition (ALD) using Bi(NMe2)3 as the precursor and Sb(SiMe3)3 as the co‐reactant. The films were deposited at a relatively low temperature of 100 °C, with a growth per cycle (GPC) of 0.31‐0.34 Å/cycle. Island formation marked the initial growth stages, with surface coverage reaching around 80% after 1000 cycles and full coverage between 2000 and 2500 cycles. Morphological analysis revealed that the Bi grains expanded and became more defined as the number of ALD cycles increased. This coalescence is further supported by X‐ray diffraction (XRD) patterns, which show a preferential shift in growth orientation from the (012) plane to the (003) plane as the film thickness increases. X‐ray photoemission spectroscopy (XPS) confirmed the presence of metallic Bi with minimal surface oxidation. Temperature‐dependent sheet resistance measurements highlight the semimetallic nature of Bi, with a room temperature resistivity of ≈200 µΩcm for the 2500 cycles Bi. Temperature‐dependent sheet resistance was also associated with a transition in carrier‐type dominance from electrons at higher temperatures to holes at lower temperatures.

Amorphous oxide semiconductor thin-film transistors (TFTs) find wide application in display technologies, yet balancing high mobility with temperature stability poses significant challenges. To solve this problem, this work proposes a bilayer indium gallium zinc oxide (IGZO) TFT with 10 nm IGZO deposited via the thermal atomic layer deposition (TH-ALD) as the front channel layer and 20 nm IGZO deposited via RF sputtering as the back channel layer. Compared to single-layer IGZO TFTs of the same thickness prepared via TH-ALD and RF sputtering, the bilayer IGZO TFTs achieve high mobility and high stability compatibility, including a field-effect mobility of 36.2 cm2 Vs-1, an Ion/Ioff of 109, a subthreshold swing of 82 mV dec-1., and a positive bias temperature stress test of 1800 s duration, with a threshold voltage offset (Delta Vth) is only 0.06 V. The performance improvement is mainly attributed to the energy band bending phenomenon at the interface of the heterostructure of the bilayer IGZO, leading to the accumulation of carriers to form a two-dimensional electron gas. This design concept provides an effective solution to the conflict between mobility and stability of ultra-high resolution displays.

In this study, high-k dielectric zirconium aluminum oxide (ZrAlOx) and zirconium oxide (ZrO2) have been fabricated via atomic layer deposition. The effects of Al doping on the capacitance characteristics, leakage performance, surface roughness, and chemical composition of the ZrO2 and ZrAlOx gate insulators are investigated. ZnSnO thin-film transistors (ZTO TFTs) and carbon nanotube (CNT) TFTs have been integrated into the high-k dielectrics. By combining CNT TFTs with ZTO TFTs, complementary metal-oxide-semiconductor (CMOS) inverters have been developed, and the role of Al doping in enhancing the electrical characteristics of both TFTs and CMOS inverters has been investigated. The results show that, compared to CMOS inverters with ZrO(2 )gate insulators, those with ZrAlOx allow carriers to transport more smoothly at the interface and reduce carrier scattering, demonstrating a better performance with a smaller hysteresis (0.21 V), lower power consumption (5.0 x 10(-8) W), higher gain (43.8), and better voltage transfer characteristics. This research provides theoretical support and practical value for the development of next-generation integrated circuits.

Bimetallic Ni/Fe-nanoparticles were developed to enhance the dechlorination reactivity of nano-sized zero-valent iron. The physical structures of Ni/Fe-NPs with an Ni loading ranging from 0.5 wt% to 20 wt% and their structure-dependent reactivity variations towards trichloroethene (TCE) and carbon tetrachloride (CT) were fully investigated. A Ni-accumulated surface was observed for the Ni/Fe-NPs with a high Ni loading (20 wt%), and the structure of the other Ni/Fe NPs was identified as a Ni/Fe alloy-like structure, with the 5 wt% Ni/Fe NPs owning the highest surface area and Fe0 content. While the best CT dechlorination rate was 2.5-fold that of B-nZVI at 5 wt% Ni loading, the best TCE reduction was 12-fold of B-nZVI at a medium Ni loading (3-5 wt%). Given that the primary TCE degradation mechanism was via atomic hydrogen (H*), and the degradation of CT proceeds via direct electron transfer, the more efficient reduction mechanism for the Ni/Fe NP system was preferably H* reduction. The variation in the reduction rate and the by-product yield between the medium loading (3-5 wt%) and low/high (0.5 wt% and 20 wt%) loading was more significant for TCE than CT. It was found that the medium Ni loading (3-5 wt%) obviously boosted the beta-elimination of TCE to VC due to the good storage of H* in the Ni catalyst. The production of H* and enhanced electron migration rate were well demonstrated by the CV curve and Tafel curve, respectively. The location of direct electron transfer and H* catalyst in the bimetallic Ni/Fe system was further discussed.

The atomic layer deposition (ALD) technique has been extensively utilized for depositing metal oxide (MO) thin films, particularly as gate insulators in thin film transistors (TFTs). However, research on MO semiconductors as channel layer materials in TFTs using ALD is limited, especially for fully ALD-fabricated MO TFTs. In this study, fully ALD-fabricated InAlO TFTs were developed, with optimized aluminum doping content and annealing temperature to enhance the electrical properties and stability. The InAlO TFTs, fabricated with a cycle ratio of 15:1 and annealed at 350 degrees C, exhibit superior performance, including a field-effect mobility of 7.2 cm2/V & sdot;s, a subthreshold swing of 165 mV/decade, and an on/off current ratio of 2.3 x 106, with a threshold voltage of only 0.1 V. Additionally, they demonstrated good stability, with a threshold voltage shift of 0.11 V under positive bias stress. The improved electrical properties and stability are attributed to reduced carrier concentration and the inhibition of oxygen defect generation, achieved through appropriate annealing temperatures and aluminum doping. Thus, the development of fully ALD-fabricated high-performance TFTs holds promise for next-generation display technologies as pixel-driving circuits.

Remote epitaxy represents a novel method for the preparation of high-quality epitaxial single crystalline films capable of being transferred onto arbitrary substrates for electronic and flexible functional devices. It was initially applied for semiconductors and later for functional complex perovskite oxides. However, the understanding of the impact of substrate orientation, growth mode, crystallinity and strain relaxation on oxide remote epitaxial systems is still lacking. Lead-free potassium sodium niobate (KNN) thin films have attracted intense interests owing to their superior piezoelectric properties and environment-friendly features. However, the remote epitaxy of KNN has rarely been reported. Therefore, in this study, we present the remote epitaxy of KNN on single-layer graphene-covered SrTiO3 (STO) substrates with different orientations. All STO substrates with three orientations, i.e. (001), (011) and (111), permitted the remote epitaxy of KNN, with STO (001) leading to superior crystallinity. The growth mode of KNN on graphene/STO (G-STO) was found to be Volmer-Weber, with initial island nucleation on the wrinkles of graphene and a subsequent coalescence to complete the growth and obtain flat films. Furthermore, remote epitaxial KNN on G-STO (001) displayed an abrupt interface without pinholes in graphene or layer interdiffusion. The strain relaxation of remote epitaxial KNN films was explored as a function of film thickness, which already underwent partial relaxation due to the weaker substrate clamping effect through graphene but experienced a slight strain increase after island coalescence. These results not only show that the applied material systems for remote epitaxy can be expanded to more complex oxides, but also enrich the understanding of the oxide heteroepitaxy mechanism involving a graphene monolayer, particularly nucleation and strain relaxation.

SnS2 stands out as a highly promising two-dimensional material with significant potential for applications in the field of electronics. Numerous attempts have been undertaken to modulate the physical properties of SnS2 by doping with various metal ions. Here, we deposited a series of Sb-doped SnS2 via atomic layer deposition (ALD) super-cycle process and compared its crystallinity, composition, and optical properties to those of pristine SnS2. We found that the increase in the concentration of Sb is accompanied by a gradual reduction in the Sn and S binding energies. The work function is increased upon Sb doping from 4.32 eV (SnS2) to 4.75 eV (Sb-doped SnS2 with 9:1 ratio). When integrated into photodetectors, the Sb-doped SnS2 showed improved performances, demonstrating increased peak photoresponsivity values from 19.5 A/W to 27.8 A/W at 405 nm, accompanied by an improvement in response speed. These results offer valuable insights into next-generation optoelectronic applications based on SnS2.

In recent years, the downscaling of transistors has sparked considerable interest in the advancement of amorphous oxide semiconductors, particularly indium-hafnium-zinc oxide (IHZO) has remarkable potential in applications such as high-resolution displays and 3D NAND. For the first time, we propose the fabrication of IHZO thin film transistors (TFTs) via thermal atomic layer deposition (TH-ALD). The preparation, electrical properties, and stability of IHZO TFTs are investigated. The performance of TFT deposited at 250 degrees C and annealed in N-2 atmosphere at 300 degrees C exhibits a high field-effect mobility (mu) of 22.53 cm(2)/Vs, a high I-on/I-off of similar to 10(7), a low threshold voltage (Vth) of 0.15 V, and a minimum subthreshold swing (SS) of 0.24 V/decade. Furthermore, the threshold voltage shifts (Delta Vth) in TFTs annealed in N-2 and O-2 are 0.31 and 0.16 V, respectively. These enhancements are attributed to the defects suppression and remaining ionized oxygen vacancies result in increased electron concentration in N-2-annealed films. In comparison, O-2 annealing causes a reduction in field effect mobility but concurrently enhances stability due to the direct passivation of defects, which leads to fewer oxygen vacancies. Additionally, Hf content can also impact the performance of TFT devices, even a small addition of Hf also results in the effective reduction of the carrier concentration. These findings provide valuable insights into the device mechanism of IHZO TFTs, presenting a novel avenue for comprehending and augmenting their overall performance.

Van der Waals (vdWs) heterostructured materials have attracted considerable interest due to their intriguing physical properties. Here, we report on the deposition of BiSe by atomic layer deposition (ALD) using Bi(NMe2)3 and Se(SnMe3)2 as volatile and reactive Bi and Se precursors, respectively. The growth rate varies from 1.5 to 2.0 Å/cycle in the deposition temperature range of 90–120 °C. Higher deposition temperatures lead to increased grain sizes and enhanced crystallinity of resulting films. Further microstructure characterization reveals the formation of crystalline domains with varying orientations and nanotwinned boundaries. The presence of Bi-Bi zigzag bilayers and the formation of the BiSe phase were confirmed by the existence of the Bi-Bi binding energy peak in the XPS spectra and Raman spectra. Furthermore, the electrical conductivity of BiSe ranged from 1420 to 1520 S/cm due to the ultrahigh carrier concentration (2–3.5 × 1021 cm−3), which is the highest among undoped bismuth selenide-based materials.

Nanoscale superlattice (SL) structures have proven to be effective in enhancing the thermoelectric (TE) properties of thin films. Herein, the main phase of antimony telluride (Sb2 Te3 ) thin film with sub-nanometer layers of antimony oxide (SbOx ) is synthesized via atomic layer deposition (ALD) at a low temperature of 80 °C. The SL structure is tailored by varying the cycle numbers of Sb2 Te3 and SbOx . A remarkable power factor of 520.8 µW m-1 K-2 is attained at room temperature when the cycle ratio of SbOx and Sb2 Te3 is set at 1:1000 (i.e., SO:ST = 1:1000), corresponding to the highest electrical conductivity of 339.8 S cm-1 . The results indicate that at the largest thickness, corresponding to ten ALD cycles, the SbOx layers act as a potential barrier that filters out the low-energy charge carriers from contributing to the overall electrical conductivity. In addition to enhancing the scattering of the mid-to-long-wavelength at the SbOx /Sb2 Te3 interface, the presence of the SbOx sub-layer induces the confinement effect and strain forces in the Sb2 Te3 thin film, thereby effectively enhancing the Seebeck coefficient and reducing the thermal conductivity. These findings provide a new perspective on the design of SL-structured TE materials and devices.

We developed a water-free atomic layer deposition (ALD) process to homogeneously deposit SbOx using SbCl5 and Sb-Ethoxide as precursors, and report it here for the first time. The coating is applied on Bi2Te3 particles synthesized via the solvothermal route to enhance the thermoelectric properties (i.e., Seebeck coefficient, thermal and electrical conductivity) via interface engineering. The amorphous character of the coating was shown by the missing reflexes on the X-ray diffractograms (XRD). A shift from the oxidation state +III to +V of the Sb species was observed using X-ray photoelectron spectroscopy (XPS), indicating increased thickness of the SbOx coating layer. Additionally, a peak shift of the Sb 3d(5/2) + O 1s peak indicated increased n-type doping of the material. Electrical measurements of spark plasma-sintered bulk samples confirmed the doping effect on the basis of decreased specific resistivity with increasing SbOx layer thickness. The Seebeck coefficient was improved for the coated sample with 500 cycles of SbOx, while the total thermal conductivity was reduced, resulting in enhancement of the zT. The results distinctly show that surface engineering via powder ALD is an effective tool for improving key properties of thermoelectric materials like electrical conductivity and the Seebeck coefficient.

SbO x thin films are deposited by atomic layer deposition (ALD) using SbCl5 and Sb(NMe2)3 as antimony reactants and H2O and H2O2 as oxidizers at low temperatures. SbCl5 can react with both oxidizers, while no deposition is found to occur using Sb(NMe2)3 and H2O. For the first time, the reaction mechanism and dielectric properties of ALD-SbO x thin films are systematically studied, which exhibit a high breakdown field of ≈4 MV cm−1 and high areal capacitance ranging from 150 to 200 nF cm−2, corresponding to a dielectric constant ranging from 10 to 13. The ZnO semiconductor layer is integrated into a SbO x dielectric layer, and thin film transistors (TFTs) are successfully fabricated. A TFT with a SbO x dielectric layer deposited at 200 °C from Sb(NMe2)3 and H2O2 presents excellent performance, such as a field effect mobility (µ) of 12.4 cm2 V−1 s−1, I on/I off ratio of 4 × 108, subthreshold swing of 0.22 V dec−1, and a trapping state (N trap) of 1.1 × 1012 eV−1 cm−2. The amorphous structure and high areal capacitance of SbO x boosts the interface between the semiconductor and dielectric layer of TFT devices and provide a strong electric field for electrons to improve the device mobility.

In this work, we demonstrate the performance of a silicon-compatible high-performance self-powered photodetector.A wide detection range from visible (405 nm) to near-infrared (1550 nm) light was enabled by the vertical p-n heterojunction between the p-type antimony telluride (Sb2Te3) thin film and the n-type silicon (Si) substrates. A Sb2Te3 film with a good crystal quality, low density of extended defects, proper stoichiometry, p-type nature, and excellent uniformity across a 4-inch wafer was achieved by atomic layer deposition at 80 C using (Et3Si)2Te and SbCl3 as precursors. The processed photodetectors have a low dark current ( 20 pA), a high responsivity of ( 4.3 Ampere per Watt at 405 nm and 150 milli-Ampere per Watt at 1550 nm), a peak detectivity of 1.65*10^14 Jones, and a quick rise time of 98 us under zero bias voltage. Density functional theory calculations reveal a narrow, near-direct, type-II bandgap at the heterointerface that supports a strong built-in electric field leading to efficient separation of the photogenerated carriers. The devices have long-term air stability and efficient switching behavior even at elevated temperatures. These high-performance self-powered p-Sb2Te3/n-Si heterojunction photodetectors have immense potential to become reliable technological building blocks for a plethora of innovative applications in next-generation optoelectronics, silicon-photonics, chip-level sensing, and detection.