This article presents prime results on process development and optimization of dry etching of silicon carbide (SiC) for via formation and deep etching for SiC-based microsystems. The investigations and corresponding results of the process developments enable the first realization of a full SiC-based technological demonstrator composed of a SiC-interposer with a flip chip mounted deep etched micro electromechanical system (MEMS) SiC Device. By optimizing the process, etch depth of 200 $\mu \text{m}$ with an etch rate of up to 2 $\mu \text{m}$ /min can be achieved for via etching. In addition, a design of experiments (DoEs) with a total of 29 experiments with seven factors was done to characterize the deep etching of large areas into the SiC. Hereby, vertical sidewalls with low micromasking, low microtrenching and an etch rate of up to 4 $\mu \text{m}$ /min could be achieved. The findings and optimized processes were implemented to develop on the one hand a 200- $\mu \text{m}$ -thick SiC interposer with copper metallization. On the other hand, a SiC-MEMS Device was manufactured with a deep etched cavity in SiC bulk wafer forming by the end a 50- $\mu \text{m}$ thin membrane. The results demonstrate the ability of etching monocrystalline SiC with a high etch rate, enabling new fundamental topologies/structures and packaging concepts for harsh environments MEMSs and high-power electronics. The developed etching technologies demonstrate and enable various applications for 3-D Integration with wide bandgap substrates taking advantage of the superior electrical and mechanical properties of SiC.

Advancements in packaging technologies like Fan-Out demand for a higher integration density with an increased number of RDL layers as well as novel low-k layers as interlayer dielectric. The adhesion of these layers becomes an important factor for the reliability of the packaging because an enforcement by mechanical bond is limited. This work presents a novel test method (Stripe Lift-Off Test - SLT) for the adhesion characterization of thin film layers used in RDL for Fan-In and Fan-Out. The method is based on a modified edge lift-off test (mELT) concept. A polymer layer under high tensile stress is used to force a delamination of a layer stack. A critical energy release rate (J/m 2 ) leading to a delamination can be estimated based on the known biaxial stress in the stressing polymer. The usage of residual stress in a layer stack for driving a delamination avoids any additional clamping, gluing of additional layers or the demand of special adhesion measurement equipment. The quantified adhesion test can be integrated in any RDL production line since only coating equipment is needed as well as a dicing tool for sample generation. The sample generation complexity can be scaled regarding the purpose of the adhesion measurement - ranging from a quick, rough estimation and adhesion value evaluation in a production process to a precise prediction of the energy release rate that can be used as a basis for packaging simulation. The established mELT for the quantification of the interface’s fracture toughness is limited by the fact that it is running at negative temperatures. The novelty of the SLT is a stress polymer layer with a modifiable stress state which allows the adhesion measurement at room temperature. The stress state can be tailored to investigate the delamination at a certain temperature related to the application. FE-modeling of the SLT in ANSYS is presented and these results are compared to the analytical energy release rate estimation of the SLT. These verified FEM fracture models form the basics for the integration of the SLT fracture toughness data into more complex reliability simulations of advanced packaging. Exemplary adhesion measurements are presented for polymer films as well as for sputter layers with different preconditioning.

In this work, a novel test structure design is proposed for the characterization of sodium (Na) contaminants during anodic bonding. The new structure can be described as a sheet-resistivity process control monitor (PCM) based on P-type piezoresistor with electrical connection that enables direct measurement after bonding process. This design avoids external contamination through mechanically opening the structure as in some previous research, and, thus, ensures a reliable result. Additionally, the test structure is paired with a twin structure, which functions as a local reference by shielding the resistor with metallization to minimize the effect of process deviation. The designed structure was fabricated at Infineon Technologies AG and anodically bonded inside an environment with a steady Na distribution while nitrogen filling profile is controlled to characterize the influence of gas flow on Na contamination. After the bonding process, a wafer-level probing was carried out, which gave a direct result that shows the relationship between measurement deviation and gas filling parameters.

We present a study of the change in dielectric properties for an example laminate under different accelerated ageing conditions and various durations. The dielectric properties are extracted by use of an open resonator. An estimate of the impact of the changed properties is demonstrated for a microstrip line, a grounded coplanar line and a patch antenna at 79 GHz. We report significant changes in permittivity and loss tangent for temperature loading with potentially drastic impact on the performance of RF interconnects and components.

In this paper, a double stacked microvia (DSV) in a novel Antenna-in-Package (AiP) system integration platform (SiP) is investigated for 5G millimetre-Wave (mmWave) applications. To demonstrate the performance of the DSV as a vertical interconnect element in printed circuit board (PCB) based AiP, DSV along with conductor-backed co-planar waveguide (CB-CPW) were modelled to achieve optimum performance. The designed structures were fabricated and measured. Very good correlation was obtained between measurement and simulation. The fabricated DSV along with CB-CPW has an insertion loss of less than 0.3 dB up to 40 GHz.

Non-touch interface technology will be used more and more in future electronic systems. This paper describes the development of a novel sensor element for such interfaces. In this work, we apply a systematic approach, the M3-approach (methodologies, models, measures), to design miniaturized, scalable and low-cost 60 GHz MIMO (Multiple Input Multiple Output) radar front-ends for the integration of a novel non-touch human interface into a table. The packaging technology applied for the development of this radar module is suitable for mass production. The complete application of the M3-approach requires the implementation of three key steps, namely methodologies, models and measures. However, in this paper, we focus on the first two steps (i.e., methodologies and models) and describe these steps in detail.

A novel 4H SiC piezoresistive pressure sensor has been fabricated using a high temperature metallization system. The sensor has been fabricated using 100 mm 4H- SiC Wafers with an double EPI layer. While the top has been etched to form the piezoresistors, the lower Epi-layer is oppositely doped acts as an isolation layer. The formation of the membrane has been performed by a reactive ion etching (RIE) process enabling etch rates of up to 4 µm/min through bulk SiC. The gold-based metallization system is able to withstand high temperatures.

This paper brings into light all the new developmental work performed in the wide domain of high frequency PCBs for the realisation of innovative metasurfaces at 5GHz as well as compact highly integrated 5G antenna-in-modules at 40 GHz. There is a fast growing demand in high frequency market that justifies the intense R&D work also on microwave and especially mmWave technologies, comprising both “beyond the state-of-the-art high frequency PCBs” and advanced PCB integration concepts. In this context, this paper intends to highlight new knowledge in materials, processes as well as thermal dissipation concepts, that have been derived from various R&D projects, but especially in the framework of the FET-EU “Visorsurf” and the EU-Serena projects. In specific, R&D work will be shown on the emerging concepts of metamaterials that can be software programmable and adapt their properties. The Visorsurf main objective is the development of a hardware platform, the Hypersurface, whose electromagnetic behavior can be programmatically defined. The key enablers for this are the metasurfaces whose electromagnetic properties depend on their internal structure. The Hypersurface hardware platform will be a 4-layer build-up of high frequency PCB substrate materials with the metasurfaces on the top and custom electronic controller nodes at the bottom of the PCB hardware platform. This paper will elaborate on how innovative PCB processes have been tailored to high frequency substrates for the manufacturing of the first 4-layer Hypersurface PCB hardware platform with a size of 300mmx300mm.}{In a complimentary way, the paper will describe in detail new chip embedding concepts in the same family of high frequency PCB substrates toward the realization of highly miniaturized advanced packages for 5G mmWave applications at 40 GHz. These concepts show vividly the potential of PCB embedding technologies as the mean for heterogeneous integration in high frequency advanced packages/modules. The paper discusses in detail all process chain developments in high frequency PCBs for the embedding of GaN and SiGe chips in PCBs, their interconnection path concept, the embedding of passives, the fabrication of the antenna module and its stacking on a high power or low power PCB module for the final formation of a 6-layer antenna-in-module package which could be separately assembled on the system board. Furthermore, the paper will present for the first time innovative thermal dissipation concepts for the “Serena” antenna module, with the prevailing scenario of thermal vias to the bottom of the GaN and SiGe chips for direct heat removal. All processes for realization of high frequency substrates and embedded 5G 40 GHz antenna modules will be discussed in detail.

In this paper the reactive ion etching (RIE) of 4H silicon carbide (SiC) with an SF 6 /O 2 /He gas mixture is investigated in an inductively coupled plasma etcher (ICP). Objective is the analysis of the manufacturing process of a SiC diaphragm for a bulk micromechanical pressure sensor, by etching a cavity into silicon carbide wafer. In addition, the selectivity of etching masks made from Nickel and Copper against SiC are examined. By means of Design of Experiments (DOE) in the software JMP, a test series with 29 recipes is set up. The process is varied over the parameters chamber pressure, source power, platen power, SF 6 flow rate, O 2 flow rate, clamp cooling and mask material. To evaluate the etched samples quantitatively, cross sections of 29 specimens are made. The results are used to create a mathematically model for the prediction of etching rate, profile angle and occurring micro masking. The model is evaluated by etching samples. Etching a cavity with an opening width of 800 μm to a depth of 300 μm with a maximum etching rate of 4 μm/min, vertical profile walls and a smooth and even etched base is demonstrated. The selectivity of the modelled process is 115 compared to Cu, the observed selectivity of Cu is higher compared to Ni.

In this work, the electromagnetic modelling and measurement of a novel aperture-coupled hybrid glass-silicon 1x2 antenna array is presented. The patch elements are located under a glass substrate, which is placed on a silicon layer. The antenna array is fed using aperture coupling. A cavity is etched in the silicon layer to reduce the impact of silicon, and thus ensures significant improvement of the antenna efficiency and gain. The proposed antenna was fabricated and measured. Very good correlation is obtained between simulation and measurement.

Safety is a crucial issue in hydrogen energy applications due to the unique properties of hydrogen. Accordingly, a suitable hydrogen sensor for leakage detection must have at least high sensitivity and selectivity, rapid response/recovery, low power consumption and stable functionality, which requires further improvements on the available hydrogen sensors. In recent years, the mature development of nanomaterials engineering technologies, which facilitate the synthesis and modification of various materials, has opened up many possibilities for improving hydrogen sensing performance. Current research of hydrogen detection sensors based on both conservational and innovative materials are introduced in this review. This work mainly focuses on three material categories, i.e., transition metals, metal oxide semiconductors, and graphene and its derivatives. Different hydrogen sensing mechanisms, such as resistive, capacitive, optical and surface acoustic wave-based sensors, are also presented, and their sensing performances and influence based on different nanostructures and material combinations are compared and discussed, respectively. This review is concluded with a brief outlook and future development trends.

This paper presents the results obtained by the design, fabrication and measurements of redistribution layer (RDL) interconnects in Fan-Out Wafer-Level packaging (FOWLP) technology, including straight and bend transmission lines and through layer transitions designed in grounded coplanar wave guide (GCPW) type. The interconnection structures were fabricated in polymer based thin-film technology using 3µm copper sheets separated by 6 µm polyimide layers and providing a minimum lateral line/space of 9µm /9 µm. Measurement results up to 100 GHz are compared to simulation results of both the nominal designs and those fitted to the real geometrical dimensions of the fabricated structures. Surface roughness of the fabricated structures has been measured and considered in the simulation models. The results demonstrate the reliability of the fabrication as well as the robustness of the designed structures against tolerances in the fabrication process.

Split-ring resonators (SRRs) are one of the fundamental building blocks of electromagnetic metamaterials. These structures play a key role in the development of future millimeter-wave (mm-Wave) components and systems. In this work, we present a study on the scaling of split-ring resonators and their models to mm-Wave frequencies with special focus on their use in heterogeneous packaging and system-integration. We model, simulate, design and measure different configurations of SRRs. Very good correlation is obtained between the analytical calculations, simulation and measurements. Finally, we investigate the impact of process variations, which occur during fabrication of the resonators.

Solder ball reliability is a long-discussed topic in microelectronic packaging. With new package types needed for mmWave applications a trade-off between reliability and RF performance may arise, when the solder ball geometry has to be selected for specific package assemblies. In this work, the lifetime for different solder ball geometries is investigated within a numerical simulation workflow, by means of a sensitivity analysis in which the ball diameter, pad sizes and stand-off distance are varied. Next to lifetime estimations, 3D full-wave simulations have been applied to analyze the RF performance of the structures under investigation at 77-79 GHz (E-band) center frequencies relevant for automotive radar applications. Finally, the trade-off between RF performance and reliability is illustrated and quantified.

The fast-growing sector of smart city applications resulting from the ongoing digitalization has a huge impact on our society. They use innovative technologies to improve for example mobility, optimize shopping or offer intelligent travel guide assistance. However, these applications have not only the potential to benefit our daily life with precisely targeted services, but also to reduce the environmental impact we create. In this paper the authors present the proceeding for a simplified life cycle assessment on the special case of a sensor-based parking prediction service of the Deutsche Telekom called “Park&Joy”.

In this paper, a 1x2 dual-band microstrip antenna array configuration in FOWLP technology for 5G applications operating in the 28GHz and 38GHz frequency bands is proposed. For the first time an antenna array is designed, simulated and fabricated on 200μm mold substrate material for a compact 1cmx1cm Antenna-in-Package module. Results show very good correlation between simulation and measurement.

The article proposes a generalized high cycle fatigue evaluation methodology for solder joints based on a local stress finite element method (FEM) and compares with experimental results. A method to predict the damage initiation of surface mount technology (SMT) solder joints is accomplished in this article by making use of generic coupon level SAC387 solder specimens. High cycle fatigue (HCF) experiments conducted on generic solder specimens are followed by means of FKM guidelines, which are translated to microelectronic elements for the first time. The FEM predicted lifetime values of solder joints agree with the experimental results performed on SMT components. In addition, the overall results show that the predicted values act as a threshold damage line from which the solder joint failure regimes can be differentiated. The results also show the differences in the predicted damage line and failure line for SMT solder joints.

Fan-Out enables new heterogeneous packaging concepts where chips are embedded in an electronic mold compound (EMC) package with ultra-small footprint. These multi-chip systems demand a high routing density in the redistribution layer (RDL) which is realized by fine copper features with line and space structures in the dimension down to 2 μm, establishing electrical interconnects between the chips across different substrate materials (e.g. silicon chips and mold-filled gaps). The copper lines undergo high mechanical stress due different thermal expansion coefficients of the used materials. Numerous papers investigated reliability topics only focusing on properties of the polymer in the redistribution layer and the solder ball material, but the influence of the mechanical properties of electroplated copper has been a minor topic so far [1] [2] [3].With feature sizes and thicknesses of about 2 μm, these structures are in the range of copper grain size with the result that different grain structures become more important. Also, the material suppliers start to tune galvanic copper baths to generate e.g. twinned copper structures with mechanically superior behavior. Characterizing these fine structures at that scale is challenging because the properties could be different compared to macro samples. This work presents an on-wafer characterization method of copper features down to 2 μm with a newly designed wafer scale micro tensile test. This concept allows a test integration in the fab process flow. The elongation at break and the tensile strength of ultra fine line copper lines are measured by the tensile loading. The results are compared with macro scale tensile tests.

A novel capacitive sensor for measuring the water-level and monitoring the water quality has been developed in this work by using an enhanced screen printing technology. A commonly used environment-friendly conductive polymer poly(3,4-ethylenedioxythiophene):poly (styrenesulfonate) (PEDOT:PSS) for conductive sensors has a limited conductivity due to its high sheet resistance. A physical treatment performed during the printing process has reduced the sheet resistance of printed PEDOT:PSS on polyethylenterephthalat (PET) substrate from 264.39 Ω/sq to 23.44 Ω/sq. The adhesion bonding force between printed PEDOT:PSS and the substrate PET is increased by using chemical treatment and tested using a newly designed adhesive peeling force test. Using the economical conductive ink PEDOT:PSS with this new physical treatment, our capacitive sensors are cost-efficient and have a sensitivity of up to 1.25 pF/mm.

In this paper, a multilayered integrated inductor in Fan-out Wafer Level Packaging (FoWLP) technology is investigated. The inductor is designed on polyimide for integration into the redistribution layer of the package. Excellent correlation is obtained between simulation and measurement results. The fabricated inductor has an inductance of approximately 480 pH and a quality factor of approximately 27 at 11 GHz.