Comparison of data from high speed shear and drop test of four different tin based BGAs, DIP 34, DIP 33, DIP 18C and DIP 18B show that there is a good correlation between these two tests. The test performance ranking of the alloys from the drop test is DIP 33 > DIP 18C > DIP 18B > DIP 34 and that from the shear test is DIP 33 ~ DIP 18C > DIP 18B > DIP 34. There was a good matching of the failure mechanisms observed during these two tests. In addition, this article shows that by increasing the shear test speed, a better correlation with the drop test can be achieved. For the shear tests, there was a clear difference in the failure modes between samples having the lowest and highest shear strength values. In all the sample sets, the weakest link appears to be the component side IMC layer. This article shows that the shear test can be used as a proxy to the drop test to evaluate quality of components that are assembled in a mobile electronic product
System-in-Package (SiP) such as multi-chip or stacked die BGA modules with wirebond, flip-chip or hybrid interconnect are getting popular for advanced packaging applications. The design of SiP is more dependent on modeling as the package structure and failure mechanism are too complicated to be studied. It is known that drop impact reliability of lead-free BGA solder joints is a critical challenge. Drop impact life of IC packages mounted on board becomes a hot topic, especially for design and qualification of handheld electronic products. Actual drop test and sample preparation are very expensive and time-consuming, requiring much manpower in measurement and failure analysis, and therefore, there are limited drop test results reported to advise on the package design enhancement, especially for lead-free packages. In this paper, various design parameters are studied experimentally and numerically, to understand the effects of ball height, ball size, and ball layout. A thorough understanding of design variables on impact life of IC packages are obtained based on such well-designed and controlled experiments. On the other hand, more that 10 BGA packages with different package size, ball layout, package layout, and die thickness are tested with well-controlled drop tester. For the first time, an accurate drop impact life prediction model is established for lead-free (SnAgCu) BGA packages and modules, having good correlation with 16 cases of actual board level drop testing results. This quantitative approach is different from traditional qualitative modeling, as it provides both accurate relative and absolute impact life prediction. The validated model is applied to provide design guidelines for lead-free BGA and modules to improve their drop impact reliability. One point to be noted is that the relative performance of package may be different under board level drop test and thermal cycling test. Therefore, different design guidelines should be considered, depending on application and area of concern.
The semiconductor industry is driving toward lead-free solder due to environmental concern and legislation requirement. The industry has also concluded that SnAgCu solder alloy so far is the best lead-free alternative to SnPb solder. Therefore, most existing and new packages have to be tested and qualified using lead-free solder. One of the critical concerns is board level solder joint reliability during thermal cycling test. In this paper, the methodology for an absolute life prediction is described for virtual qualification of packages. A good absolute fatigue life prediction requires an appropriate solder creep model and actual test data on packages. Two new sets of lead-free Anand's constants for SnAgCu solder are introduced for creep models. These Anand's creep models are compared with other lead-free and eutectic solder model and the relative design trend is similar. A fatigue corrective factor is introduced to integrate the different solder models together for convenient relative design enhancement with acceptable range of absolute life prediction. These fatigue corrective factors can also be used to compare different finite element modeling assumptions such as element size and solution time step. Subsequently, design analysis is performed to study the effects of 11 key package dimensions and material properties. It is found that the relative design trend for packages with lead-free and eutectic solder is similar. Therefore, the design guidelines established for the previous eutectic solder is still valid for lead-free solder.
This paper explores an alternate process for the application of underfill. The ideal process for an efficient SMT line is to apply the underfill to the package prior to shipping, thus moving all underfill handling and processing steps to the package manufacturer. The process creates a component that can be loaded into tape and reel and handled as any other surface mount part. Standard pick-and-place equipment can then be used to pick the component and place it on the PWB. The underfill cures during reflow, and may be reworkable. This process is called pre-applied chip scale package underfill and must handle the moisture coming off the PWB during reflow to create a near void-free underfill layer, minimizing any potential for solder bridging. The current investigation provides results of a study aimed at enhancing mechanical shock reliability. Reliability results of four different pre-applied underfill options are presented and development and qualification of a pre-applied CSP underfill process is described. Issues surrounding development of effective materials, processes and equipment for reinforcing board-mounted CSPs in a high volume production environment are also discussed in this paper.
Land grid array IC-packages are gaining popularity among portable electronics, for low cost, mechanical reliability, direct Pb-free assembly process compatibility, and their low profile on the PWB. LGA technology is an excellent choice to fulfil future environmental requirements in thin and compact products. The reliability performance of 0.5 mm pitch LGA structure is compared to ball grid array (BGA). Reliability performance is evaluated through comparative tests designed for a portable environment. These tests consist of temperature cycling test for operation performance evaluation and board level drop test for mechanical shock durability performance evaluation. The stress distributions in LGA and BGA are analysed by the finite-element method (FEM). Furthermore, reliability investigation is done for LGA components using both standard SnPb- and Pb-free assembly processes. The differences in the reliability performance between the SnPb- and Pb-free assemblies are explained through microstructural analysis. Reliability issues relating to the transition from conventional assembly process to Pb-free process are discussed, based on the test and simulation results.