A recent trend in several robotics tasks is to consider vision as the primary sense to perceive the environment or to interact with humans. Therefore, vision processing becomes a central and challenging matter for the design of real-time control architectures. We follow in this paper a biological inspiration to propose a real-time and embedded control system relying on visual attention to learn specific actions in each place recognized by our robot. Faced with a performance challenge, the attentional model allows to reduce vision processing to a few regions of the visual field. However, the computational complexity of the visual chain remains an issue for a processing system embedded onto an indoor robot. That is why we propose as the first part of our system, a full-hardware architecture prototyped onto reconfigurable devices to detect salient features at the camera frequency. The second part learns continuously these features in order to implement specific robotics tasks. This neural control layer is implemented as embedded software making the robot fully autonomous from a computation point of view. The integration of such a system onto the robot enables not only to accelerate the frame rate of the visual processing, to relieve the control architecture but also to compress the data-flow at the output of the camera, thus reducing communication and energy consumption. We present in this paper the complete embedded sensorimotor architecture and the experimental setup. The presented results demonstrate its real-time behavior in vision-based navigation tasks.

Unsupervised artificial neural networks are now considered as a likely alternative to classical computing models in many application domains. For example, recent neural models defined by neuro-scientists exhibit interesting properties for an execution in embedded and autonomous systems: distributed computing, unsupervised learning, self-adaptation, self-organisation, tolerance. But these properties only emerge from large scale and fully connected neural maps that result in intensive computation coupled with high synaptic communications. We are interested in deploying these powerful models in the embedded context of an autonomous bio-inspired robot learning its environment in realtime. So we study in this paper in what extent these complex models can be simplified and deployed in hardware accelerators compatible with an embedded integration. Thus we propose a Neural Processing Unit designed as a programmable accelerator implementing recent equations close to self-organizing maps and neural fields. The proposed architecture is validated on FPGA devices and compared to state of the art solutions. The trade-off proposed by this dedicated but programmable neural processing unit allows to achieve significant improvements and makes our architecture adapted to many embedded systems.

Les avancees technologiques recentes ont permis d'integrer plusieurs milliards de transistors au sein d'une meme puce, et ce chiffre ne cesse d'augmenter.Il n'est plus possible depuis quelques annees, a cause de limitations physiques, d'augmenter la frequence de fonctionnement des micro-processeurs.Pour adresser des applications toujours plus complexes, la tendance actuelle consiste a multiplier le nombre de cœurs de calcul.Au-dela d'une dizaine de processeurs, de nombreuses problematiques apparaissent, comme la gestion de la memoire, les communications,la maniere de representer le calcul ou encore l'ordonnancement de tâches.Pour repondre a ces problematiques, nous avons concu un calculateur capable d'auto-organiser son architecture interneen fonction de la nature et de la richesse des informations contenues dans l'environnement dans lequel il est place.Ce controleur s'inscrit dans la boucle sensori-motrice d'un robot mobile, illustrant ainsi un large choix d'applications complexes, evoluant dans un environnement dynamique.Il est constitue d'une grille 2D d'elements de calcul prenant la forme d'une surface reconfigurable, pouvant heberger un processeur ou un accelerateur materiel.L'auto-organisation de l'architecture se manifeste sous la forme d'emergence d'aires de traitement sur la surface de la puce, parmi les elements de calcul.Le developpement et l'evolution de ces aires sont pilotes par un reseau de neurones materiel integre a la couche de calcul.L'originalite de ce reseau de neurones de type carte auto-organisatrice est d'etre completement distribue, et de disposer d'une connectivite limitee.Nous pensons en effet que ces conditions soient necessaire pour qu'une architecture puisse passer a l'echelle.Cette couche neuronalle tire ses donnees d'entree dans une couche de pre-traitement qui a pour but d'extraire l'information pertinente de l'environnement.Dans le cadre de ces travaux, elle est implementee sous la forme d'un systeme de vision bio-inspire, par ailleurs valide dans un contexte robotique.

Adaptive Hardware Systems can rely on software or hardware adaptation. Software adaptation can be globally assimilated to mode switching, either at a technological or hardware level (DVFS, Idle processor mode ...), or at the application level (bandwidth adaptation in telecommunication, multispectral cameras, ...). Hardware adaptation corresponds to a deeper change in the internal organization of the computing architecture of an embedded system. It enables more powerful adaptation but is currently limited by the reconfiguration (tool and architecture) of today's FPGA devices. We present in this paper a multi-FPGA platform designed to exhibit unique computing capabilities. The joint design of the electronic board and the internal architecture of each reconfigurable device permits dynamic parallel (and not partial) reconfiguration of several parts of the system while maintaining global routing and local computation in the rest of the system. Dynamic parallel reconfiguration and technological independence are enabled by considering reconfiguration at coarse grain. We describe in the paper the hardware elements composing the platform. The specific design of the global system allowed us to reach a fully operational platform. We present statistical experiments to evaluate the inter-chip network capacity which show that our platform supports up to 18 parallel reconfigurations per second.

Most of the robot behaviors are based on visual sensing to perceive their environment. Following a biological inspiration, our system relies on attention to reduce the processing to a few regions of the visual field. However, the computational complexity of the visual chain remains incompatible with real-time processing. Therefore, we propose a full-hardware architecture prototyped onto reconfigurable devices to reach the camera frequency. The integration of such a system onto the robot enables not only to accelerate the visual processing till realtime behavior but also to compress the data-flow at the output of the camera. Since we use a multiscale attentional chain, we evaluate in this paper both the gain of this approach for higher cognitive processes and the computational cost for the hardware implementation.

The design of a resource allocation mechanism is becoming a major challenge with many-core SoC architectures. We define a hardware controller in which a grid of processing elements (PEs) will support a set of neuro-cognitive processes in order to drive a robot in different tasks. We propose an original artificial neural network (NN) named DMAD-SOM for Distributed Multiplicative Activity Dependent Self Organizing Map inspired by Neural Fields (NF) equations that have shown self-organizing behaviors and can be suitable for this purpose. This model is shortly described here. It can be used to take allocation decisions locally, taking in account the state of the whole system through the emergent behavior of the network. This paper describes the distributed DMAD-SOM model and focuses mainly on its implementation onto FPGA.

The advent of massively parallel many-core architectures on a chip can be considered as a good opportunity to rethink the classical computation model used for several decades and that now shows some limitations to follow both the potential and the usage of new technologies. In this paper, the way explored to study new solutions is directly inspired from biology, and more precisely from neurosciences. This way could lead, for example, to best practices for dynamically partitioning application tasks onto a set of processing cores. Distributed load-balancing is known to bring more efficient utilization of resources in the case of regular applications. We propose in this paper a bio-inspired hardware substrate that brings a plasticity property into many-core architectures. We describe a hardware controller in which a grid of processing elements will support a set of neurocognitive processes in order to drive a robot in different tasks. We propose an original distributed hardware artificial neural network as support for this plasticity. It is inspired by Neural Fields equations that have shown self-organizing behaviors and can be suitable for this purpose. It can be used to take allocation decisions locally, taking into account the state of the whole system through the emergent behaviour of the network. This paper describes the neural model and focuses mainly on its implementation onto FPGA in the context of artificial vision.

Most of the robot behaviors are based on visual sensing and perception. This paper describes a smart camera composed of a full-hardware vision architecture coupled with an embedded camera sensor. The hardware architecture corresponds to low-level visual perception processes. The integration of such a system onto the robot enables not only to accelerate the visual processing till real-time behavior but also to compress the data-flow at the output of the camera. The results obtained during indoor robotic missions show an important reduction factor of data communication.