Two-dimensional (2D) materials have long been considered as ideal platforms for developing separation membranes. However, it is difficult to generate uniform subnanometer pores over large areas on 2D materials. We report that the well-defined eight-membered ring (8-MR) pores, typically formed at the boundaries of two antiparallel grains of monolayer molybdenum disulfide (MoS2), can serve as molecular sieves for efficient water-ion separation. The density of grain boundaries and, consequently, the number of 8-MR pores can be tuned by regulating the grain size. Optimized MoS2 membranes outperformed the state-of-the-art membranes in forward osmosis tests by demonstrating both ultrahigh water/sodium chloride selectivity and exceptional water permeance. Creating precise pore structures on atomically thin films through grain boundary engineering presents a promising route for producing membranes suitable for various applications.

Absorption of photons in atomically thin materials has become a challenge in the realization of ultrathin, high-performance optoelectronics. While numerous schemes have been used to enhance absorption in 2D semiconductors, such enhanced device performance in scalable monolayer photodetectors remains unattained. Here, we demonstrate wafer-scale integration of monolayer single-crystal MoS2 photodetectors with a nitride-based resonant plasmonic metasurface to achieve a high detectivity of 2.58 × 1012 Jones with a record-low dark current of 8 pA and long-term stability over 40 days. Upon comparison with control devices, we observe an overall enhancement factor of >100; this can be attributed to the local strong EM field enhanced photogating effect by the resonant plasmonic metasurface. Considering the compatibility of 2D semiconductors and hafnium nitride with the Si CMOS process and their scalability across wafer sizes, our results facilitate the smooth incorporation of 2D semiconductor-based photodetectors into the fields of imaging, sensing, and optical communication applications.

Three-dimensional monolithic integration of memory devices with logic transistors is a frontier challenge in computer hardware. This integration is essential for augmenting computational power concurrent with enhanced energy efficiency in big data applications such as artificial intelligence. Despite decades of efforts, there remains an urgent need for reliable, compact, fast, energy-efficient and scalable memory devices. Ferroelectric field-effect transistors (FE-FETs) are a promising candidate, but requisite scalability and performance in a back-end-of-line process have proven challenging. Here we present back-end-of-line-compatible FE-FETs using two-dimensional MoS2 channels and AlScN ferroelectric materials, all grown via wafer-scalable processes. A large array of FE-FETs with memory windows larger than 7.8 V, ON/OFF ratios greater than 107 and ON-current density greater than 250 μA um-1, all at ~80 nm channel length are demonstrated. The FE-FETs show stable retention up to 10 years by extension, and endurance greater than 104 cycles in addition to 4-bit pulse-programmable memory features, thereby opening a path towards the three-dimensional heterointegration of a two-dimensional semiconductor memory with silicon complementary metal-oxide-semiconductor logic.

Research on electronic channel materials has traditionally focused on bulk and nanocrystals, nanowires, and nanotubes. However, the recent surge of interest in two-dimensional (2D) transition-metal dichalcogenides (TMDs) has emerged as a game-changer in this field. The atomically thin structure of 2D TMDs offers unique electronic and optical properties, which have been shown to have significant potential in various applications, such as optoelectronics, energy harvesting, and spintronics. Epitaxy growth of single-crystal 2D TMDs on oxide or metallic substrates has opened up new opportunities for direct integration into existing manufacturing pathways. In this article, we discuss recent advances in achieving continuous single-crystallinity of 2D TMDs on oxide and metallic substrates by controlling the nucleation and growth rate of crystalline domains. We also review strategies for the controlled introduction of defects through postgrowth processing and substrate engineering. Finally, we highlight emerging strategies, new opportunities, and remaining challenges for bridging the gap between lab innovations and commercialization. The ability to grow high-quality 2D TMDs on scalable and industry-compatible substrates represents a significant breakthrough in the field of electronic materials and has the potential to revolutionize the semiconductor industry. Despite the remaining challenges, the future of 2D TMDs looks promising. Their integration into existing manufacturing pathways could open up new avenues for advanced electronic devices with improved performance and reduced power consumption.

Growing continuous monolayer films of transition-metal dichalcogenides (TMDs) without the disruption of grain boundaries is essential to realize the full potential of these materials for future electronics and optoelectronics, but it remains a formidable challenge. It is generally believed that controlling the TMDs orientations on epitaxial substrates stems from matching the atomic registry, symmetry, and penetrable van der Waals forces. Interfacial reconstruction within the exceedingly narrow substrate-epilayer gap has been anticipated. However, its role in the growth mechanism has not been intensively investigated. Here, we report the experimental conformation of an interfacial reconstructed (IR) layer within the substrate-epilayer gap. Such an IR layer profoundly impacts the orientations of nucleating TMDs domains and, thus, affects the materials' properties. These findings provide deeper insights into the buried interface that could have profound implications for the development of TMD-based electronics and optoelectronics.

Electronic charge rearrangement between components of a heterostructure is the fundamental principle to reach the electronic ground state. It is acknowledged that the density of states distribution of the components governs the amount of charge transfer, but a notable dependence on temperature has not yet been considered, particularly for weakly interacting systems. Here, we experimentally observe that the amount of ground state charge transfer in a van der Waals heterostructure formed by monolayer MoS2 sandwiched between graphite and a molecular electron acceptor layer increases by a factor of three when going from 7 K to room temperature. State-of-the-art electronic structure calculations of the full heterostructure that account for nuclear thermal fluctuations reveal intra-component electron-phonon coupling and inter-component electronic coupling as the key factors determining the amount of charge transfer. This conclusion is rationalized by a model applicable to multi-component van der Waals heterostructures.

In the last decade, catalytic chemical vapor deposition (CVD) has been intensively explored for the growth of single-layer graphene (SLG). Despite the scattering of guidelines and procedures, variables such as the surface texture/chemistry of catalyst metal foils, carbon feedstock, and growth process parameters have been well-scrutinized. Still, questions remain on how best to standardize the growth procedure. The possible correlation of procedures between different CVD setups is an example. Here, two thermal CVD reactors were explored to grow graphene on Cu foil. The design of these setups was entirely distinct, one being a "showerhead" cold-wall type, whereas the other represented the popular "tubular" hot-wall type. Upon standardizing the Cu foil surface, it was possible to develop a procedure for cm(2)-scale SLG growth that differed only by the carrier gas flow rate used in the two reactors.

The amount of charge transfer between components of a van der Waals heterostructure to reach the electronic ground state can exhibit a strong temperature dependence. In article number 2008677, Mariana Rossi, Norbert Koch, and co-workers experimentally observe that the amount of ground-state charge transfer in a van der Waals heterostructure formed by monolayer MoS2 sandwiched between graphite and a molecular electron-acceptor layer increases by a factor of 3 when going from 7 K to room temperature.

Two-dimensional transition metal dichalcogenide nanoribbons are touted as the future extreme device downscaling for advanced logic and memory devices but remain a formidable synthetic challenge. Here, we demonstrate a ledge-directed epitaxy (LDE) of dense arrays of continuous, self-aligned, monolayer and single-crystalline MoS2 nanoribbons on β-gallium (iii) oxide (β-Ga2O3) (100) substrates. LDE MoS2 nanoribbons have spatial uniformity over a long range and transport characteristics on par with those seen in exfoliated benchmarks. Prototype MoS2-nanoribbon-based field-effect transistors exhibit high on/off ratios of 108 and an averaged room temperature electron mobility of 65 cm2 V−1 s−1. The MoS2 nanoribbons can be readily transferred to arbitrary substrates while the underlying β-Ga2O3 can be reused after mechanical exfoliation. We further demonstrate LDE as a versatile epitaxy platform for the growth of p-type WSe2 nanoribbons and lateral heterostructures made of p-WSe2 and n-MoS2 nanoribbons for futuristic electronics applications. Aligned arrays of single-crystalline monolayer TMD nanoribbons with high aspect ratios, as well as their lateral heterostructures, are realized, with the growth directed by the ledges on the β-Ga2O3 substrate. This approach provides an epitaxy platform for advanced electronics applications of TMD nanoribbons.