Beamforming receivers use the spatial domain to increase sensitivity, reject spatial interferers, and increase communication to multiple users simultaneously with multiple beams. Conventional vector modulators (VM) consisting of multiple gain slices are used for phase and amplitude control. The number of slices grows as a product of each additional beam, antenna element, and bit of resolution, resulting in significant area and power consumption. We use time-modulation techniques to break the area and VM-resolution tradeoff and have implemented a proof-of-concept prototype of our time-modulated LO (TM-LO) architecture in 65nm. Existing spatio-temporal techniques employ fast-beam switching implemented at the system level [1]. The TM-LO uses time-modulated techniques at the circuit level to enable amplitude and phase control for beam steering.

A time-modulated LO (TM-LO) vector modulator (VM) architecture using a time domain approach for amplitude scaling and phase shifting received signals is presented. The TM-LO uses rail-to-rail LO waveforms generated from digitally synthesized blocks and pass-gate switches to perform the amplitude/phase control. A single element receiver achieves 0.2 dB RMS gain error and 1.4 degrees RMS phase error with 5 bits of amplitude/phase resolution across a 360 degrees range is implemented in a 65 nm CMOS process. Without time-modulation, the hardware is capable of 3-bits of resolution. The inherent digital nature of TM-LO architecture provides opportunity very compact front-ends suitable for large arrays and lower voltage technologies. Four TM-LO chips were used to create a beamforming receiver

Communication systems across a variety of applications are increasingly using the angular domain to improve spectrum management. They require new sensing architectures to perform energy-efficient measurements of the electromagnetic environment that can be deployed in a variety of use cases. This paper presents the Directional Spectrum Sensor (DSS), a compressive sampling (CS) based analog-to-information converter (CS-AIC) that performs spectrum scanning in a focused beam. The DSS offers increased spectrum sensing sensitivity and interferer tolerance compared to omnidirectional sensors. The DSS implementation uses a multi-antenna beamforming architecture with local oscillators that are modulated with pseudo random waveforms to obtain CS measurements. The overall operation, limitations, and the influence of wideband angular effects on the spectrum scanning performance are discussed. Measurements on an experimental prototype are presented and highlight improvements over single antenna, omnidirectional sensing systems.

A multi-branch receiver is introduced that uses mixer-clock modulation to unify the functions of single-carrier and concurrent dual-carrier reception, as well as compressive-sampling spectrum scanning into a single architecture. With CW-modulated mixer clocks, the receiver achieves concurrent reception from two distinct bands and realizes tuned impedance matching that greatly improves its out-of-band (OB) linearity. With pseudo-noise (PN)-modulated mixer clocks, the receiver supports rapid spectrum scanning. Disabling modulation reverts the receiver to a single-carrier receiver with good OB linearity. A 65-nm CMOS prototype is presented that offers 2.7-dB minimum NF, -1.3-dBm B1dB, and +8-dBm IIP3 for high-sensitivity single-carrier reception. Concurrent dual-carrier reception at 500 and 900 MHz is demonstrated that offers -8.4-dBm B1dB and sub-6-dB NF. In the CS spectrum scanning mode, the receiver achieves a 66-dB dynamic range with -75-dBm sensitivity over a 630-MHz RF span and consumes 18.7 nJ per detected signal.

The direct space-to-information converter (DSIC) unifies conventional delay-and-sum analog conventional beamforming (CBF) with compressive sampling (CS) rapid direction-of-arrival (DOA) finding into a single, reconfigurable phased-array receiver architecture. Where current CBF-based DOA scanners need to exhaustively search through multiple DOA angles, the DSIC is able to receive energy from all possible angles by modulating its antenna weights psuedo-randomly. The DSIC RF-ASIC can operate from 1 to 3 GHz, was fabricated in 65-nm CMOS, and includes eight direct-conversion paths each delivering 32-dB conversion gain, 3.3-dBm in-band IIP3, and 6.4-dB NF while consuming 19.8 mW from 1.2 V. The DSIC RF-ASIC has two modes of operation, CS-DOA and CBF-Reception and can switch between them in less than 1 mu s. In CS-DOA mode, the DSIC RF-ASIC finds the DOA of a single signal in 1 mu s consuming 158 nJ which is 4x faster and 1.5x less energy than a comparable CBF-based DOA scanner.

The modulated-clock downconversion mixer (MC-DM) and the antenna-weight-modulated phased-array (AWM-PA) are explored as key enablers of ambient-aware, opportunistic receivers in emerging 5G deployments. The benefits of the MC-DM is demonstrated first with an out-of-channel interferer reflecting, inter-band carrier aggregation receiver architecture where the RF carrier combination is selected simply by programming the frequency of the CW waveform used to modulate the mixer clock. Second, a wideband spectrum scanner architecture utilizing pseudo-random modulation of the downconversion mixer clock and Compressed-Sampling (CS) DSP is explored where a few large interferers are detected in ns time. The benefits of the AWM-PA is demonstrated with a phased-array architecture utilizing pseudo-random modulation of the antenna weights and CS DSP where a few large DoAs are detected in us time.

The direct RF-to-information converter unifies high-sensitivity signal reception and compressed-sampling (CS) wideband signal detection into a rapidly reconfigurable and easily scalable architecture occupying 0.56 mm(2) in 65-nm CMOS. In reception mode, the DRF2IC RF frontend consumes 46.5 mW from 1.15 V and delivers 40-MHz RF bandwidth, 41.5-dB conversion gain, 3.6-dB noise figure, and -2 dBm B1dB. In CS wideband detection mode, 66-dB operational dynamic range, 40-dB instantaneous dynamic range, and 1.43-GHz instantaneous bandwidth are demonstrated, and six interferers each 10 MHz wide scattered over a 1.27-GHz span are detected in 1.2 mu s consuming 58.5 mW.

The Direct Space-to-Information Converter (DSIC) unifies conventional delay-and-sum analog beamforming (CBF) with compressed-sampling (CS) rapid DoA finding into a single reconfigurable phased-array architecture. The DSIC chip includes 8 direct-conversion paths each delivering 32dB conversion gain, 3.3dBm in-band IIP3 and 6.4dB NF while consuming 19.8mW from 1.2V. The DSIC is able to switch between CBF-reception mode and CS-DoA mode in less than 1us. In CS-DoA mode, the DSIC finds the DoA of a single emitter in 1us consuming 158nJ which is 4x faster and 1.5x less energy than a comparable CBF scanner. For applications where many antennas are used, the DSIC uses an order of magnitude less energy than similar architectures.

A reconfigurable and scalable architecture called the Direct Space-to-Information Converter (DSIC) is presented for rapid and energy-efficient direction-of-arrival (DoA) finding. In conventional delay-and-sum beamformers (CBF), the tradeoff between scan time, resolution and energy consumption is fixed due to the Nyquist sampling theorem. To accurately detect the DoA of an interferer, many scan angles and complex energy intensive calculations are needed. In contrast, the proposed DSIC directly converts an incoming wavefront to spatial information and generates only a few compressed sensing (CS) measurements by forming random projections of the spatial signal consecutively in time. The DoA of the wavefront is then rapidly found from these CS measurements. The energy consumption of the DSIC is 16x lower than the CBF for a realistic scenario where the DoA of only one large interferer needs to be found. Compared to other recently proposed CS DoA finders, the DSIC delivers significant reconfigurability and scalability advantages especially when the number of interferers is unknown.

Modern military radios for SIGINT or communication applications often need to operate in an interferer-rich environment. They typically need to quickly find interferers or jammers, both spectrally and spatially, to take appropriate countermeasures. We show how compressive sampling (CS) can enable unique RF capabilities and performance. The Direct-RF-to-Information Converter (DRF2IC) rapidly detects interferers or signals of interest (SOI) in the spectral domain and the Direct-Space-to-Information Converter (DSIC) rapidly detects their direction of arrival in the spatial domain. Thanks to CS, the SOIs are found quickly while only requiring low energy. We demonstrate RF ICs of these converters implemented as overlays on high performance receivers and beamformers. Their speed, low energy, and unified architectures makes them excellent solutions in SWaP-constrained platforms like man-portable, satellite and unmanned aerial system (UAS) applications.