Two-dimensional (2D) materials are promising candidates for future electronics due to their excellent electrical and photonic properties. Although promising results on the wafer-scale synthesis (≤150 mm diameter) of monolayer molybdenum disulfide (MoS 2 ) have already been reported, the high-quality synthesis of 2D materials on wafers of 200 mm or larger, which are typically used in commercial silicon foundries, remains difficult. The back-end-of-line (BEOL) integration of directly grown 2D materials on silicon complementary metal–oxide–semiconductor (CMOS) circuits is also unavailable due to the high thermal budget required, which far exceeds the limits of silicon BEOL integration (<400 °C). This high temperature forces the use of challenging transfer processes, which tend to introduce defects and contamination to both the 2D materials and the BEOL circuits. Here we report a low-thermal-budget synthesis method (growth temperature < 300 °C, growth time ≤ 60 min) for monolayer MoS 2 films, which enables the 2D material to be synthesized at a temperature below the precursor decomposition temperature and grown directly on silicon CMOS circuits without requiring any transfer process. We designed a metal–organic chemical vapour deposition reactor to separate the low-temperature growth region from the high-temperature chalcogenide-precursor-decomposition region. We obtain monolayer MoS 2 with electrical uniformity on 200 mm wafers, as well as a high material quality with an electron mobility of ~35.9 cm 2 V −1 s −1 . Finally, we demonstrate a silicon-CMOS-compatible BEOL fabrication process flow for MoS 2 transistors; the performance of these silicon devices shows negligible degradation (current variation < 0.5%, threshold voltage shift < 20 mV). We believe that this is an important step towards monolithic 3D integration for future electronics.
For many years, the computer industry has relied on steady progress in the exponential rate of scaling MOSFETs in integrated circuits. The usual expectation, based on Moore's law, is that the number of transistors able to be packed on a chip doubles roughly every 18 months. Sustaining this pace requires aggressive research into the numerous bottlenecks that threaten to slow it down. Much research has gone into the photolithography needed to produce such dense circuits, device structures that would allow smaller channel lengths, and a plethora of other materials and device advances that help sustain the present rate of scaling. In the past decade, however, another issue has emerged that threatens to impose an absolute limit on how many transistors can be packed onto a die. This is the issue of heat dissipation.
We investigate the performance of 5-nm gate length GaN nMOS nanowire field effect transistor (GaN-NW-nFET) of various geometrical shapes, around the limits of cross-sectional scalability, using atomistic quantum transport simulations. For square cross-sections, the bench-marking results with the simulated Si-NW-nFET reveal over 30% enhancement in GaN drive current in both low standby power (LP - I-OFF = 1 nA/mu m) and high performance (HP - I-OFF = 100 nA/mu m) applications. Further performance enhancement is observed with the use of non-square geometries that are akin to GaN's wurtzite crystal structure. Particularly, for T-nw = 2.4 mn, triangular cross-section GaN-NW-nFETs exhibit the smallest subthreshold swing, down to 62 mv/decade, excellent drive current, I-DSAT > 2 x 10(6) mu A/mu m(2) and superior energy-delay product compared to simulated Si-NW-nFET.
In this paper, we describe the development of moving mesh adaptation framework and its application to charge transport simulation of semiconductor devices, with emphasis on its relevance to power semiconductor devices. Mesh adaptivity in the context of semiconductor device simulation is an important problem and can help deal with the convergence and numerical stability issues, as well as automate the meshing process. We demonstrate the efficacy of our proposed meshing scheme through the simulation of a GaN-based power diode, as well as a Si diode with a non-rectangular doping profile, by externally coupling our framework to Sentaurus Device TCAD. We perform error analysis and compare our results with simulations based on high-resolution uniform structured meshes as well as manually refined axis-aligned meshes. In addition to the benefits in terms of accuracy, automation, and generality, our method can be regarded as a stepping stone toward computationally scalable and adaptive semiconductor device simulations.
Vertical hetero- and homo-junction tunnel FET (TFET) based on multi-layer black phosphorus (BP) and transition metal dichalcogenides are proposed and studied by numerical simulations employing the semi-classical density gradient quantum correction model. It is found that the vertical TFET based on BP can achieve high on-current (> 200 mu A mu m(-1)) and steep subthreshold swing (average value = 24.6 mV/dec) simultaneously, due to its high mobility, direct narrow bandgap, and low dielectric constant. We also found that the on-current in vertical TFETs based on MoS2/MoSe2 hetero-junction is two orders of magnitudes higher than the one in MoS2 homo-junction TFET, due to the reduced effective bandgap in heterostructure with staggered band alignment. In addition, we present various design considerations and recommendations as well as provide a qualitative comparison with published data.
In this work, we calculate the thermal conductivity of layered bismuth telluride (Bi2Te3) thin films by solving the Boltzmann transport equation in the relaxation-time approximation using full phonon dispersion and compare our results with recently published experimental data and molecular dynamics simulation. The group velocity of each phonon mode is readily extracted from the full phonon dispersion obtained from first-principle density-functional theory calculation and is used along with the phonon frequency to compute the various scattering terms. Our model incorporates the typical interactions impeding thermal transport (e.g., umklapp, isotope, and boundary scatterings) and introduces a new interaction capturing the reduction of phonon transmission through van der Waals interfaces of adjacent Bi2Te3 quintuple layers forming the virtual superlattice thin film. We find that this novel approach extends the empirical Klemens-Callaway relaxation model in such anisotropic materials and recovers the experimental anisotropy while using a minimal set of parameters.
A 3-D full-band particle Monte Carlo (MC) simulator, with full electron and phonon dispersion and a 2-D quantum correction is self-consistently coupled to a phonon MC simulator. The coupling entails feeding the phonon data obtained from the 3-D electrical MC to the phonon MC. The phonon MC reciprocates by providing the resulting spatial temperature map, which is used in the electron MC, with tempe...
ABSTRACTIn this paper, a full‐band Monte Carlo simulator is employed to study the dynamic characteristics and high‐frequency noise performances of a double‐gate (DG) metal–oxide–semiconductor field‐effect transistor (MOSFET) with 30 nm gate length. Admittance parameters (Y parameters) are calculated to characterize the dynamic response of the device. The noise behaviors of the simulated structure are studied on the basis of the spectral densities of the instantaneous current fluctuations at the drain and gate terminals, together with their cross‐correlation. Then the normalized noise parameters (P, R, and C), minimum noise figure (NFmin), and so on are employed to evaluate the noise performances. To show the outstanding radio‐frequency performances of the DG MOSFET, a single‐gate silicon‐on‐insulator MOSFET with the same gate length is also studied for comparison. The results show that the DG structure provides better dynamic characteristics and superior high‐frequency noise performances, owing to its inherent short‐channel effect immunity, better gate control ability, and lower channel noise. Copyright © 2012 John Wiley & Sons, Ltd.
In this paper, we propose a laterally graded-channel pseudo-junctionless (GPJL) MOSFET for analog/RF applications. We examine the dynamical performance of GPJL MOSFET and compare it with the common junctionless (JL) MOSFET architecture using a 2-D full-band electron Monte Carlo simulator (MC) with quantum correction. Our results indicate that the GPJL MOSFET outperforms the conventional JL MOSFET, yielding higher values of drain current (I ds), transconductance (g m), and cutoff frequency (f t). Further, the emerging electric field and velocity distributions, as a consequence of the channel engineering introduced by the GPJL MOSFET, result in lower output conductance (g ds) and higher early voltage (V ea). The preeminence of the GPJL transistor over the JL transistor is further illustrated by showing improvements on the intrinsic voltage gain (A vo) in the subthreshold regime, to as high as 61 %. These results indicate that our proposed GPJL MOSFET yields improvement in the analog/RF performance metrics as compared to JL MOSFETs.
This work aims at using full-band Monte Carlo simulation coupled with full phonon dispersion to investigate the electro-thermal behavior of Silicon-on-insulator (SOI) multigate devices at the limit of cross section scalability. We particularly explore the dependence of short channel effects and Joule heating on the lateral scaling of the cross section. In the transistor level, heating is manifested through electron phonon interaction. We devise an efficient algorithm for the inclusion of full phonon dispersion in order to account for anisotropy and details of heat generation with great accuracy. The basic tradeoff between n-channel double gate, trigate, and gate-all-around transistors with square cross section lengths varying from 30 nm down to 5 nm are presented. Results indicate that multigate drive current decline well below their ideal limit as we reduce the cross section. In addition, at the limit of cross section scalability, series resistance increases as we add more gates. Furthermore, phonon observables demonstrate proliferation of energy dissipation rate as we add more gates and/or shrink the lateral cross section.
In this letter, we investigate warm-electron injection in a double-gate SONOS memory by means of 2-D full-band Monte Carlo simulations of the Boltzmann transport equation. Electrons are accelerated in the channel by a drain-to-source voltage V DS smaller than 3 V, so that programming occurs via electrons tunneling through a potential barrier whose height has been effectively reduced by the accumulated kinetic energy. Particle energy distribution at the semiconductor/oxide interface is studied for different bias conditions and different positions along the channel. The gate current is calculated with a continuum-based postprocessing method as a function of the particle distribution obtained from Monte Carlo simulation. Simulation results show that the gate current increases by several orders of magnitude with increasing drain bias, and warm-electron injection can be an interesting option for programming when short-channel effects prohibit the application of larger drain bias.
Silicon nanowires with multiple-gates provide better source drain isolation and are thought to be the most promising candidate to replace bulk Si MOSFETs as we downscale deep into the nanometer regime. In this study we utilize a 3D full-band particle Monte Carlo (MOCA3D) simulator to investigate the performance and current trends of fully-depleted Trigate MOSFETs with different cross-sections. Results indicate that as we reduce the cross-section, the increased coupling between the top and lateral gates reduces the channel potential in different axes. In addition, device current normalized with respect to the Trigate perimeter alleviates as we scale the cross-section.
This study investigates transport and electrostatic behavior of quasi 1D nanowires adopting a relatively simple planar fabrication technique. The confined conduction channel is created by etching an oxide trench, realizing a T-gate structure. Since multiple channels are normally needed to realize sufficient current drive in practical applications, the behavior of single and coupled adjacent silicon nanowires is characterized using a 3D quantum corrected Monte Carlo approach. Results indicate that a single T-gate structure provides over 27% increase in current drive compared to conventional MOSFET at a drain voltage of 1V. In addition, design consideration and recommendation is presented. (C) 2008 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
7-Nitroindazole (7NI, a nitric oxide synthase [NOS] inhibitor) administered intraperitoneally (ip), 30 min before the test, at doses ranging between 50-200 mg/kg, raised the threshold for electroconvulsions in mice. Linear regression analysis revealed that the doses increasing the threshold by 50% (TID50) and 100% (TID100) over the control value for 7NI were 115.2 and 173.4 mg/kg, respectively. Moreover, 7NI dose-dependently potentiated the anticonvulsant effects of four conventional antiepileptic drugs (AEDs: carbamazepine - CBZ, phenobarbital - PB, phenytoin - PHT, and valproate - VPA) in the mouse maximal electroshock-induced seizure (MES) model. 7NI at 50 mg/kg enhanced only the anticonvulsant effect of PB, whereas the drug at 75 and 100 mg/kg potentiated the antiseizure effects of PB, PHT and VPA, but not those of CBZ against MES-induced seizures. Only 7NI at 150 mg/kg enhanced considerably the antielectroshock action of all studied AEDs in the MES test. Pharmacokinetic evaluation of interactions between 7NI and the investigated AEDs revealed that 7NI (150 mg/kg; ip) did not alter total brain concentrations of conventional AEDs in mice. L-arginine (L-Arg - a natural precursor of NO; administered ip, 500 mg/kg, 60 min before electroconvulsions) did not reverse the activity of 7NI (150 mg/kg), but in contrast, it significantly potentiated the anticonvulsant action of conventional AEDs combined with 7NI (150 mg/kg). Pharmacokinetic increase in total brain AED concentrations was observed for the combinations of L-Arg (500 mg/kg) with 7NI (150 mg/kg) and PHT (by 32%; p<0.01) or VPA (by 22%; p<0.05). Neither total brain CBZ nor PB concentrations were altered following the co-administration of L-Arg (500 mg/kg) with 7NI (150 mg/kg). 7NI at doses of 100-200 mg/kg significantly impaired spontaneous ambulatory activity in mice subjected to the Y-maze task. The NOS inhibitor at doses of 50 and 75 mg/kg had no significant effect on locomotor activity of animals, although the number of arm entries within the 5 min of observational time was reduced. Finally, it can be concluded that the enhancement of anticonvulsive efficacy of CBZ, PB, PHT and VPA by 7NI alone or in combination with L-Arg in the MES test, deserves more attention and further neurochemical studies are required to elucidate the exact role of NO in the brain.
A full-band Monte Carlo simulator has been used to analyze and compare the performance of n-channel double-gate MOSFETs and FinFETs. Size quantization effects were accounted for by using a quantum correction based on Schrödinger equation. FinFETs are a variation of typical double-gate devices with the gate surrounding the channel on three sides. From our simulations, we observed that the quantization effects in double-gate devices are less significant as compared to bulk MOSFETs. The total sheet charge density drops only slightly as the depletion of charge at the interface is counterbalanced by the increased volume inversion effect. We also observed an appreciable drop in average velocity distribution when quantum corrections were applied. For FinFETs, the fin extension lengths on either side of the gate affect the device performance significantly. These underlap regions have low carrier concentration and behave as large resistors. The current drops non-linearly with increasing fin extension lengths.
H. influenzae meningitis is a severe disease with high mortality and morbidity rates, and with marked increase in resistance to conventional drugs used for treatment of the disease. The aim of this study was to study the prevalence, clinical presentation, outcome of patients with H influezae meningitis, and to determine the efficacy and safety of new therapeutic regimens that could be used in the treatment of the disease and test the susceptibility of the isolates to the different antibiotics. During the period from January 1982 to December 2001, four hundred and sev- enty two children with H. influenzae meningitis were admitted to the Abbassia Fever Hospital meningitis ward in Cairo. There was no apparent variation in the yearly number of patients admitted to the ward during the period of the study but the number of admissions was much higher during the cold winter months with a peak in the month of February. Early signs and symptoms of H. influenzae meningitis may mimic any febrile disease until frank signs and symptoms of increased intracranial pressure and meningeal irritation become apparent. On admission 65% of the children were in coma, 25% were drowsy and only 10% were alert. During the early phase of the study only a mild percentage of the strains were resistant to penicillin, however with time a marked increase in resistance of the organism to penicillin and chloramphenicol oc- curred. The organism remained very sensitive to the 3rd generation cephalosporins and aztreonam during the period of the study. These drugs were found effective and safe in the treatment of H influezae meningitis. The overall mortality was 30% and of the survivors 22% were left handicapped. The mortality and sequelae were dependant on the duration of the disease prior to initiation of therapy and the state of conscious-