Double patterning is used to scale designs below k1 factors that can be obtained with single patterning. Because of the double litho and etch. steps, however, this is an expensive and time consuming technique. Spacer defined double patterning, which is commonly used to shrink regular dense patterns as used in memory applications, is an expensive technique because of the many deposition and etch steps that are required. In this paper, we propose several alternative process flows which can reduce the cost-of-ownership by eliminating the intermediate etch step in a double litho, double etch for line/space patterns, and replace it by a process step in the track only. These alternative process flows use thermal freezing resist, positive/negative resist and coating a freezing material. For these materials 32nm node logic patterning can be demonstrated, and even 32nm half pitch can be patterned already with one technique. As alternative technique to spacer defined double patterning, dual tone development is proposed, which can generate pitch doubling in resist using a single exposure. Proof-of-concept of this technique is shown experimentally.

IMEC has started an EUV lithography research program based on ASMLs EUV full field scanner, the Alpha Demo Tool (ADT). The intent of this program is to help improve and establish the necessary mask and resist infrastructure, and achieve learning to prepare for the use of EUV lithography in future production of integrated circuits. The program focuses on three main projects: EUV resists, EUV reticles and assessment of the ADT performance. In this paper, the status and the progress of each of the projects is reviewed. In preparation for a resist process for the ADT, interference lithography has been used to track the progress of resist performance. Good progress in resist performance is illustrated by the ability of some materials to resolve 25nm HP. In its initial phase, the reticle project has concentrated on working with the mask and blank suppliers to assure timely availability of reticles for the ADT. An overview is given of reticle related activities, as well as first results of a defect printability study by simulation. In the ADT assessment project, simulation studies are reported aimed at the development of optical correction for flare and reticle shadowing effects. The impact of flare and shadowing effects are well understood and strategies for flare mitigation and shadowing effect correction are proposed.

The immersion-specific watermark defect is discussed in its formation mechanism and in the influence of materials and exposure process. The non-topcoat approach was the basis of the work, where the properties of resist surface itself played the key role. Water droplets left on the resist surface were considered to induce the watermark defect in two possible ways; (1) the droplet is carried over to PEB process and impact the resist properties under the heat, (2) the droplet already evaporates before the PEB leaving some residue on the surface. A notable reduction in the resist dissolution rate was observed in the former case, which could be due to either physical or chemical change in the resist materials triggered by the water, and thereby would result in an unavoidable patterning failure. Therefore it is essential not to leave any water droplets on the surface in preventing the watermark formation. A very much hydrophobic materials design was proven effective in achieving this. The watermark formation was correlated to the scanning speed of immersion showerhead and the defectivity was evaluated in this perspective. The receding contact angle of the resist surface was found to well correlate to the "allowable" scanning speed, and was concluded that the higher was the better. A resist material was newly designed by using a hydrophobic polymer on this basis and the resist demonstrated a promising results not only in the watermark defectivity but also in lithographic performance.

Since the introduction of immersion lithography, leaching has become an important topic in screening new resist materials. It is considered as a possible source for lens contamination, but also it is expected to introduce new defect mechanisms. Protective topcoats have proven their use as leaching barriers, but care is needed when introducing them. They can have an impact on CD control and the defect behaviour of the immersion process. In this paper, a method is proposed to characterize leaching. It has been applied to investigate several cases. Next to that, water uptake and the formation of an intermixing layer in between resist and topcoat have been investigated with respect to their contribution to CD variations and defectivity.

Since the moment immersion lithography appeared in the roadmaps of IC manufacturers, the question whether to use top coats has become one of the important topics for discussions.The top coats used in immersion lithography have proved to serve as good protectors from leaching of the resist components (PAGs, bases) into the water. However their application complicates the process and may lead to two side effects. First, top coats can affect the process window and resist profile depending on the material's refractive index, thickness, acidity, chemical interaction with the resist and the soaking time. Second, the top coat application may increase the total amount of defects on the wafer.Having an immersion resist which could work without the top coat would be a preferable solution. Still, it is quite challenging to make such a resist as direct water/resist interaction may also result in process window changes, CD variations, generation of additional defects.We have performed a systematic evaluation of a large number of immersion resist and top coat combinations, using the ASML XT: 1250Di scanner at IMEC. The samples for the experiments were provided by all the leading resist and top coat suppliers. Particular attention was paid to how the resist and top coat materials from different vendors interacted with each other. Among the factors which could influence the total amount of defects or CD variations on the wafer were: the material's dynamic contact angle and its interaction with the scanner stage speed, top coat thickness and intermixing layer formation, water uptake and leaching. We have examined the importance of all mentioned factors, using such analytical techniques as Resist Development Analyser (RDA), Quartz Crystal Microbalance (QCM), Mass Spectroscopy (MS) and scatterometry. We have also evaluated the influence of the pre- and pos- exposure rinse processes on the defectivity.In this paper we will present the data on imaging and defectivity performance of the resists with and without the use of top coats. So far we can conclude that top coat/resist approach used in immersion lithography needs some more improvements (i.e. process, materials properties) in order to be implemented in high volume manufacturing.

Most 157nm resist optimization to date has been done with micro-steppers, but there may be significant differences in resist profiles and process windows between micro-steppers and full field scanners. Several resists were evaluated on an ASML MS VII full-field 157nm scanner at IMEC. Focus and exposure latitudes were measured for resist lines using various feature sizes and pitches with different reticle types and illumination conditions. Resist sensitivity to post-expose bake temperature were measured. Delay effects, line-edge roughness, line slimming in a CD SEM, and etch resistance were also evaluated.

Mask fabrication process, transportation, storage, and handling contribute to contamination of 157nm reticles and modified fused silica substrates, resulting in transmission loss. A stable VUV cleaning procedure for contaminated binary, alternating, and attenuated phase shift reticles has been developed. This cleaning procedure was verified by lithographic imaging on the 157nm ASML MS-VII exposure scanner. A point-to-point steady state dose transmission uniformity range across a batch of 25 wafers (the exposure conditions of which were equivalent to that of a 300 mm wafer, 26mm×33mm fields, 50mJ/cm2) that were exposed with a modified fused silica substrate, was found to be <0.24% for a reticle that was cleaned prior to exposure using this VUV cleaning process. In-situ laser cleaning of contaminated mask substrates during exposure in the MS-VII resulted in 1% change in transmission at doses of up to 20 J/cm2, above which transmission remains stable (<0.24% variation). The cleaning procedure involves exposing the contaminated reticle in the UVO Reticle Cleaning Station for 30 minutes, using a cleaning gas mixture of N2/O2=99%/1%. Transmission loss due to contamination within the clean room is limited to 1 - 2 % and is reversible upon VUV cleaning. Flare levels of 3% were measured on contaminated reticle relative to a clean state of the same reticle. VUV cleaning is not only good for improving and maintaining stable mask transmission, but it is also good for preventing reticle contamination-induced flare. Contamination rate and contaminant type appear to be dependent on the storage environment of mask substrates and reticles. Typical contaminants included molecular acids (halogens, sulfur, sulfates), molecular bases (ammonia, amines), molecular condensables (hydrocarbons, alcohols, ketones, fatty acids, siloxanes, phthalate), molecular dopant (boron) and molecular metals (Ca, Mg, Al, Cu). Contamination of mask substrates appears to be through a competitive adsorption phenomenon, whereby low molecular weight species with high vapor pressure and low adsorption energies are over time replaced by large molecular weight ones with low vapor pressure and high adsorption energies.

5 Samsung, San#24 Nongseo Giheung, Yongin, Gyunggi 449-71 Korea ABSTRACT Mask fabrication process, transportation, storage, and handling contribute to contamination of 157nm reticles and modified fused silica substrates, resulting in transmission loss. A stable VUV cleaning procedure for contaminated binary, alternating, and attenuated phase shift reticles has been developed. This cleaning procedure was verified by lithographic imaging on the 157nm ASML MS-VII exposure scanner. A point-to-point steady state dose transmission uniformity range across a batch of 25 wafers (the exposure conditions of which were equivalent to that of a 300 mm wafer, 26mm×33mm fields, 50mJ/cm2) that were exposed with a modified fused silica substrate, was found to be <0.24% for a reticle that was cleaned prior to exposure using this VUV cleaning process. In-situ laser cleaning of contaminated mask substrates during exposure in the MS-VII resulted in 1% change in transmission at doses of up to 20 J/cm2, above which transmission remains stable (<0.24% variation). The cleaning procedure involves exposing the contaminated reticle in the UVO Reticle Cleaning Station for 30 minutes, using a cleaning gas mixture of N2/O2=99%/1%. Transmission loss due to contamination within the clean room is limited to 1 -2 % and is reversible upon VUV cleaning. Flare levels of 3% were measured on contaminated reticle relative to a clean state of the same reticle. VUV cleaning is not only good for improving and maintaining stable mask transmission, but it is also good for preventing reticle contamination-induced flare. Contamination rate and contaminant type appear to be dependent on the storage environment of mask substrates and reticles. Typical contaminants included molecular acids (halogens, sulfur, sulfates), molecular bases (ammonia, amines), molecular condensables (hydrocarbons, alcohols, ketones, fatty acids, siloxanes, phthalate), molecular dopant (boron) and molecular metals (Ca, Mg, Al, Cu). Contamination of mask substrates appears to be through a competitive adsorption phenomenon, whereby low molecular weight species with high vapor pressure and low adsorption energies are over time replaced by large molecular weight ones with low vapor pressure and high adsorption energies.