In order to reduce the thermal budget for SBT crystallization process in planer type stack cell FeRAMs, Rapid Thermal Anneal (RTA) based process for SBT thin film was investigated. Our new process is characterized by crystallization in RTA without any furnace annealing process, and includes a low temperature recovery annealing process (hereafter RTB (Reduced Thermal Budget) process). As a result of only 750C RTA for accumulated time of 60s without furnace annealing process, the sufficient ferroelectric properties were derived in comparison with that of conventional SBT thin film. In the RTB process, two approaches to improve the break down voltage were carried out. First, we used UV exposure during the baking process. By optimizing the UV assisted baking process, a high break down field due to smooth surface morphology was successfully obtained, resulting in break down field of more than 1.2 MV/cm. Secondly, ultra thin SBT films as a top few layer on the base SBT thin film were employed. After optimization of the ultra thin SBT layer thickness, a very smooth SBT surface was successfully achieved, resulting in improvement of the break down field of more than 1.1 MV/cm.

In the silicon industry new materials and particularly, their deposition methods have become a fundamental integral part to enable next generations of highly integrated devices. Especially in the field of volatile and non-volatile memory applications as well as in integrated capacitor devices for high-frequency applications existing technologies generate an increasing demand for new advanced innovative solutions to further follow "Moore's law" in the near future.Amongst available film growth technologies, metal organic chemical vapor deposition (MOCVD) basically offers unique combination of composition controllability, high uniformity over large areas, high throughput, and last but not least a high degree of conformality over 3D structures. However, MOCVD of complex materials was in the past often confronted with an absence of appropriate metal organic precursors and MOCVD-tools.This work provides an overview of some of the latest achievements in the field of MOCVD of complex oxides and electrode materials using novel MOCVD deposition methods and tools. It proves that there now exist mature deposition methods with the high degree of reliability and reproducibility mandatory for production. (C) 2002 Elsevier Science Ltd. All rights reserved.

650 degreesC process of SrBi2Ta2O9 (SBT) has been achieved through the use of new metal organic deposition (MOD) solution and the optimization of the deposition conditions. The sample showed a high remnant polarization (2Pr) of 14 muC/cm(2) @3V, a low leakage current of 10(-8)A/cm(2) or less @3V, and a fatigue-free nature. We believe this processing will realize high-density FeRAM integration of SBT.

Since 1984, ferroelectric RAMs (FeRAMs) have been demonstrated in many applications such as smart cards and low-density memories. Prior to 1984, attempts failed because of the poor quality of thin films of complex materials. Currently, two materials compete for the large-scale integration development of FeRAMs. The first is a perovskite ceramic known as PZT (PbZr/sub 1-x/Ti/sub x/O/sub 3/). The second material is known as a layered perovskite such as SBT (SrBi/sub 2/Ta/sub 2/O/sub 9/). For low-density devices which employ thin films of either material with a thickness <300 nm operated at 3-5 V, both materials yield approximately the same results. As FeRAMs enter the deep submicron realm, the ferroelectric thin-film technology is ready to support high-density integration. SBT-based devices can be integrated as capacitors in DRAM-like 1T/1C stacked cells and flash-like FeFET cells. Experience with embedded FeRAMs is positive, so that the system-on-chip as well as stand-alone high-density devices are foreseen. The possibility of 1 V operation at a few to several tens of nanoseconds write with nonvolatility brings FeRAMs to the forefront of non-volatile memories. Scaling of capacitor areas as small as 0.04 /spl mu/m/sup 2/ is possible. With capacitor and FET technologies, FeRAMs blur the line between non-volatile memories as DRAM-like destructive read-out (DRO) devices and flash-like non-destructive read-out (NDRO) devices, which compete for the highly mobile generation of Internet devices and G-3 phones.

The metal-organic chemical vapor deposition (MOCVD) of ferroelectric thin films is being widely investigated for the manufacture of devices requiring a high density of volatile or non-volatile memory which goes beyond the limits of current mass production techniques. One of the more important challenges in the MOCVD of multi-component oxide thin films is the precise control of stoichiometry which relates directly to the films' electrical characteristics. A novel approach to liquid precursor delivery embodied in the AIXTRON TriJetTM liquid delivery system is reported. Physical and electrical properties of thin films as well as deposition characteristics as a function of various process parameters are described in detail. Most notably 2Pr=13 µC/cm2 at 5 V with leakage current density Jl=1E-8 A/cm2 @≤5 V were obtained. In addition, films with excellent thickness uniformity with 3σ=2.25% at 180 nm were deposited on 6′′ Pt/TiOx/Si wafers. Finally, near 100% step coverage with a maximum 2:1 aspect ratio (0.5 µm) was achieved.

This paper describes the general aspects of embedding Ferroelectric Memories (FeRAMs) with logic circuits and/or microcontrollers. These devices and stand-alone memories constitute the main thrust of applications of ferroelectric memories. The problems associated with embedding test the robustness and compatibility of the FeRAM process with established CMOS integrated circuits. As integrated circuits technology advances in lithography, FeRAMs meet the challenge, but new problems appear. In this review, existing embedded FeRAMs of the 0.8/0.6 μ generation will be discussed. A program for the 0.35/0.25 μ generation, and the 0.18 μ challenges are outlined and addressed. The paper also reviews the application of FeRAM Smart Cards. This application is becoming the best example of embedded FeRAMs in which to demonstrate the “System-One-Chip” technology direction. Smart Card ICs clearly take advantage of the low power, high-write speed and long endurance characteristics of Ferroelectric Memories.

Using a recovery anneal after deposition of the Pt top electrode and patterning the Platinum / SrBi2Ta2O9 bilayer has been established to obtain well shaped hysteresis curves with low leakage currents. Electrical properties of SET test capacitors in dependence of temperature and time for the recovery anneal are discussed. Evidence for degradation of the electrical properties of SET capacitors after patterning due to the appearance of a new unknown peak in X-ray diffraction (XRD) is presented.

Investigation of the annealing conditions of SrBi2Ta2O9 (SBT) films showed that crystallization behavior and grain growth is significantly affected by temperature ramp rates. Thin films of SET were deposited on Si/SiO2/Ti/Pt substrates using MOD (Metal-Organic Decomposition) two layer spin-on processing. The films were annealed at 800 degrees C in diffusion furnace under flowing O-2 for complete crystallization. It was found that the grain growth could be enhanced, leading to improved ferroelectric properties, by introducing a two step anneal methodology. The first step involves rapid thermal annealing (RTA) of the SET layers at temperatures close to 700 degrees C for 30 sec. at ramp rates between 75 to 125 degrees C/sec. followed by the second anneal employing a diffusion furnace at 800 degrees C for 30 to 60 min. This first RTA step is considered to be very important as it promotes grain growth when followed by diffusion anneal at 800 degrees C. A similar diffusion anneal, in the absence of RTA, wasn't enough to yield a dense film.

This invited paper discusses chemical solution deposition (CSD) and characterization of ferroelectric and dielectric thin films. Liquid Source Misted Chemical Deposition (LSMCD) technology was employed to deposit thin films using Metal Organic Decomposition (MOD) precursors. The configuration of the LSMCD machine along with deposition conditions and parameters are discussed in detail. Thickness uniformity, repeatability and step coverage data are also reported. Finally, electrical properties of thin Y1 and BST films deposited by LSMCD are discussed.

Imprint is known as a failure mechanism in ferroelectric capacitors due to a voltage shift in the hysteresis curve. A detailed study to investigate the time, temperature and bias voltage dependence of the voltage shift was performed on MOD SET thin films. Lifetime extrapolation under operating conditions (125 degrees C) reveal values for the lifetime of well over ten years.

This paper presents new results of Liquid Source Misted Chemical Deposition (LSMCD) of SrBi2(Ta1-xNbx)(2)O-9 thin films showing good step coverage of 150 mn thick. films into square openings approximately 1 mu m deep by 0.6 mu m wide. A SAMCO model HDF-6000 LSMCD machine was used for-the ferroelectric deposition Prior to the deposition of the ferroelectric film, a Pt bottom electrode of approximately 200 mn thickness was sputtered into an initial opening 1 mu m deep by 1 mu m wide. The LSMCD and new chemistry methodologies by which these results were obtained will be described in this paper. The electrical characteristics of the LSMCD films will also be reported. LSMCD films resulted in higher switched charge (2P(r)) than the spin-on films. The coercive fields (2E(c)) and maximum leakage currents were comparable for the two deposition methods. These results show that conformal LSMCD thin films can be used for sub-micron circuits containing ferroelectric memory.

Stress behavior, results of AES analysis and electrical properties of SBT in dependence of electrode structure and annealing conditions are discussed. Evidence for degradation of the electrical properties of SBT due to diffusion of Ti is presented.

This paper discusses the second generation liquid source misted chemical deposition (LSMCD) technology currently being developed for ferroelectric thin film deposition. A SubMicron Systems (SMS) Model Primaxx-2F cluster tool was used to deposit the films. The developments that have been made since the first generation machine are discussed. The process chamber schematics along with the characteristics of the aerosol generator are explained in detail. The electrical properties obtained from the films deposited by the tool are found to be similar to that of spin-on films. The step coverage obtained on patterned wafers are also shown. The LSMCD technique combines the advantages of spin-on such as simplicity, good stoichiometry control and superior electrical properties with the advantages of CVD such as superior step coverage, manufacturability, etc.