This study demonstrates how environmental sensors are effectively used to find the context of different types of cooking activities. This work was conducted in a household kitchen with proper ventilation and using a sensor array comprised of PM 2.5 , PM 10 , CO 2 , Temperature and Humidity sensors to investigate different cooking methods, such as boiling, frying. Several machine learning models were used, with and without hyperparameter tuning, for the evaluation of experimental results. The overall accuracy obtained is around 90% and above 95%, before and after using hyper-parameter tuning, respectively. These results show the efficacy of environmental sensors coupled with machine learning techniques can accurately identify and contextualise various cooking activities within a home kitchen environment. Such insights promise to enhance the remote monitoring of cooking practices in domestic settings for smart kitchen environments.

High occupancy in a room with improper ventilation and outdoor air pollution can significantly impact the occupants’ comfort and productivity which may also lead to various health-related issues. In this work, we have studied the relationship of occupancy in a classroom with the various environmental parameters prevailing in that room, such as concentration of CO 2 , PM 1 , PM 2.5 , PM 10 , and levels of Temperature, Relative Humidity, and Acoustics. All the above parameters affect indoor occupancy significantly. The real-time data acquisition has been done using a custom device. Collected contextual information helped us to find the relationships among primary features needed to develop estimation models for accurate classroom occupancy prediction. For random sampling, occupancy estimation accuracy ranges from 91% to 99%. Finally, results show that multiple environmental sensor data performed well in predicting occupancy levels.

In this paper, we have proposed non-linear parameter modulation as a low-cost technique to widen the chaotic region of analog one-dimensional (1-D) discrete-time chaotic maps, referred to as seed maps. The non-linear modulation circuits are designed with low transistor-count topologies. The design scheme generally applies to a wide range of 1-D discrete-time analog seed maps. The chaotic performance improvement after adding the non-linear modulation is examined with bifurcation plots and three chaotic entropy metrics namely, correlation coefficient, Lyapunov exponent, and correlation dimension. Along with the traditional design of a chaotic oscillator, two novel oscillator topologies are presented to demonstrate the versatile applicability of the proposed non-linear modulation scheme for designing chaotic systems with elevated performance. This hardware-efficient design with promising chaotic behavior shows the potential to be employed in many hardware-constrained chaos-based security applications for integrated circuits including robust random number generators, reconfigurable logic, physically unclonable function-based authentication, and so on.

This paper presents a novel one-dimensional discrete-time chaotic map. A significantly improved chaotic behavior, compared to already published one-dimensional maps, is achieved in the proposed design by virtue of this nonlinear map's stiffer transfer characteristics. The novelty of the work comes from the proposed methodology of splitting upward and downward slopping mechanisms to gain a stiffer slope in the uni-modal nonlinear circuit. The design methodology is presented with the help of the stability analysis of fixed points, which is generally applicable to a wide variety of nonlinear circuits. The chaotic complexity of the proposed circuit is analyzed with the bifurcation plot, correlation coefficient, and Lyapunov Exponent. The results are compared with reported works to demonstrate a significant improvement. Along with high chaotic complexity, this split-slope chaotic map provides a wide chaotic range covering 100% of the overall region of operation. The high chaotic complexity across a wide chaotic range is achieved with a remarkably low transistor-count circuit which is suitable in many hardware-security applications including, random number generation, chaotic logic circuits, and so on, for resource-constrained devices.

This work introduces three novel chaotic map circuits. Two of the map circuits use two $p$ -channel and one $n$ -channel silicon-on-insulator (SOI) four-gate transistor (G 4FET) while the third design uses two $n$ -channel and one $p$ -channel G 4FET. The multi-gate structure of G 4FET is leveraged to obtain four independent bifurcation parameters in the chaotic map with a simple three-transistor design. A chaotic oscillator design is proposed using this discrete-time chaotic map circuit, and the chaotic behavior is evaluated using bifurcation plot, Lyapunov exponent (LE), Correlation coefficient, Shannon entropy, and Stability analysis. The application of this multi-parameter chaotic oscillator is presented in a chaos-based reconfigurable logic gate, and the significant expansion of parameter design space compared to existing single-gate transistor-based maps is also demonstrated. Finally, a simple extension scheme for developing multi-dimensional robust chaotic map with even larger parameter space is presented and verified with specific instances of 2-D and 3-D maps.

This brief presents four discrete-time chaotic map circuits, including three new map circuits and one that has been previously reported. The designs are hardware efficient as they each contain only four Metal Oxide Semiconductor (MOS) transistors. They offer robust chaotic performance with wide chaotic space and uniform entropic properties. The wide chaotic region is essential for applications where parametric perturbation can push the system out of the desirable chaotic region. The chaotic performance is analyzed using a bifurcation plot, Lyapunov exponent, correlation coefficient, sample entropy, and Shannon entropy, and improvement over previous transistor-level designs is demonstrated. The proposed method can be useful in applications such as random number generation, reconfigurable and flexible computing, side-channel attack mitigation, logic obfuscation, and chaos-based cryptography. A chaotic oscillator design is proposed and its application in a chaos-based reconfigurable logic gate is presented, as well.

Reservoir Computing (RC) is a type of machine learning inspired by neural processes, which excels at handling complex and time-dependent data while maintaining low training costs. RC systems generate diverse reservoir states by extracting features from raw input and projecting them into a high-dimensional space. One key advantage of RC networks is that only the readout layer needs training, reducing overall training expenses. Memristors have gained popularity due to their similarities to biological synapses and compatibility with hardware implementation using various devices and systems. Chaotic events, which are highly sensitive to initial conditions, undergo drastic changes with minor adjustments. Cascade chaotic maps, in particular, possess greater chaotic properties, making them difficult to predict with memoryless devices. This study aims to predict 1D and 2D cascade chaotic time series using a memristor-based hierarchical RC system.

This work presents a general framework for developing a multiparameter 1-D chaotic system for uniform and robust chaotic operation across the parameter space. This is important for diverse practical applications where parameter disturbance may cause degradation or even complete disappearance of chaotic properties. The wide uninterrupted chaotic range and improved chaotic properties are demonstrated with the aid of stability analysis, bifurcation diagram, Lyapunov exponent (LE), Kolmogorov entropy, Shannon entropy, and correlation coefficient. We also demonstrate the proposed system's amenability to cascading for further performance improvement. We introduce an efficient field-programmable gate array-based implementation and validate its chaotic properties using comparison between simulation and experimental results. Cascaded normalized linearly-combined chaotic system (NLCS) exhibits average LE, chaotic ratio, and chaotic parameter space of 1.364, 100%, and $1.1\times 10^{12}$, respectively, for 10-bit parameter values. We provide a thorough comparison of our system with prior works both in terms of performance and hardware cost. We also introduce a simple extension scheme to build 2-D robust, hyperchaotic NLCS maps. We present a novel reconfigurable multiparameter pseudorandom number generator and validate its randomness using two standard statistical tests, namely, National Institute of Standards and Technology SP 800-22 and FIPS PUB 140-2. Finally, we outline six potential applications where NLCS will be useful.

This paper presents a general method, called “self-parameterization”, for designing one-dimensional (1-D) chaotic maps that provide wider chaotic regions compared to existing 1-D maps. A wide chaotic region is a desirable property, as it helps to provide robust performance by enlarging the design space in many hardware-security applications, including reconfigurable logic and encryption. The proposed self-parameterization scheme uses only one existing chaotic map, referred to as the seed map, and a simple transformation block. The effective control parameter of the seed map is treated as an intermediate variable derived from the input and control parameter of the self-parameterized map, under some constraints, to achieve the desired functionality. The widening of the chaotic region after adding self-parameterization is first demonstrated on three ideal map functions: Logistic; Tent; and Sine. A digitized version of the scheme was developed and realized in a field-programmable gate array (FPGA) implementation. An analog version of the proposed scheme was developed with very low transistor-count analog topologies for hardware-constrained integrated circuit (IC) implementation. The chaotic performance of both digital and analog implementations was evaluated with bifurcation plots and four established chaotic entropy metrics: the Lyapunov Exponent; the Correlation Coefficient; the Correlation Dimension; and Approximate Entropy. An application of the proposed scheme was demonstrated in a random number generator design, and the statistical randomness of the generated sequence was verified with the NIST test.

The acquisition of vast volumes of health-related data using IoT-enabled smart sensing approaches is well adapted. Analyzing this rich data using machine learning techniques can augment conventional healthcare systems by improving diagnosis accuracy, finding newer cures for diseases, and aid in remote healthcare. Integration of IoT and machine intelligence can alleviate the pressure on the healthcare system as an alternative for providing affordable healthcare to patients. Implementing appropriate learning techniques is key to addressing the problem of sensor data integration and analysis in such systems. Thus, in this chapter, IoT-Based smart and intelligent remote healthcare monitoring applications and systems from a generalized perspective are reviewed, with a particular focus on the correlation required between different machine learning approaches and pertinent data that can be utilized towards the development of an effective health monitoring systems. This chapter aims to provide researchers with a detailed review and guidelines to be considered in solving novel challenges towards the development of IoT-enabled smart health management system for breakthroughs towards affordable medical diagnosis and healthcare applications.

Reservoir Computing (RC) is a highly efficient emerging computing concept in machine learning to process temporal signals and has a low training cost compared to the traditional recurrent neural network. At first, the RC system extracts features from the input dataset and then projects the data in the high dimensional space by creating rich reservoir states. There are two conventional RC approaches such as Echo State Network (ESN) and Liquid State Machine (LSM). In this work, we explore a recent volatile memristor-based RC paradigm with spike encoded input which is attractive for its compact hardware implementation. We use four reported volatile memristors in this paradigm along with two reservoir architectures for discrete-time chaotic time series prediction. Chaotic time series is highly sensitive to the initial condition and slightly change in the initial condition causes eventual divergence in the observed outputs. Logistic map and Henon map are chosen as representative examples of well-known one-dimensional and two-dimensional chaotic maps, respectively. The main goal of this work is to explore and compare the performance of four different memristive RC systems using two different reservoir architectures for chaotic time series prediction.

In this paper, we have proposed the design of an analog two-dimensional (2D) discrete-time chaotic oscillator. 2D chaotic systems are studied because of their more complex chaotic behavior compared to one-dimensional (1D) chaotic systems. The already published works on 2D chaotic systems are mainly focused either on the complex analytical combinations of familiar 1D chaotic maps such as Sine map, Logistic map, Tent map, and so on, or off-the-shelf component-based analog circuits. Due to complex hardware requirements, neither of them is feasible for hardware-efficient integrated circuit (IC) implementations. To the best of our knowledge, this proposed work is the first-ever report of an analog 2D discrete-time chaotic oscillator design that is suitable for hardware-constrained IC implementations. The chaotic performance of the proposed design is analyzed with bifurcation plots, the transient response, 2D Lyapunov exponent, and correlation coefficient measurements. It is demonstrated that the proposed design exhibits promising chaotic behavior with low hardware cost. The real-world application of the proposed 2D chaotic oscillator is presented in a random number generator (RNG) design. The applicability of the RNG in cryptography is verified by passing the generated random sequence through four standard statistical tests namely, NIST, FIPS, TestU01, and Diehard.

In this paper, a novel method is proposed to build an improved 1-D discrete chaotic map called flipped product chaotic system (FPCS) by multiplying the output of one map with the output of a vertically flipped second map. Two variants, each with nine combinations, are shown with trade-off between computational cost and performance. The chaotic properties are explored using the bifurcation diagram, Lyapunov exponent, Kolmogorov entropy, and correlation coefficient. The proposed schemes offer a wider chaotic range and improved chaotic performance compared to the constituent maps and several prior works of similar nature. Wide chaotic window and improved chaotic complexity are two desired characteristics for several security applications as these two characteristics ensure enhanced design space with elevated entropic properties. We present a general Field-Programmable Gate Array (FPGA) design framework for the hardware implementation of the proposed flipped-product schemes and the results show good qualitative agreement with the numerical results from MATLAB simulation. Finally, we present a new Pseudo Random Number Generator (PRNG) using the two variants of the proposed chaotic map and validate their excellent randomness property using four standard statistical tests, namely NIST, FIPS, TestU01, and Diehard.

This paper points to a method of making money from stock market by algorithmic trading, without the use of sophisticated computer systems. Normal equity trading in stock market involves buying and stocks which you hold, by attempting to buy low and sell high (after holding the stock for some time, normally months or years). Focus of the paper is on buying and selling at frequent intervals (may be several times in a day) using margin trading to increase leverage. Manual or algorithmic means to correctly predict stock price movement is used to take trading decisions whether to BUY, SELL, or HOLD a stock in portfolio. This results in making profit, if the prediction is correct, or loss if prediction is incorrect. Margin trading allows this with an investment of a fraction of the total value of stocks traded.

We present a general framework for improving the chaotic properties of CMOS-based chaotic maps by cascading multiple maps in series. Along with two novel chaotic map topologies, we present the 45 $nm$ designs for four CMOS-based discrete-time chaotic map topologies. With the help of the bifurcation plot and three established entropy measures, namely, Lyapunov exponent, Kolmogorov entropy, and correlation coefficient, we present an extensive chaotic performance analysis on eight unique map circuits (two under each topology) to show that under certain constraints, the cascading scheme can significantly elevate the chaotic performance. The improved chaotic entropy benefits many security applications and is demonstrated using a novel random number generator (RNG) design. Unlike conventional mathematical chaotic map-based digital pseudo-random number generators (PRNG), this proposed design is not completely deterministic due to the high susceptibility of the core analog circuit to inevitable noise that renders this design closer to a true random number generator (TRNG). By leveraging the improved chaotic performance of the transistor-level cascaded maps, significantly low area and power overhead are achieved in the RNG design. The cryptographic applicability of the RNG is verified as the generated random sequences pass four standard statistical tests namely, NIST, FIPS, Diehard, and TestU01.

In this paper, a novel method is proposed to build an improved 1-D discrete chaotic map circuit by averaging the output of multiple seed maps. The design is done in a 65 nm CMOS process and is applicable to other technology nodes as well. We show the results for two and three seed maps but the general scheme is compatible with any number of seed maps. The chaotic properties are evaluated using the bifurcation diagram, Lyapunov exponent, Shannon entropy and correlation coefficient. We have found that by having a suitable combination of seed maps, the proposed averaging scheme has a much wider chaotic range with better chaotic performance than constituent seed maps. This can be useful for many applications such as reconfigurable logic gate, chaos-based cryptography, side-channel attack mitigation, random number generation, and so on, where a robust and wide chaotic range is desired.

A new one dimensional discrete chaotic map circuit is presented. The design is done in a 45 nm CMOS process but the proposed topology is generally applicable for any technology node. The design is hardware-efficient as it contains only four MOS transistors and offers robust chaotic performance with a wide chaotic range. The chaotic performance is analyzed using bifurcation plot, Lyapunov exponent, correlation coefficient, and sample entropy. These different qualitative and quantitative measures clearly demonstrate excellent ergodic properties across a wide chaotic parameter range. The proposed map is also used in designing a reconfigurable logic generator and its wide chaotic window is shown to significantly enhance the functionality space of the logic generator.

The use of diesel engine powered equipment in underground mines across the globe has been increased considerably in the recent past to enhance the productivity and safety standards. However, the extensive use of diesel engine powered equipment caused severe health hazards because of the exposure to diesel particulate matter (DPM) and toxic gases discharged from the exhausts of these equipment. NIOH and IARC, USA, reported diesel exhausts including DPM are suspected as human carcinogen. The number of diesel equipment deployed in Indian underground mine has also increased exponentially, which resulted into significant level of DPM exposure. There have not been any comprehensive study on the exposure of DPM as well as any stipulation in the current mine safety legislation in India so far except a guideline from DGMS. The concentration of DPM depends upon many factors such as ventilation, engine designs, maintenance, types of fuel, condition of roadways, exhaust treatment arrangements etc. In the present study, field investigations were accomplished in the three underground metalliferous mines. Different parameters like quantity of air, power and life of engine and gradient of roadways were taken as independent variables to predict the concentration of DPM. Multivariate regression analysis was carried out for establishing the relation between DPM and these independent parameters, and a significant empirical equation has been derived. Thereafter, DPM values were measured by Airtec DPM monitoring instrument and the values predicted from the multivariate regression model and measured values from the instrument were validated through chi square test.

In this paper, we propose a novel technique to attain a robust 1-D chaotic system. The robustness of the system is characterized by the presence of an uninterrupted chaotic region throughout the entire parameter space with excellent chaotic properties. This wide chaotic region is a crucial characteristic for practical applications where parameter disturbance may push the system out of chaotic operation. Our proposed system is comprised of the weighted average of multiple 1-D chaotic seed maps and is a generalized framework for developing robust chaos using any number of seed maps. The uninterrupted chaotic range and improved chaotic entropy is demonstrated using the bifurcation plot, Lyapunov exponent, Shannon entropy, correlation coefficient, and Kolmogorov entropy. We also demonstrate how cascading can be used to further improve the ergodicity of the proposed system. The proposed method can be useful in many applications such as chaos-based cryptography, secure communication, reconfigurable logic gate, random number generation, and so on.