The former CERN RD50 collaboration develops monolithic active pixel high voltage (HV) CMOS sensors for future colliders with the aim of high radiation tolerance, good time resolution, and high granularity pixel detectors. The most recent prototype, the RD50-MPW4, was produced by LFoundry in December 2023 using a 150 nm CMOS process. It features a matrix of 64x64 pixels with a 62 μm pitch and employs a column-drain readout architecture. Compared to its predecessor, it now has separate analog and digital power domains and a new biasing scheme with a guard ring structure that supports bias voltages over 600 V. This contribution will discuss the design and latest results of the MPW4, where tests with unirradiated samples showed more than 99.9

The RD50-MPW4, a Depleted Monolithic Active Pixel Sensor (DMAPS) was analyzed using a Two Photon Absorption Transient Current Technique (TPA-TCT). This technique provides sensitivity maps with micrometer-scale spatial resolution, enabling the resolution of the boundaries of the detector’s sensitive volume, even for small-area pixels (62 × 62 μm2 in this study). With a 3D resolution, the depletion depth, the boundaries of the detector electric field, the 3D hit detection efficiency and the charge sharing between neighboring pixels were measured. The RD50-MPW4, a multi-project wafer chip developed by the HV-CMOS working group within the CERN RD50 collaboration, features a 64 × 64 DMAPS pixel matrix. Illuminating the chip from the backside, the TPA-TCT technique can characterize any pixel element in the matrix because silicon is transparent for near infrared laser light (1550 nm). Electron–hole pairs are generated only around the light focal point, deep in the silicon, so that any charge collected is precisely only from the focal point. With the TPA-TCT technique, the RD50-MPW4 was found to be have a 100% hit detection efficiency under specified conditions and an effective depletion depth of 226μm. It was also found that part of the charge in the periphery of the pixel was collected in the neighboring pixel. A 3D map of the sensor clearly shows the in-pixel electronics and the limits of the depletion region.

In high energy physics experiments, tracking and vertexing is nowadays mostly done using semiconductor detectors. Among the employed detectors are hybrid pixel sensors, passive sensors and recently also depleted monolithic active pixel sensors (DMAPS), which integrate the particle sensor with frontend electronics. The dominant material for the production of such sensors currently is silicon. However, the use of silicon carbide is currently being investigated. In this work we report on our progress on the development of silicon based DMAPS. Further, we present a novel front-end circuit for passive silicon carbide detectors.

The CERN RD50 CMOS working group is designing and characterizing depleted monolithic active pixel sensors (DMAPS) for use in high radiation environments fabricated in the LFoundry 150 nm HV-CMOS process. The first iteration of this chip, RD50-MPW1, suffered from high leakage current, low breakdown voltage and crosstalk. In order to mitigate these shortcomings, an improved version with improved pixel geometry was designed. The RD50-MPW2 integrates a matrix of 8 x 8 pixels with analog front-end, but no digital readout. It was delivered in early 2020 and characterized within lab-measurements, an irradiation campaign and test beams. To read out the chips the Caribou DAQ system is used with a custom chipboard as well as specific firmware and software modules. A third iteration of the chip, the RD50-MPW3, has been submitted to LFoundry in December 2021 and is expected to be delivered in May 2022. It will keep the well working analog part of its predecessor, completed by an in-pixel digital logic and an optimized peripheral readout for effective pixel configuration and fast serial data transmission. The chip will comprise a matrix of 64 x 64 pixels arranged in 32 double-columns. We will present an overview of the RD50 HV-CMOS activities focusing on the measurement results of RD50-MPW2 chip, as well as the design and readout of the RD50-MPW3.

The RD50-CMOS group aims to design and study High Voltage CMOS (HV-CMOS) chips for use in a high radiation environment. Currently, measurements are performed on RD50-MPW2 chip, the second prototype developed by this group. The active matrix of the prototype consists of 8x8 pixels with analog front end. Details of the analog front end and simulations have been already published earlier. This contribution focuses on the Caribou based readout system of the active matrix. Each pixel of the active matrix can be readout one after the other. Relevant aspects of hardware, firmware and software are introduced. As a first stage, firmware for a standalone setup is introduced and details on data flow are given. Afterwards, a second stage of the firmware capable of synchronizing with other detectors and accepting triggers is presented, focusing on operation of the chip in combination with a tracking telescope to measure efficiency and residuals.