In this paper, a hypothesis is further investigated which states the dependence of fracture toughness on the orientation of the crack opening to the topography of the surface of the lead frame which forms the interface with the EMC. Additionally, the size effect of the specimen width is investigated as well.A test series using the Advanced Mixed Mode Bending method was performed using eight samples. The samples are bi-material beams which are extracted from a mold map. The sample width was varied as well as the orientation of the beam according to the topography of the lead frame. The samples are destructively tested and the measured sensor and image data are then used in a finite element analysis. A new algorithm is introduced which utilizes a digital image correlation software to extract the displacement fields from the recorded images of the beam flank. The simulation results in form of the critical energy release rate $G_{c}$ versus the corresponding mode mixity $\psi$ of the eight samples are than analyzed to test the hypothesis of the orientation and the effect of the sample width as alias of the size effect.

Interlayer cooling has been demonstrated to enable heat removal scaling in true 3D integration. This technology will unavoidably expose tier interconnects to coolant. If using electrically conductive liquids, such as water based coolants, the interconnects require a sealing mechanism to protect from short-circuiting. As an efficient technological solution we present a concentric ring sealing, realized around the interconnect in the very same alloy, thereby forming a joint of its own. We compare different aspect ratios of upper and lower joining parts, as well as single joint sealing and multiple joint sealing. We demonstrate the post-bonding states of the sealing using CuSnAg, AuSn transient liquid phase bonding (TLPB) and Cu-Cu thermocompression bonding. We lay emphasis on the resulting intermetallic compounds and present shear strengths of consistently beyond 30 MPa, reaching up to 85 MPa, which clearly shows the feasibility of the concept.

In this paper, a cooling concept for power electronics is discussed, using thermo-electric cooling in combination with a phase-change based latent heat storage module. It was designed to cope with thermal transients due to periodic overload operation phases of an IGBT power converter module. Several sub-system simulations and experiments have already been performed in previous publications leading to the current design state, which is now being tested under emulated experimental conditions. Very good results are presented, showing the feasibility of the transient cooling concept. On-going work referred to the long-term thermal stability and operation as well as a smart electrical TEC control will be motivated.

This paper deals with the system design, technology and test of a novel concept of integrating silicon power dies along with thermo-electric coolers and a phase change heat buffer in order to thermally manage transients occurring during operation. The innovative power-electronics concept features double-sided cooling as well as new materials and joining technologies to integrate the dies such as transient liquid phase bonding/soldering and sintering. To avoid a cold plate at the backside, a new low-cost, low-footprint thermal storage device has been developed and optimized by simulation to meet the requirements given by this application. Coupled-field simulations are used to predict thermal performance and are being verified by especially designed test stands.

In this paper, a new and dedicated phase change cooling concept is discussed, following the goal to buffer periodic overload operations of electric power modules and thus keeping junction temperatures constant. A top-mounted latent heat storage material (LHSM) buffer is applied, to soak the overload heat in conjunction with thermo-electric coolers (TECs), which control the temperature and phase change process. The cooling system is going to be realized within an IGBT converter module, undergoing repeated overload situations. The concept features double-sided cooling and assembling as well as new materials and joining technologies such as transient liquid phase bonding/soldering and silver sintering. One-dimensional equivalent circuit estimations and transient electro-thermal FE simulations were used to calculate the cooling performance, extract optimization guidelines and discuss potential difficulties of the concept. Furthermore, the simulations are successively refined and brought into agreement with various test stands and characterization methods of reduced complexity.

This paper deals with the system design, technology and test of a novel concept of integrating Si and SiC power dies along with thermo-electric coolers in order to thermally manage transients occurring during operation. The concept features double-sided cooling as well as new materials and joining technologies to integrate the dies such as transient liquid phase bonding/soldering and sintering. Coupled-field simulations are used to predict thermal performance and are verified by especially designed test stands to very good agreement. This paper is the second in a series of publications on the ongoing work.

The experimental observation of the actual thermo mechanical weak points in microelectronics packages remains a big challenge. Recently, a stress sensing system has been developed by the publicly funded project that allows measuring the magnitudes and the distribution of the stresses induced in the silicon dies by thermomechanical loads. Moisture can saturate a package very fast at high temperatures and high humidity within hours but also at low temperatures and low humidity within weeks or months. Every normal stored or used package will be swelled due to this moisture. A high temperature over a short time or within the first cycle of a temperature cycling test will dry the package and the internal stress of the package decrease. This moisture swelling will be investigated in this paper. All measurements are supplemented by finite element simulations based on calibrated models for in depth analysis and for extrapolating the stress results to sites of the package that are not measured directly. The methodology of closely combining stress measurements and FE simulation presented in this paper has been able to validate the stress sensing system for tasks of comprehensive design and process characterization as well as for health monitoring. It allows achieving both, a substantial reduction in time tomarket and a high level of reliability under service conditions, as needed for future electronics and smart systems packages.

The demand of cost reduction and limited installation space for automotive applications requires new and innovative approaches. One approach is to substitute DCB substrates with high current circuit boards. These circuit boards with fully embedded actives like IGBTs and Diodes allows to avoid the use of bonding wires at all and benefit from the less expensive standard circuit board technologies. Moreover it should be possible to use double sided cooling for such devices. In this paper we investigate the influence of several geometry and material parameter, like layer thicknesses, thermal conductivity and cooling power on the thermal performance of a fully embedded 650V class half bridge test board. As input for the simulations the thermal conductivity of prepreg materials were measured. It could be shown that layer thicknesses have a significant impact of the necessary cooling power. The embedding of chips directly into laminated substrates seems reliable regarding thermal loading. Further results will be obtained by thermal measurements.

In MEMS packaging moisture uptake of packaging materials may lead to severe changes in sensor behavior and package reliability. Knowledge and understanding of the effect of moisture swelling on the overall package deformation and on the sensor system is therefore inevitable for a successful MEMS design and packaging solution. The paper shows a design optimization of a pressure sensor packaging towards minimization of sensor drift due to stresses induced by moisture uptake. The work was done in a combined experimental and simulative approach. Experimental data clearly shows the sensor sensitivity to moisture uptake of polymer based packaging material. Based on the experimental findings the complete sensor package was modeled by means of finite element analysis. In a second step a new packaging geometry was defined to reduce the effect of moisture swelling to sensor signal. Additionally sensitivity of the sensor output signal to viscoelastic properties of three different moulding compounds was simulated. In the result of the work an optimized package design was achieved.

The ongoing development of highly integrated electronic packages leads to a steadily increasing number of material interfaces within a package. In combination with increasing harshness (vibration, humidity, temperature) of the system environment the reliability of such packages is often dominated by interface fracture. Therefore interface fracture mechanics is one of the main focuses of electronics reliability research.. The authors present a combined simulative and experimental method for crack tip location determination and crack evaluation of interface specimens. The specimens are loaded in a testing apparatus which is an advancement of a mixed mode bending test. Based on crack length measurements and Finite Element Analysis crititcal energy release rates can be axtracted in a fast and inexpensive method.

The amount of heat to be dissipated from power electronics and microprocessors increases more and more. Therefore new interface materials with high electrical and thermal conductivity have to be considered. Silver is one of a few materials which can fulfil these demands. New low temperature, low pressure Ag-Sinter technologies allow it to use Silver as die attach material instead of solder or glue. Even though silver has excellent thermal and electrical properties, thermo-mechanical reliability aspects have to be considered. In this paper the thermo-mechanical reliability of chip-on-board (COB) assemblies for power applications are studied by experiment and simulation. Thereby the main focus is set on the characterization methods and low cycle fatigue failure behaviour of the die-attach material under thermal cycling conditions. Part of the work has been accomplished within the running EU Project "Nanopack".

As the demand for new thermal technologies and materials has been increasing over the years to provide thermal solutions to the next generation of power electronics, microprocessors and high-power optical systems also thermal characterisation methods have to keep up with the pace of this development with respect to resolution and accuracy. We have developed both bulk and interface technologies to reduce thermal resistance using Ag and Au-based materials and low-T and low-p processes to render them eligible for the electronics industry. New processes to generate nano-enhanced surface structures as well as thermo-compression bonding are examined within this paper. Along with these processes especially designed test stands are described which are able to extract the effects achieved by the technological advances.

One of the major topics in novel microelectronics are thin film materials – especially their mechanical properties. Accurate description of such materials is necessary in order to assess their reliability and to predict failures in electronic devices. The mechanical attributes of thin films can be determined using the nanoindentation test. However, with this equipment it is only possible to obtain estimates elastic parameters: Young's modulus and hardness of the thin layer. In the paper, it is demonstrated that with a support of numerical methods the plastic behaviour of the material can also be extracted. The numerical FEM model of the nanoindentation test was elaborated and numerical optimization algorithms were applied. The goal was to examine the elastoplastic behaviour of the investigated thin film, which is the aluminium layer in this case. Various numerical material models were used in order to decently extract the material properties of the investigated thin layer.

Current developments and trends in microelectronics are focused on thin layers and novel materials. This leads to application of different test and measurement methods, which are capable to measure basic mechanical properties of such materials on micro-scale and nano-scale. This paper focuses on application of the nanoindentation technique. It is one of the most common method for investigating the mechanical material properties (especially thin layers). In order to extract the basic elastic and elasto-plastic mechanical properties the numerical optimization algorithms were used as a support for the tests in combination with the FE-model of the nanoindentation process.

As the demand for new thermal technologies and materials has been increasing over the years to provide thermal solutions to the next generation of power electronics, microprocessors and high-power optical systems also thermal characterisation methods have to keep up with the pace of this development with respect to resolution and accuracy. Within the EU-funded project “Nanopack” we have developed both bulk and interface technologies to reduce thermal resistance using Ag-based materials and low-T and low-p processes to render them eligible for the electronics industry. New processes to generate nano-enhanced surface structures as well as thermo-compression bonding are examined within this paper. Along with these processes especially designed test stands are described which are able to extract the effects achieved by the technological advances.

Current developments and trends in microelectronics are focused on thin layers and novel materials. This leads to application of different test and measurement methods, which are capable to measure basic mechanical properties of such materials on micro-scale and nano-scale. The presented project focuses on application of the nanoindentation technique in order to extract the basic elastic and elasto-plastic mechanical properties of aluminium through analytical and numerical approaches. The results allowed to select the most appropriate elastoplastic material model that would be capable of fitting the experimental and numerical results. According to the performed analysis it was concluded that Ramberg-Osgood model fulfil the above criteria and can be used to predict the nanoindentation results in case of very thin aluminium layers.

As the development of microelectronics is still driving towards further miniaturization new materials, processes and technologies are crucial for the realization of future cost effective microsystems and components. These future systems will not only consist of SMDs and ICs assembled on a substrate, but will potentially integrate also living cells, organelles, nanocrystals, tubules and other tiny things forming a true Heterogeneous System. Futures ICs and passives will also decrease in size, e.g. for RF-ID applications forecast die sizes are smaller than 250 mu m, thicknesses less than 50 mu m and pitches way below 100 pm, passives, if not directly integrated into the system carrier, will be even smaller. New placement and joining technologies are demanded for reliable and low cost assembly of such applications, as today's packaging technologies only allow the assembly of those small dies and components with a very high effort and for this reason with high cost. With ongoing miniaturization also the protection of the microsystems mostly realized by a polymer needs to be decreased in thickness, yet providing maximum protection. Here, besides mechanical stability, humidity barrier functionality is a key factor for system reliability. Fraunhofer IZMs approaches towards packaging technologies facing the demands of future nano-based Hetero System Integration are described within this paper, comprising material and process development. Material developments focus on nano-particle enhanced polymers. One example are materials with optimized humidity barrier functionality, where various filler particles are integrated into a microelectronic grade epoxy resin and investigated regarding their barrier properties. Furthermore, the processing of nano-particle filled polymers is illustrated. Process development comprises touchless handling concepts that are promising for handling miniaturized components, not directly fabricated at the very place where they are needed. Different concepts are under evaluation. Magnetic handling can be regarded as one of the most ripened ones, thanks to the rugged approach explored. Another promising concept is the use of microdroplet manipulation by electrowetting. Results from both concepts show potential for future use. Finally advanced interconnect concepts for low temperature joining by CNT contacts or reactive interconnects are introduced. In summary an overview on nano-based technologies for heterogeneous system integration is given.

Polymer materials - mainly epoxy resins - are widely used in microelectronics packaging. They are established in printed circuit board manufacturing, for adhesives as die attach glues or for encapsulants as molding compounds, glob tops or underfill materials. Low cost and mass production capabilities are the main advantages of these materials. But like all polymers they can not provide a hermetical sealing due to their permeability properties. The susceptibility to water diffusion through the polymer and along the interfaces is a drawback for polymer materials in general. Water inside a microelectronic package might lead to softening of the material and to a decreasing adhesive strength and resulting delaminations close to solder bumps or wire bonds reducing package reliability by decreasing the package structural integrity. During package reflow, the incorporated humidity might lead to popcorning, i.e. abrupt evaporation of humidity during reflow soldering, is one major problem during plastic package assembly. The introduction of high temperature lead-free soldering processes has even increased this issue. Therefore, plastic packaging materials with enhanced humidity resistance would increase package reliability during assembly and lifetime without cost increase and with no changes in processing. The incorporation of nano-particles into plastic packaging materials is discussed as one potential solution for improved humidity resistance as it is a rather low effort approach to material modification opposed to chemical modification of the matrix. To evaluate the potential of such additives concerning moisture resistance the effect of nano-particles mixed with a microelectronic grade epoxy resin is studied. From the large variety of fillers available this work mainly focuses on three different types: nano-sized silica, modified bentonite and zeolites. Working principles of these particles range from large surface impact of nano-particles, barrier functionality due to stacked layer formation and molecular catcher function. Formulations with different particle concentrations and surface modifications are characterized regarding their influence on humidity diffusion, absorption and desorption behavior as well as their influence on other material properties as reaction kinetics, viscosity and thermomechanical properties. Additionally the combination of nanoand standard micro-particles needed for thermo-mechanical adjustment of the polymer properties is studied. Experimental work is accompanied by simulations, in order to provide further qualitative understanding on effects of particle form, size and surface properties. In summary this paper describes the potential of different nano-particles as additives for plastic packaging materials for enhanced humidity resistance/barrier enhancement within microelectronic packages. This topic is gaining increased importance when considering the trend towards System in Package, where a multitude of components is encapsulated to form one SiP that incorporates a large number of different material interfaces and interconnects. All these interfaces and interconnects need to be protected from degradation caused by moisture ingress, without allowing much increased package volume or package cost. Polymers with improved moisture resistance can be one building block of future moisture resistant packages - the results of this study show their large potential for this field of application.

Thermal characterisation of thermal interfaces becomes even tougher a challenge at low bond line thicknesses and higher thermal conductivities of the interface materials as more accurate measurement techniques are required. As in parallel the quest for high conductivity adhesives and greases is ongoing, a correlation between thermal bulk or interface properties and structure is in high demand. We have developed test-stands for various classes of thermal interface materials. These permit characterisation for materials with thin bond line thickness and high thermal conductivity still using steady state techniques. The methods are benchmarked for greases, adhesives and sintered silver. For the latter, the technology development is described. Then, structural features such as particle density and porosity are examined. It will be the aim to compare and correlate them to thermal resistance. Part of the work has been accomplished within the running EU. Project "Nanopack".

This paper investigates the thermo-mechanical reliability of inter-chip-vias (ICV) for 3D chip stacking after processing and under external thermal loads relevant for the envisaged field of application (mobile, automotive) by Finite Element simulation. First the materials are characterised by nano-indentation to determine elasto-plastic data. Finite Element simulations are used to reproduce these data and to extract local material properties like E-modulus and yield stress. Accumulated plastic strain is used as failure indicator under periodic thermal loading of an ICV. Geometrical, material and process-related parameters are varied to obtain first design guidelines for this new technology. The locations of stress and strain accumulation are given.