Various design issues pertaining to SiC-based IGBTs are described. A trench gate, p-channel IGBT was considered the most appropriate structure for fabrication in SiC. The fabrication and characterization of high temperature SiC IGBTs with high current levels are presented. Using optimized emitter processing, 6H-SiC p-IGBTs show a higher current capability than 4H-SiC p-IGBTs because of their lower emitter contact resistance and higher MOS channel mobility. Since IGBTs rely on minority carrier injection, the low bulk mobility parallel to the c-axis in 6H-SiC was not found to severely affect the current carrying capability as compared with 4H-SiC IGBTs in the present design. Measured results of these devices are described from room temperature to the 350-400/spl deg/C temperature range. For both polytypes, the current capability was found to be much larger when their MOS gates were fabricated in the 112~0 crystal direction compared with the 1100 crystal direction. The emitter (p-type) contact anneal was also found to significantly affect the performance of SiC IGBTs. 4H-SiC IGBTs showed a -85 V blocking capability (room temperature) and on-current of 100 mA at 350/spl deg/C. 6H-SiC IGBTs were demonstrated with -400 V blocking capability (at 25/spl deg/C) and 2 A at 400/spl deg/C.

Planar 4H-SiC accumulation channel field-effect transistor (ACCUFET) have been designed, fabricated, and characterized. Detailed design and processing experiments were conducted on relatively large area ACCUFETs to boost their power ratings. A detailed two-dimensional (2-D) simulation design suggests that the. optimum spacing between two. adjacent P+ regions is approximately 4 mum. A-novel process with epitaxial regrowth over ion implanteIt p+ base region was developed to achieve a high accumulation layer mobility. Process splits from, e nitrogen-rich post gate oxidation anneals revealed that the lowest on-resistance and optimum threshold voltage were obtained from N2O annealed samples. 550 V blocking voltage with 22 mOmega-cm(2), were demonstrated on 2 A 4H-SiC-ACCUFETs. Using a newly developed hex-gate design, larger, 20 A 4H-SiC ACCUFETs are presented here with stable high temperature characteristics. In, these high-current devices, the threshold voltage decreases linearly from 1.5 V to 0.9 V, while the extracted channel mobility increases from 18 cm(2)/V-s to 33.6 cm(2)/V-s as the operating temperature is increased from 30 degreesC to 200 degreesC.

Planar gate 4H-SiC ACCUFETs have been designed, fabricated and characterised, and the highest reported current (> 20 A) for this type of device was achieved. A novel channel design to maximise the channel density was implemented. A low specific on-resistance of 15 mOmega-cm(2) was obtained on a 9 mm(2) device using newly developed N2O anneals on gate oxides. The threshold voltage decreases from 1.5 to 0.9 V, and the extracted channel mobility increases from 18 to 33.6 cm(2)/V-s as the operating temperature is increased from 30 to 200degreesC.

The design, fabrication process, and high temperature characteristics of a 4H-SiC rectifier with a 7.4 kV, 330 A (pulsed) capability is reported. A highly-doped p-type epitaxial anode layer and junction termination extension were used to obtain good on-state and stable reverse blocking characteristics. A forward voltage drop of 4.5 V was observed at 100 A/cm(2) (36 A). Measurements in the 25-200degreesC range show little change in reverse leakage characteristics up to 4.5 kV. Reverse recovery measurements for a forward current density of 100 A/cm(2) show a modest 33% increase (from 18 to 24 A) in the peak reverse recovery current, and only a 113% increase (from 1.8 to 3.8 muC) in Q(pi) at 200degreesC compared to 25degreesC.

This paper reports the detailed design, fabrication, and characterization of two sets of high-power 4H-silicon carbide (4H-SiC) junction barrier Schottky (JBS) diodes - one with a 1500-V, 4-A capability and another with 1410-V, 20-A capability. Two-dimensional (2-D) device simulations show that a grid spacing of 4 /spl mu/m results in the most optimum trade-off between the on-state and off-state characteristics for these device ratings. JBS diodes with linear and honeycombed p/sup +/ grids, Schottky diodes and implanted p-i-n diodes fabricated alongside show that while 4H-SiC JBS diodes behave similar to,Schottky diodes in the on-state and switching characteristics, they show reverse characteristics similar to p-i-n diodes. Measurements on 4H-SiC JBS diodes indicate that the reverse-recovery time (/spl tau//sub rr/) and associated losses are near-zero even at a high reverse dI/dt of 75 A//spl mu/s. A dc/dc converter efficiency improvement of 3-6% was obtained over the fastest, lower blocking voltage silicon (Si) diode when operated in the 100-200 kHz range.

This paper reports the design, fabrication process, and high temperature characteristics of a 4H-SiC rectifier with a 10 W, 200 A (pulsed) rating. A highly doped p-type epitaxial Anode layer and junction termination extension (JTE) were used in order to get good on-state and stable blocking characteristics. A forward voltage drop of less than 4.8 V was observed at 100 A/cm(2) in the entire 25 to 200degreesC temperature range. The reverse recovery characteristics show only a modest 110% increase in the peak reverse recovery current from 25degreesC to 200degreesC. Measurements at a forward current density of 220 A/cm(2) show that a dramatically low Q(Pi) of 3.8 muC is obtained in 4H-SiC rectifier at 200degreesC.

SiC electronic device technology has made rapid progress during the past decade. In this paper, we review the evolution of SiC power MOSFETs between 1992 and the present, discuss the current status of device development, identify the critical fabrication issues, and assess the prospects for continued progress and eventual commercialization.

This paper reports the design, fabrication and high temperature characteristics of 1 mm(2), 4 mm(2) and 9 mm(2). 4H-SiC p-i-n rectifiers with 6 kV, 5 kV, and 10 kV blocking voltage, respectively. These results were obtained from two lots in an effort to increase the total power levels on such rectifiers. An innovative design utilizing a highly doped p-type epitaxial Anode layer and junction termination extension (JTE) were used in order to realize good on-state as well as stable blocking characteristics. For the 1 mm(2) and 4 mm(2) rectifier, a forward voltage drop of less"than 5 V was observed at 500 A/cm(2) and the peak reverse recovery current shows a modest 50% increase in the 25 degreesC to 225 degreesC temperature range. On the 10 kV, 9 mm(2) rectifier, a forward voltage drop of less than 4.8 V was observed at 100 A/cm(2) in the entire 25 degreesC to 200 degreesC temperature range. For this device, the reverse recovery characteristics show a modest 110% increase in the peak reverse recovery current from 25 degreesC to 200 degreesC. A dramatically low Q(rr) Of 3.8 muC was obtained at a forward current density of 220 A/cm(2) at 200 degreesC for this ultra high voltage rectifier. These devices show that more than three orders of magnitude reduction in reverse recovery charge is obtained in 4H-SiC rectifiers as compared to comparable Si rectifiers.

The first high voltage npn bipolar junction transistors (BJTs) in 4H-SiC have been demonstrated. The BJTs were able to block 1800 V in common emitter mode and showed a peak current gain of 20 and an on-resistance of 10.8 m/spl Omega//spl middot/cm/sup 2/ at room temperature (I/sub C/=2.7 A @ V/sub CE/=2 V for a 1 mm/spl times/1.4 mm active area), which outperforms all SiC power switching devices reported to date. Temperature-stable current gain was observed for these devices. This is due to the higher percent ionization of the deep level acceptor atoms in the base region at elevated temperatures, which offsets the effects of increased minority carrier lifetime at high temperatures. These transistors show a positive temperature coefficient in the on-resistance characteristics, which will enable easy paralleling of the devices.

A 2-mm x 2-mm, 4H-SiC, asymmetrical npnp gate turn-off (GTO) thyristor with a blocking voltage of 3100 V and a forward current of 12 A is reported. This is the highest reported power handling capability of 37 kW for a single device in SiC, The 5-epilayer structure utilized a blocking layer that was 50 mum thick, p-type, doped at about 7-9 x 10(14) cm(-3). The devices were terminated with a single zone junction termination extension (JTE) region formed by ion-implantation of nitrogen at 650 degreesC, The device was able to reliably turn-on and turn-off 20 A (500 A/cm(2)) of anode current with a turn-on gain (I-K/I-G, (on)) of 20 and a turn-off gain (I-K/I-G, (off)) of 3.3.

This paper reports the design, fabrication process, and high temperature characteristics of a 4H-SiC rectifier with a 5 kV, 20 A rating. A highly doped p-type epitaxial Anode layer and junction termination extension (JTE) mere used in order to get good on-state and stable blocking characteristics. A forward voltage drop of less than 5 V was observed at 500 A/cm/sup 2/ in the entire 25 to 225/spl deg/C temperature range. The reverse recovery characteristics show only a modest 50% increase in the peak reverse recovery current from 25/spl deg/C to 225/spl deg/C. Measurements at a forward current density of 150 A/cm/sup 2/ show that a four orders of magnitude reduction in Q/sub rr/ is obtained in 4H-SiC rectifiers as compared to comparably rated Si rectifiers.

The prime benefit of the SiC Schottky diode lies in its ability to switch fast (<50 ns) and with almost no reverse recovery charge. The incorporation of a SiC Schottky-type rectifier in typical power-electronic systems, such as motor drive circuits and switching power supplies, will virtually eliminate the switching losses. In the forward bias, Ti Schottky diode provides a forward current density of 100 A/cm/sup 2/ at a forward drop of 1.15 V, at room temperature. However, the low barrier height of Ti Schottky diode results in a very high room temperature leakage current density of 300 /spl mu/A/cm2 at 500 V. Furthermore, the leakage current becomes unacceptable at temperatures higher than 100/spl deg/C. A 4H-SiC merged PiN Schottky (MPS) diode uses interdigitated p/sup +/ regions between Schottky contacts to limit the electric field at the Schottky interface during the off-state operation of the device. It has a low on-state voltage drop and fast switching of a Schottky diode and offers a low off-state leakage current like the PiN diode. The on-state and off-state performance was optimized by analyzing the effect of adjacent p/sup +/ region width and spacing by 2D device simulations.