This paper presents a tunable transmission line (t-line) structure, featuring independent control of line inductance and capacitance. The t-line provides variable delay while maintaining relatively constant characteristic impedance using direct digital control through FET switches. As an application of this original structure, a 60 GHz RF-phase shifter for phased-array applications is implemented in a 32 nm SOI process attaining state-of-the-art performance. Measured data from two phase shifter variants at 60 GHz showed phase changes of 175° and 185°, S21 losses of 3.5-7.1 dB and 6.1-7.6 dB, RMS phase errors of 2° and 3.2°, and areas of 0.073 mm 2 and 0.099 mm 2 respectively.

In this paper, we present a cost-effective JFET integrated in 0.18μm RFCMOS process. The design is highly compatible with standard CMOS process, therefore can be easily scaled and implemented in advanced technology nodes. The design impact on Ron and Voff is further discussed, providing the insights and guidelines for JFET optimization. Besides the superior flicker noise (1/f noise) characteristics, this JFET device also demonstrates promising RF characteristics such as maximum frequency, linearity, power handling capability, power-added efficiency, indicating a good candidate for RF designs.

A millimeter wave (MMW) on-chip passive frequency-dependent inductor is described with different designed inductance values targeted at different frequency ranges using one device. The proposed frequency-dependent inductor design allows the optimization of multi-band impedance matching for MMW analog circuit designs with a single all-passive on-chip device. This device uses low-loss natural capacitors and multiple capacitively loaded ground return lines to provide MMW frequency-dependent effective device inductance. No on-chip switches are required in the proposed inductor design and it can allow circuit size reduction by allowing a single inductor to target different frequency ranges. Simulated inductance values in a 130 nm BiCMOS technology show a 61% change in inductance is possible between two frequency ranges: f <; 25 GHz, and f > 48 GHz. The proposed frequency-dependent inductor design has also been designed and measured in a 45 nm CMOS process. Measured results show that the use of multiple capacitively loaded ground return lines is effective in creating an on-chip MMW frequency-dependent inductor.

For the first time, a high performance, low leakage Schottky barrier diode (SBD) with cutoff frequency above 1.0 THz in a 130nm SiGe BiCMOS technology for millimeter-wave application is described. Device optimization has been evaluated by varying critical process and layout parameters such as, anode size, cathode depth, cathode resistivity, junction tailoring, and guardring optimization is investigated

This paper compares different de-embedding techniques for on-wafer transmission line interconnect characterization. The main goal is to contrast and correlate de-embedded S-parameters and extracted electrical characteristics versus industry standard electromagnetic solver results. For the first time the simplified "thru" technique and new "short-open" method are employed for de-embedding on-chip coplanar waveguides over the 0.1-70 GHz frequency bandwidth.