In this letter, we report a dual ion beam sputtered Y2O3 memristor, which exhibits stable bipolar resistive switching governed by the filamentary switching mechanism. The obtained experimental data reveal that the fabricated devices show large memory switching window (>10(5)) with excellent endurance (>5 x 10(4) cycles) and retention (>10(6) s) properties by maintaining a high value of the ON/OFF ratio. Moreover, C-AFM analysis also confirms that the fabricated devices exhibit filamentary switching. The fabricated devices efficiently emulate the synaptic learning behavior with better linearity in weight update.

Analog memristors with multilevel cells are suitable for analog in-memory and neuromorphic applications. Herein, we report a 2-bit/cell complementary-metal-oxide-semiconductor (CMOS)-compatible HfO2/Ta2O5 bilayer memristor with both TiN electrodes fabricated via single thermal atomic layer deposition at 300 degrees C. The fabricated devices exhibit stable bipolar switching characteristics distinguished between both low resistance state and the high resistance state with a P/E endurance of 105 WRITE cycles, as well as show better retention property beyond 104 s. The devices exhibited excellent uniformity in terms of low device-to-device (D2D) and low cycle-to-cycle (C2C) variation. Furthermore, analog switching responses are implemented with the pulse width from 2 ms to 500 & micro;s, and the corresponding percentage change in the device resistance was measured. The results exhibit a significant change in the device resistance even at 500 & micro;s, with an overall change in the device resistance in the range of 10%-17%. In addition, the performance of the devices has been verified for neuromorphic applications using the experimentally extracted data. The non-linearity of 0.07, including highly stable synaptic plasticity, has been achieved using symmetric pulses, making the devices compatible for designing an analog memristor-based neuromorphic computing system hardware.

In this work, we report the implementation and performance evaluation of memristor-driven fundamental logic gates, including NOT, AND, NAND, OR, NOR, and XOR, and novel and optimized designs of the sequential logic circuits, such as D flip-flop, T-flip-flop, JK-flip-flop, and SR-flip-flop. The design, implementation, and optimization of these logic circuits were performed in SPECTRE in Cadence Virtuoso and integrated with 90 nm CMOS technology node. Additionally, we discuss an optimized design of memristor-driven logic gates and sequential logic circuits, and draw a comparative analysis with the other reported state-of-the-art work on sequential circuits. Moreover, the utilized memristor framework was experimentally pre-validated with the experimental data of Y2O3-based memristive devices, which shows significantly low values of variability during switching in both device-to-device (D2D) and cycle-to-cycle (C2C) operation. The performance metrics were calculated in terms of area, power, and delay of these sequential circuits and were found to be reduced by more than ∼24%, 60%, and 58%, respectively, as compared to the other state-of-the-art work on sequential circuits. Therefore, the implemented memristor-based design significantly improves the performance of various logic designs, which makes it more area and power-efficient and shows the potential of memristors in designing various low-power, low-cost, ultrafast, and compact circuits.

This letter presents a flexible Ag/MoS2:PVA/SiO2/Pt memristor featuring controllable transition between volatile self-rectifying threshold switching (SRTS) and non-volatile bipolar resistive switching dependent on compliance current (CC) and operating voltage. The device exhibits a high rectification ratio (∼ 103) and ultrafast relaxation (∼170 ns) time in SRTS mode, functioning as an effective selector. In non-volatile mode, it exhibits stable multi-level storage and persistence photoconductivity (PPC) under a red light source, enabling optoelectronic synaptic emulation. Integrated NeurosimV 3.0 hardware simulation reveals weight updates (NLP/D ≈ 4.21/ − 4.86) functionality and achieves 85% MNIST handwritten dataset classification accuracy. These results provide a robust, single-layer optoelectronic memristive hardware platform for integrated sensing, cell selection, and neuromorphic computing in flexible electronics.

we report the microfabrication process and detailed electrical analysis of atomic layer deposition (ALD) HfO2/Ta2O5 memristive devices with a size of (5 x 5 = 25) mu m2. Initially, the forming process was required to exhibit stable bipolar resistive switching responses, and after the forming process, fabricated devices were efficiently shown to exhibit switching responses over thousands of cycles with a high ON/OFF ratio (10(4)) even under the applied voltage of +/- 1.2 V. Moreover, fabricated devices successfully exhibited the switching response over different voltage scan ranges. In addition, multilevel current (MLC) capability was also exhibited under the variations in the amplitude of the device compliance current (I-CC), and in this case, the coefficient variability (C-V) in the device switching voltages is impressively low, having the values of 5.65% and 4.66% in V-SET and V-RESET, respectively. The fabricated standalone devices exhibited the lowest values of C-V in both VSET and V-RESET in the case of the cycle-to-cycle (C2C) (V-SET: 2.24%, V-RESET: 1.14%) and device-to-device (D2D) (V-SET: 4.39%, V-RESET: 5.50%). Furthermore, the impedance spectroscopy analysis revealed that the switching mechanism in the fabricated devices was purely resistive, as no significant change was observed in the device capacitance under both low-resistance state (LRS) and high-resistance state (HRS). Therefore, this work shows improved HfO2/Ta2O5-based memristive device performance via device scaling and a single ALD system, which can help deposit high-k dielectric materials for memristive arrays over large-scale wafers.

In this article, the analog and radio-frequency (RF) performance of MgZnO/ZnO heterojunction thin-film transistors (HJ-TFTs) with a focus on device-level figures of merit has been investigated for cutting-edge electronic applications. Polarization-induced charge accumulation at the interface of proposed device allowed that greater carrier confinement, which enhances the electron transport properties. Important analog properties are methodically examined as functions of bias conditions, such as transfer characteristics, output characteristics, transconductance, and output resistance, respectively. Small-signal equivalent circuit modeling is used to assess RF performance by extracting the cut-off frequency while taking parasitic resistances and capacitances into consideration. The obtained result compared to traditional ZnO TFTs, MgZnO/ZnO HJ-TFTs have better analog gain and RF response, which show that the proposed device used in low-power analog and radio frequency circuit applications.

Optoelectronic memories have gained remarkable attention owing to their inherent capability of manipulating charge carriers under the influence of both electrical and light stimuli. The emerging optoelectronic neuromorphic devices can be used in diverse applications, including logical data processing, confidential information recording, and next-generation bionic visual systems. Photosensitive materials are foundational to many technologies, including solar cells, sensors, thin-film transistors, and light-emitting diodes. Recently, two-dimensional (2D) photosensitive materials have found application in bionic visual hardware based on optoelectronic synaptic memristor and memtransistor devices. The synthesis and growth of optoelectronic memories driven by 2D photosensitive materials have opened new horizons in the field of bionic visual systems due to their diverse optical properties, atomic scalability, and ultrafast charge carrier dynamics. This review highlights the recent developments in bionic visual hardware based on optoelectronic synaptic memristive devices and memtransistors, wherein various 2D photosensitive materials and device structures have been utilised. We first summarise the limitations of traditional computing, highlight the key advantages of this novel computing paradigm, and discuss the fundamentals of bio-vision formation. Next, we comprehensively review the various device structures and operating mechanisms of optoelectronic memristive and memtransistor architectures. The recent developments in optoelectronic synaptic devices by incorporating various 2D photosensitive materials and their application in the field of bionic visual perception are also discussed. Finally, we outline the current drawbacks and challenges of optoelectronic neuromorphic devices and the future perspective of bionic visual hardware on real system realisation.

This study investigates several spacer materials, such as single-k (Air and SiO2) and dual-k (SiO2+HfO2, and Si3N4+HfO2) analyzing their influence on DC/Analog performance of three advanced nanosheet FETs i.e. SNSFET, HS NSFET, and PHS NSFET utilizing properly calibrated Sentaurus TCAD simulation models. Findings demonstrate that high-k spacers enhance device scalability, but low-k spacers diminish parasitic capacitance in high-speed applications. Combination of Si3N4 and HfO2 spacer material gives better results on DC characteristics (ON current (ION), ION/IOFF ratio, subthreshold swing (SS), drain induced barrier lowering (DIBL)) and Aanalo/RF (radio frequency) characteristics (transconductance (gm), cutoff frequency (fT), gain badwidth product (GBP), and transconductance frequency product (TFP)) compared to spacer materials of Air, SiO2 and SiO2+HfO2. This study offers insights into the selection of spacer materials for next generation nanoscale devices, enhancing reliability, and device performance.

In this work, an atomic layer deposited (ALD) Hf1Zr1O4 (HZO)-based switching layer is investigated in the device structure of a TiN/HZO/TiN. The thickness of the switching layer is ∼10 nm, which was grown by the thermal ALD at 250 °C by a super-cycle approach. Both pristine and annealed (400 °C for 60 s in N2) devices exhibit stable bipolar resistive switching responses after an essential electroforming process. However, the annealed devices require a relatively higher forming voltage but significantly improved ON/OFF ratio than pristine devices, which can be due to a certain modification at the TiN/HZO interface. The significant improvement in the ON/OFF ratio is attributed to the formation of nano-crystallinity in the film and an increment in sub-oxide content. The X-ray photoelectron spectroscopy (XPS) analysis also reveals the formation of a significant amount of sub-oxide (HfO2-x and ZrO2-x) after the annealing process. Additionally, the pristine devices exhibit comparatively poor switching stability and show a systematic decrement in the hysteresis loop, i.e., 73% after 100 switching cycles, whereas only a ∼22% drop is observed with annealed samples that significantly enhance the device stability. Lastly, the annealed device exhibits high volatility towards multiple programmable states, which can be useful in the development of multilevel memory storage, in-memory computation, and neuromorphic computation.

Scientific achievement are pushing technological limit, flexible wearable machinery is adding immense importance in the research and development. High thermal budget is a key challege in flexible system from the performance as well as fabrication sides. In this report, We demonstrate complimentary-metal-oxide-semiconductor (CMOS) process-compatible HfOx-based stacked memristors fabricated on flexible polyimide substrates, engineered to withstand high thermal budgets for neuromorphic deployment. These devices exhibit ION/IOFF ratios exceeding 1.6×103 at 100 µA compliance (CC) with exceptional device-to-device uniformity. Exceptional mechanical robustness of >103 bending cycles at 5 mm curvature and endurance >106 WRITE, sequences renders them ideal for online neural, network training, while >104 s retention at 120°C enables robust long-term inference. Device performance was validated through Hopfield Neural Network (HNN) simulations using experimentally calibrated parameters, achieving nonlinearity of 1.5 and superior pattern recognition from baseline noisy inputs.

Here, we report a large-scale wafer microfabrication process and in-depth electrical analysis of atomic layer deposition (ALD) grown bilayer (i.e., HfO2/Ta2O5) memristive devices. The fabricated bilayer devices initially require an electroforming event and show stable bipolar resistive switching responses with some variations in the device switching voltages. These variations are covered in the 15.7%–22.7% range corresponding to the maximum switching voltage of the tested devices. Moreover, time series analysis (TSA) is employed by considering the device switching voltages (VSET and VRESET) to predict the device performance and the obtained outcomes are well matched to the experimental data. Furthermore, the least values of coefficient of variability (CV) in the device switching voltages are 6.09% (VSET) and 3.22% (VRESET) in the case of device-to-device (D2D) while 1.76% (VSET) and 2.14% (VRESET) in the case of cycle-to-cycle (C2C). Furthermore, the fabricated devices efficiently perform the synaptic functionalities in terms of potentiation (P) and depression (D), paired-pulse facilitation (PPF), and paired-pulse depression (PPD), with a least value of nonlinearity (NL) factor of 0.43 in synaptic response, which is close to the ideal value of NL in biological synapses. Therefore, the present work shows that the single ALD system can be an efficient deposition method to deposit high-k oxide materials for memristive arrays over large-scale wafers.

Metal-organic frameworks (MOFs) are 3D materials with advanced characteristics due to their porous nature and the presence of catalytic nodal metal centers. These materials can be of enormous importance as sensor matrix components for wide applications, such as environmental monitoring. In this work, we have attempted the stacking of two MOFs, a NiMOF, followed by CoMOF, which was further functionalized with gold nanoparticles to detect nitrite ions (NO2-) in real/environmental water samples. Nitrite is a naturally occurring plant nutrient present in the soil and is also used as a preservative in industries; however, it can generate carcinogenic precursors at higher concentrations. The catalytic sensing probe was developed to detect NO2- through its electrochemical oxidation to NO3- at a specific potential. The glassy carbon electrode/nickel MOF/cobalt MOF (GCE/NiMOF/CoMOF) surface was constructed through a facile and faster approach of electrodeposition. The final sensing probe was thoroughly characterized by various physical and electrochemical techniques. It displayed enhanced analytical performance in terms of its wide linear dynamic range between 0.01 to 1000 mu M and a limit of detection of 4.2 nM. It exhibited a rapid average response time of about <1.5 s, making it an ultrasensitive sensing platform for NO2- in environmental water samples. A systematic integration with a smartphone application has also been proposed for on-site application of the sensor, where a single-fed input value determines the real-time NO2- concentration in test water samples.

Herein, we present a CMOS-compatible fabrication process, in-depth materials, and electrical analysis of yttrium oxide (Y2O3)-based memristive devices having a device size of 100 μm2. The fabricated devices exhibit improved performance by incorporating TiN electrodes and device scaling and efficiently emulate the various low-power neuromorphic and pattern recognition tasks. The fabricated memristive devices exhibit stable bipolar resistive switching behavior with an excellent endurance beyond 50,000 cycles and retention properties exceeding 106 s by maintaining a very high ON/OFF ratio of 104. Additionally, the fabricated devices show remarkable stability in the device switching voltages under cycle-to-cycle (C2C) and device-to-device (D2D) wherein, the coefficient of variability (CV) in the device switching voltages in C2C and D2D is 4.95% and 11.39%, respectively. Moreover, the fabricated devices efficiently emulate the synaptic response by emulating potentiation, depression, paired-pulse facilitation (PPF), and paired-pulse depression (PPD) and also exhibit the device conductance tunability under the variations in the pulse width as similar to the biological synapse counterpart. Furthermore, the fabricated devices efficiently show the pattern recognition task by achieving an accuracy of 88.2% for the handwriting MNIST dataset. Therefore, the present work opens a new horizon in the field of miniaturized artificial synapses and neuromorphic computing to perform various operations.

In this work, a low-voltage-driven theoretical memristor framework is presented with its in-depth parametric evaluation and its neuromorphic computing functionalities, including spike-time dependent plasticity (STDP) via Hebbian learning rules. The presented memristor model efficiently emulates the fundamental pinched hysteresis loop under the application of an input voltage amplitude of 10 mV, which enables its adaptability in low-voltage operation. Moreover, the memristor model efficiently emulates its response under the variations in the applied voltage, initial state variable, boundedness of state variable, control parameter for the rate of change of state variable, experimental fitting parameters, magnitude of exponentials, and conductivity slope parameters. These aforementioned parameters significantly affect the response of the memristor model, which further requires their optimization to understand their impact on the memristor characteristics. Therefore, these parameters are scrutinized based on their strong to weak impact on the memristor model response and its suitability in the neuromorphic computation. Additionally, the presented memristor model efficiently emulates various neuromorphic computing characteristics, including potentiation, depression, conductance tuneability, short-term memory (STM), long-term memory (LTM), transition from STM-to-LTM and vice versa, paired pulse facilitation (PPF), synaptic re-stimulation process, and STDP via Hebbian learning rules. Therefore, the presented theoretical memristor framework can be further useful in the in-memory computation circuit hardware, low-voltage logic operation, pattern recognition, and neuromorphic computing.

The rising demand for wearable electronics has motivated a shift towards the creation of a flexible, and self-sustaining power solution. Supercapacitors have the ability to power wearable electronics systems because of their rapid storage capabilities, short discharge times, wearability and flexibility, and superior cyclic stability. Supercapacitor charging can be achieved by integrating mechanical energy harvesters based on piezoelectric and triboelectric effects to develop self-charging power systems (SCPSs). However, triboelectric nanogenerators (TENGs) are preferred over piezoelectric nanogenerators (PENGs) as they are easy to design in different device modes, and offer mechanical energy extraction from body movements, high electrical performance and a wide choice of device materials. This paper comprehensively explores recent emerging trends in flexible supercapacitors integrated with TENGs to develop SCPSs for multifunctional electronics applications. It delves into the operational principles of supercapacitors and TENGs, material selection, the integration of various supercapacitor configurations with TENGs for diverse application perspectives, and the timeline on the development of SCPSs. The review also encapsulates the significance of power management circuits (PMCs) aimed at enhancing energy storage efficiencies in integrated SCPSs. Additionally, an elaborative analysis of the limitations, challenges, and future prospects for SCPSs tailored for self-powered electronics is also provided.

Analog memristors with multiple conducting states are desirable for analog in-memory and neuromorphic computing applications. Herein, a HfO2/Ta2O5 bilayer switching layer-based memristor device with both TiN electrodes is fabricated via single thermal atomic layer deposition at 300 °C. The fabricated devices exhibit stable bipolar resistive switching characteristics, wherein a pre-forming process is essentially required. Moreover, the device is successfully distinguished between both low resistance state (LRS) and the high resistance state (HRS) over hundreds of switching cycles, as well as showing better retention property beyond 900 s. Furthermore, analog switching responses are implemented by varying the pulse width from 2 ms to 100 µs, and the corresponding percentage change in the device resistance is measured. The results exhibit a significant change in the device resistance even under 100 µs, with an overall change in the device resistance in the range of 10-17%. These findings are significant in designing an analog memristor for neuromorphic computing.

Here, we report the detailed fabrication and electrical analysis of atomic layer deposited single (i.e., HfO2) and bilayer (i.e., HfO2/Ta2O5)-based memristive devices. The bilayer devices show stable retention properties >10(3) s with an improved on/off ratio. Moreover, the bilayer devices also exhibit higher change in the device resistance (25%-30%) as compared to resistance change (similar to 12%) in single-layer devices under the same electrical programming scheme. The least values of coefficient of variability (C-V) in cycle-to-cycle (C2C) in the device resistance states are 0.19% low-resistance state (LRS) and 0.28% high-resistance state (HRS) for single-layer device, while in the case of bilayer devices, these values are 1.10% (LRS) and 0.29% (HRS). Furthermore, the impedance spectroscopy (EIS) analysis reveals that the switching mechanism is more dominant due to the change in the device resistance rather than the device capacitance. Therefore, this work opens a new way to further explore the ac analysis of memristive devices and their potential applications in various fields.