3C-SiC is a promising material for low-voltage power electronic devices but its growth is still challenging. Heteroepitaxy of 3C-SiC on Si micrometer-sized pillars is regarded as a viable method to achieve high crystalline quality, minimizing the effects of lattice and thermal expansion mismatch. Three-dimensional micro-crystals with sharply-faceted profiles are obtained, eventually touching with each other to form a continuous layer, suspended on the underlying pillars. By comparing experimental data and simulation results obtained by a phase-field growth model, here we demonstrate that the evolution of the crystal morphology occurs in a kinetic regime, dominated by the different incorporation times on the crystal facets. These microscopic parameters, effective to characterize the out-of-equilibrium growth process, are estimated by a best-fitting procedure, matching simulation profiles to the experimental one at different deposition stages. Then, simulations are exploited to inspect the role of a different pillar geometry and template effects are recognized. Finally, coalescence of closely spaced crystals ordered into an hexagonal array is investigated. Two possible alignments of the pattern are compared and the most convenient arrangement is evaluated.

We present an investigation of the structural quality of arrays of 3C-SiC micropillars and microridges grown epitaxially on deeply etched Si(0 0 1) substrates offcut towards [1 1 0]. Using high resolution X-ray diffraction with reciprocal space mapping and optical as well as scanning electron microscopy, we obtain information about the stacking fault (SF) formation in different crystallographic directions. The SF density is strongly correlated with the microcrystal size and orientation and a reduction of the SF density is found in the [1 1 1] and [1-1 1] directions. No variation of the average SF size was detected for varying SiC microcrystal size and shape.

2 h110i in three dimensional Ge crystals grown on (001)-Si substrates Y. Arroyo Rojas Dasilva, M. D. Rossell, D. Keller, P. Gr€ oning, F. Isa, T. Kreiliger, H. von K€ anel, G. Isella, and R. Erni Electron Microscopy Center, EMPA, Swiss Federal Laboratories for Materials Science and Technology, D€ ubendorf, Switzerland Laboratory for Thin Films and Photovoltaics, EMPA, Swiss Federal Laboratories for Materials Science and Technology, D€ ubendorf, Switzerland Advanced Materials and Surfaces, EMPA, Swiss Federal Laboratories for Materials Science and Technology, D€ ubendorf, Switzerland Solid State Physics Laboratory, ETH, Zurich, Switzerland L-NESS and Department of Physics, Politecnico di Milano, Como, Italy

Monolithic integration of III-V compounds into high density Si integrated circuits is a key technological challenge for the next generation of optoelectronic devices. In this work, we report on the metal organic vapor phase epitaxy growth of strain-free GaAs crystals on Si substrates patterned down to the micron scale. The differences in thermal expansion coefficient and lattice parameter are adapted by a 2-μm-thick intermediate Ge layer grown by low-energy plasma enhanced chemical vapor deposition. The GaAs crystals evolve during growth towards a pyramidal shape, with lateral facets composed of {111} planes and an apex formed by {137} and (001) surfaces. The influence of the anisotropic GaAs growth kinetics on the final morphology is highlighted by means of scanning and transmission electron microscopy measurements. The effect of the Si pattern geometry, substrate orientation, and crystal aspect ratio on the GaAs structural properties was investigated by means of high resolution X-ray diffraction. The thermal strain relaxation process of GaAs crystals with different aspect ratio is discussed within the framework of linear elasticity theory by Finite Element Method simulations based on realistic geometries extracted from cross-sectional scanning electron microscopy images.

The growth morphology of epitaxial 3C-SiC crystals grown on hexagonal pillars deeply etched into Si (111) substrates is presented. Different growth velocities of side facets let the top crystal facet evolve from hexagonal towards triangular shape during growth. The lateral size and separation between Si pillars determine the onset of fusion between neighboring crystals during growth at a height tailoring of which is crucial to reduce the stacking fault (SF) density of the coalesced surface. Intermediate partial fusion of neighboring crystals is shown as well as a surface of fully coalesced crystals.

Defect-free mismatched heterostructures on Si substrates are produced by an innovative strategy. The strain relaxation is engineered to occur elastically rather than plastically by combining suitable substrate patterning and vertical crystal growth with compositional grading. Its validity is proven both experimentally and theoretically for the pivotal case of SiGe/Si(001).

We present a new concept applicable to the epitaxial growth of dislocation-free semiconductor structures on a mismatched substrate with a thickness far exceeding the conventional critical thickness for plastic strain relaxation. This innovative concept is based on the out-of-equilibrium growth of compositionally graded alloys on deeply patterned substrates. We obtain space-filling arrays of individual crystals several micrometers wide in which the mechanism of strain relaxation is fundamentally changed from plastic to elastic. The complete absence of dislocations at and near the heterointerface may pave the way to realize CMOS integrated SiGe X-ray detectors.

The stacking faults (SFs) in 3C-SiC epitaxially grown on ridges deeply etched into Si (001) substrates offcut towards [110] were quantitatively analyzed by electron microscopy and X-ray diffraction. A significant reduction of SF density with respect to planar material was observed for the {111} planes parallel to the ridges. The highest SF density was found in the (-1-11) plane. A previously observed defect was identified as twins by electron backscatter diffraction.

The heteroepitaxial growth of 3 C -SiC on Si (001) and Si (111) substrates deeply patterned at a micron scale by low-pressure chemical vapor deposition is shown to lead to space-filling isolated structures resulting from a mechanism of self-limitation of lateral expansion. Stacking fault densities and wafer bowing may be drastically reduced for optimized pattern geometries.

In this work we address three-dimensional heterojunctions, demonstrating that photoluminescence from defect-free, Ge/SiGe multiple quantum well (MQW) micro-crystals grown on deeply patterned Si(001) and Si(111) substrates exhibit similar radiative intensity and analogous spectral shape. The finite lateral size and faceted top morphology of the micro-crystals guarantee the absence of dislocations threading through the MQW structure and the dominance of radiative recombination at slanted { 113 } ?> facets. Our approach yields superior optical quality in comparison to state-of-the-art MQWs grown on SiGe/Si(001) linearly graded buffers.

We present an innovative approach to integrate arrays of isolated, strain-free GaN crystals on patterned Si substrates. First, micrometer-sized pillars are patterned onto Si(0 0 1) substrates. Subsequently, 2.5 mu m Si substrates are deposited by low-energy plasma-enhanced chemical vapor deposition, forming crystals mostly bounded by {1 1 1}, {1 1 3}, and {15 3 23} facets. Plasma-assisted molecular beam epitaxy is then used for GaN deposition. GaN crystals with slanted {0 0 0 1} facets having a root-mean-square surface roughness of 0.7 nm are obtained for a deposited material thickness of >3 mu m. Microphotoluminescence measurements performed at room and cryogenic temperature show no yellow luminescence and a neutral donor-bound A exciton transition at 3.471 eV (10 K) with a full width at half-maximum of 10 meV. Microphotoluminescence and micro-Raman spectra reveal that GaN grown on Si pillars is strain-free. Our results indicate that the shape of GaN crystals can be tuned by the pattern periodicity and that a reduction of threading dislocations is achieved in their top part.

Threading dislocations (TDs) in germanium (Ge) crystals epitaxially grown on a patterned (001)-silicon (Si) substrate are investigated using transmission electron microscopy (TEM) techniques. Analysis of dislocations performed on the Ge crystals reveals 60° and edge TDs with Burgers vector b→=12〈110〉. High-angle annular dark-field scanning TEM (HAADF-STEM) is used to observe the core of the edge TDs at atomic scale. Pairs of TDs with b→=12〈110〉 are present in the material running parallel at small distances between them (0.5–1.5 nm). The observation of such parallel dislocation pairs in Ge has not been documented before. The interaction between the edge dislocation pairs is obtained experimentally from the high-resolution HAADF-STEM images by applying geometrical phase analysis. The experimental strain maps are compared to analytical calculations based on the anisotropic elastic theory demonstrating a good match between them.

InGaAs/GaAs quantum wells (QWs) grown on μ-patterned Ge/Si substrates by metal organic vapor phase epitaxy are investigated by electron microscopy and spatially resolved photoluminescence (PL) spectroscopy. The lattice parameter mismatch of GaAs and Si is overcome by a Ge buffer layer grown by low-energy plasma enhanced chemical vapor deposition. The GaAs crystals form truncated pyramids whose shape is strongly affected by the geometry of the underlying pattern consisting of 8 μm deep and 3–50 μm wide square Si pillars. Comparing the measured PL energies with calculations performed in the effective mass approximation reveals that the QW emission energies are significantly influenced by the GaAs morphology. It is shown that the geometry favors indium diffusion during growth from the inclined facets towards the top (001) facet. The Si pillar-size dependent release of thermally induced strain observed in the PL measurements is confirmed by X-ray diffraction.

Threading dislocations (TDs) in germanium (Ge) crystals epitaxially grown on a patterned (001)silicon (Si) substrate are investigated using transmission electron microscopy (TEM) techniques. Analysis of dislocations performed on the Ge crystals reveals 60 degrees and edge TDs with Burgers vector (b) over right arrow =1/2 < 110 >. High-angle annular dark-field scanning TEM (HAADF-STEM) is used to observe the core of the edge TDs at atomic scale. Pairs of TDs with (b) over right arrow =1/2 < 110 > are present in the material running parallel at small distances between them (0.5-1.5 nm). The observation of such parallel dislocation pairs in Ge has not been documented before. The interaction between the edge dislocation pairs is obtained experimentally from the high-resolution HAADF-STEM images by applying geometrical phase analysis. The experimental strain maps are compared to analytical calculations based on the anisotropic elastic theory demonstrating a good match between them. (C) 2015 AIP Publishing LLC.

Germanium and silicon-germanium alloys have found entry into Si technology thanks to their compatibility with Si processing and their ability to tailor electronic properties by strain and band-gap engineering. Germanium's potential to extend Si functionalities, as exemplified by lasing action of strained-Ge on Si substrates, has brought the material back to attention. Yet despite these advances, non-radiative transitions, induced by crystal defects originating from the Ge/Si interface, continue to be a serious bottleneck. Here we demonstrate the drastic emission enhancement achieved via control and mitigation over the parasitic activity of defects in micronscale Ge/Si crystals. We unravel how defects affect interband luminescence and minimize their influence by controlling carrier diffusion with band-gap-engineered reflectors. We finally extended this approach designing efficient quantum well emitters. Our results pave the way for the large-scale implementation of advanced electronic and photonic structures unaffected by the ubiquitous presence of defects developed at epitaxial interfaces.

We present a method for monolithically integrating mismatched semiconductor materials with Si, coined three-dimensional (3D) heteroepitaxy. The method comprises the replacement of conventional, continuous epilayers by dense arrays of strain- and defect-free, micron-sized crystals. The crystals are formed by a combination of deep-patterning of the Si substrates and self-limited lateral expansion during the epitaxial growth. Consequently, the longstanding issues of crack formation and wafer bowing can be avoided. Moreover, threading dislocations can be eliminated by appropriately choosing pattern sizes, layer thicknesses and surface morphology, the latter being dependent on the growth temperature. We show this approach to be valid for various material combinations, pattern geometries and substrate orientations. We demonstrate that Ge crystals evolve into perfect structures away from the heavily dislocated interface with Si, by using a synchrotron X-ray beam focused to a spot a few hundred nanometers in size and by recording 3D reciprocal space maps along their height. Room temperature photoluminescence (PL) experiments reveal that the interband integrated PL intensity of the Ge crystals is enhanced by almost three orders of magnitude with respect to that of Ge epilayers directly grown on flat Si substrates. Electrical measurements performed on single heterojunction diodes formed between 3D Ge crystals and the Si substrate exhibit rectifying behavior with dark currents of the order of 1mA/cm2. For GaAs the thermal strain relaxation as a function of pattern size is similar to that found for group IV materials. Significant differences exist, however, in the evolution of crystal morphology with pattern size, which more and more tends to a pyramidal shape defined by stable {111} facets with decreasing width of the Si pillars.

We show that geometric shielding of the reactive flux in chemical vapor deposition by tall neighboring structures obtained by deep substrate patterning, along with short surface diffusion lengths, can provide nearly space filling arrays of high-quality epitaxial crystals despite large mismatches of lattice parameters and thermal expansion coefficients. The density of extended defects is strongly reduced by the method, and wafer bowing and crack formation largely inhibited. The concept is shown to be valid for SiGe/Si heterostructures ranging from pure Si to pure Ge both on Si(001) and Si(111) substrates. Here, dislocations are efficiently eliminated from three-dimensional faceted crystals with high-aspect ratios on top of micron-sized Si pillars. The application to 3C-SiC/Si(001) ridges, characterized by a lattice mismatch of nearly 20%, provides significantly lower stacking fault densities compared with layers grown on planar substrates.

Monolithic integration of an X-ray absorber layer on a Si CMOS chip might be a potentially attractive way to improve detector performance at acceptable costs. In practice this requires, however, the epitaxial growth of highly mismatched layers on a Si-substrate, both in terms of lattice parameters and thermal expansion coefficients. The generation of extended crystal defects, wafer bowing and layer cracking have so far made it impossible to put the simple concept into practice. Here we present a way in which the difficulties of fabricating very thick, defect-free epitaxial layers may be overcome. It consists of an array of densely packed, three-dimensional Ge-crystals on a patterned Si(001) substrate. The finite gap between neighboring micron-sized crystals prevents layer cracking and substrate bowing, while extended defects are driven to the crystal sidewalls. We show that the Ge-crystals are indeed defect-free, despite the lattice misfit of 4.2%. The electrical characteristics of individual Ge/Si heterojunction diodes are obtained from in-situ measurements inside a scanning electron microscope. The fabrication of monolithically integrated detectors is shown to be compatible with Si-CMOS processing.

Silicon is highly successful in today's electronics, but it provides only very limited potential for new functionalities, such as LED, lasers or radiation detectors. Integrating additional materials directly on the silicon chip would enable those features, but it remains a huge challenge due to material-related incompatibilities, such as lattice and thermal mismatches. A promising way to solve these issues has recently been presented as 3D heteroepitaxy, where arrays of tall, micrometer sized germanium crystals are grown on deeply patterned silicon substrates. Based on this technique, Kreiliger et al. (pp. 131–135) present a first version of a novel kind of X-ray detector, where a germanium absorber layer is directly grown on the silicon readout electronics. This approach is expected to improve spatial resolution and sensitivity compared to conventional detectors, while further reducing production costs. As a first proof of concept the authors present dark current measurements on individual Si/Ge heterojunctions, which were performed inside an SEM chamber using a micromanipulator to electrically contact single germanium crystals. The measurements show reverse dark current densities below 1 mA/cm2, which is suitable for detector fabrication.