Ge MOS devices with about 95% Ge 4+ in HfGeO x interfacial layer are obtained by H 2 O plasma process together with in situ desorption before atomic layer deposition (ALD). The equivalent oxide thickness is scaled down to 0.39 nm; the leakage current is decreased as well. The improvement can be attributed to the in situ Ge suboxide desorption process in an ALD chamber at 370 °C. The interface trap density and frequency dispersion need further process development to be reduced.

A Ge MOS device with an ultralow equivalent oxide thickness of ~0.5 nm and acceptable leakage current of 0.5 A/cm 2 is presented in this paper. The superior characteristics can be attributed to a tetragonal HfO 2 with a higher k value (k ~ 31) and comparable bandgap. In addition, a Ge MOS device with tetragonal phase HfO 2 (t-HfO 2 ) also shows a lower leakage current and better thermal stability. The mechanisms for t-HfO 2 formation may be explained by the little Ge diffusion from Ge substrate and oxygen deficiency, which are obtained by in situ interfacial layer (IL) formation and high-k processes. The IL with k ~ 13 can be formed by in situ H 2 O plasma treatment. Moreover, a Ge MOS device with the IL grown by H 2 O plasma shows smaller interface trap density and hysteresis effects due to a high composition of Ge +4 .

The TaN/HfON/GeO2/n-Ge pMOSFETs were fabricated with different formation processes of GeO2 interfacial layer. Ultra low EOT of around 0.5 nm is achieved using GeO2 grown by H2O plasma together with in-situ grown HfON gate dielectric, and simultaneously the peak hole mobility of Ge pMOSFET is 312 cm2/V*s.

Metal oxide semiconductor field effect transistors (MOSFET) with SiGe channel and higher-k gate dielectric are studied in this work. Samples with TaON/HfO2 or TiON/HfO2 stacks show larger drain current, better transconductance, and smaller subthreshold swing than that with single HfO2 layer. In addition, the reliability for SiGe pMOSFET device is clearly improved with TaON/HfO2 stacks in terms of degradation of Gm and Vth after hot-carrier stress. The integration of SiGe channel with TaON higher-k dielectric is useful for high performance pMOSFETs. (C) 2012 Elsevier Ltd. All rights reserved.