This paper summarizes the outcome of the EC FP7 project MSP - Multi Sensor Platform for Smart Building Management (Grant Agreement No. 611887). The MSP consortium comprising 17 partners from 6 European countries developed a full manufacturing chain for 3D system integration, which has never been realized before. It enables 3D-integration of highly sophisticated components and sensor devices on a CMOS electronic platform chip. The final multi-sensor system comprises a variety of gas sensors as well as optical sensors for ultraviolet, visible and infrared light. The MSP demonstrator system implemented in a wearable wristband device integrates a total of 57 sensors – this is a worldwide unique sensor system.

A worldwide unique CMOS based chemical sensor device comprising an array of 8 microhotplates (µhps) for a total of 16 chemical sensors has been fabricated (Figure 1). [...]

Multifunctional nanoparticles are key for optimizing the performance of chemical sensor devices. We have fabricated a variety of nanosensor devices based on ultrathin metal oxide films and nanowires, which have been integrated on CMOS-based micro-hotplate chips. These sensors have been functionalized with metallic as well as bimetallic nanoparticles. We have demonstrated that Pt-NPs or NiPt-NPs, strongly increase the sensitivity to carbon monoxide and supress the cross selectivity to humidity in case of SnO2 thin film based devices. We have employed both nanoparticles synthesized in solution, which are ink-jet deposited, as well as nanoparticles, which are implemented by gas phase synthesis directly on the micro-hotplate chips. The Pt-functionalized SnO2-thin film sensors show a strongly increased response to CO, which is almost independent of humidity as compared to the bare SnO2-thin film sensor. The highest response of more than 90% has been achieved with NiPt-functionalized SnO2-thin film sensors at a very low operation temperature of only 150°C.

As electronic power systems follow the general trend of miniaturization and functional density [1], this study targets reliable and low cost 3D heterogeneous integration technology using Through Silicon Vias (TSV) and Wafer Level Packaging (WLP) for the automotive market. The first part introduces an innovative process flow with focus on Wafer Level Over Molding (WLOM) and Wafer Level Balling (WLB). The second part covers electrical characterization as well as reliability tests (high temperature storage and electromigration), which have been performed on dedicated parts. The demonstrator is composed by 4 top dies stacked on a 200 μm thick silicon interposer featuring 40 μm diameter TSV last technology AR 5:1 with a pitch of 250 μm [2-3]. Finally, high temperature storage (1000 h, 200 °C) and electromigration (1.2 A, 500 h, 200 °C) results will be shown, using dedicated test structures in order to assess the compatibility of the integration to the harsh conditions. In that respect, several types of passivation materials, including organic, mineral and a combination of both materials, have been benchmarked by high temperature storage tests (HTS).

CuO nanowire arrays, synthesized on chip, were evaluated for their gas sensing capabilities. The gas sensors were fabricated on test structures containing gold electrodes for conductometric measurement, a resistive heater and a thermocouple for proper temperature control. The initial metal structure was fabricated by electron beam lithography, thermal evaporation and lift-off process. In a consecutive step the metal structure is thermally oxidized at a temperature of 400°C. As a result of the temperature treatment nanowire growth is promoted during the thermal oxidation process. A CuO nanowire array is formed. This nanowire array is evaluated for carbon monoxide, - and a hydrocarbon-mixture (acetylene, ethane, ethene, and propene) for VOC testing at three relative humidity levels.

We present the integration of thin film SnO2 gas sensor on CMOS microchips. A spray pyrolysis process was used to deposit the gas sensitive film, with a thickness of 50 nm, on CMOS microhotplates. The exposure of the CMOS integrated gas sensor to carbon monoxide at different operating temperatures and humidity levels lead to a significant decrease in the sensor resistance. At an operating temperature of 375 °C a sensor response of almost 50% was achieved. The integration of the sensing material on CMOS microhotplates makes it possible to reduce the size and power consumption of metal oxide gas sensors.

In this paper, we present a detailed investigation of the impact of different Lightly Doped Drain (LDD) implants and different well doping on the low frequency noise performance of n- and p-MOS devices from a CMOS technology node. We investigate the impact of three different devices. Two with the same LDD implant but different well doping and one with different LDD implant cocktail. The results demonstrate that the different bulk doping does not affect the low frequency noise performance of the devices. On the other hand there is a serious impact on the noise level of the device with the different LDD implant. In order to further support our results we investigated devices with different lengths in the linear and saturation region of operation.

Metal oxide nanostructures like tungsten oxide nanowires are intensively studied materials for sensor applications. In this work we report on tungsten oxide gas sensors integrated on a CMOS fabricated microhotplate chip. Tungsten oxide gas sensors were prepared by drop coating of a nanowire network suspension onto interdigitated electrodes prefabricated on the CMOS microhotplate chip. The tungsten oxide nanowire network was characterised by TEM and Raman spectroscopy, confirming their non-stoichiometric state. Using tungsten oxide nanowire networks as gas sensing material we observed high sensitivity to hydrogen sulphide: concentrations of 1 ppm have been detected with a sensor response up to 55%.

In this work, we present gas sensors based on nanocrystalline SnO2 ultrathin films, which were integrated on microhotplate chips fabricated by CMOS technology. The gas sensitive films, with a thickness of 50nm, were deposited on the microhotplate by a spray pyrolysis process. The CMOS integrated sensor resistance was significantly decreased in the presence of carbon monoxide. A sensor response of up to 50% is achieved at an operating temperature of 375̊C. The microhotplate chips presented here enable 3D integration of different gas sensing systems by through-silicon-via technology. Such 3D-integrated nanosensors are promising candidates for building smart gas sensor devices for daily life applications.

We present H2S gas sensor devices based on tungsten oxide nanowire networks, which are integrated on CMOS fabricated microhotplate chips. Such CMOS integrated systems are promising candidates for realizing smart sensor devices for consumer market applications. The CMOS tungsten oxide gas sensors were prepared by the deposition of nanowire networks onto interdigitated electrodes on CMOS microhotplates via drop-coating. Drop-coating of a nanowire suspension represents a simple and cost-effective technique for mass production of tungsten oxide nanowire network gas sensors. Utilizing this tungsten oxide nanowire network as gas sensing material we could obtain extraordinary sensitivity to H2S: concentrations down to 100 ppb have been detected at different humidity levels. An optimum operating temperature could be determined, where the different humidity levels do not affect the sensor performance.

In this work, we present the integration of functionalized tin dioxide gas sensors on CMOS fabricated microhotplate chips. Spray pyrolysis was used to deposit the gas sensitive films, with a thickness of 50 nm, on CMOS microhotplates. The SnO2 thin films were functionalized with noble bimetallic nanoparticles - PdAu - by inkjet printing and the influence of the nanoparticles on the sensor performance was evaluated. The functionalization of the CMOS integrated SnO2 sensors with PdAu nanoparticles lead to an almost three times higher sensor response towards carbon monoxide compared to the bare SnO2 thin film. The CMOS microhotplate chips are also applicable for 3D-integration of different gas sensing systems based on through-silicon-via technology. Building devices for daily life applications is possible with such 3D-integrated nanosensors.

The ATHENIS_3D FP7 EU project aims at providing new enabling technologies (analog, digital and power components) for high-voltage and high-temperature applications, tested for power systems of new hybrid/electrical vehicles. Innovation is exploited at process/device level (3D chip stacking, wafer level packaging, trench capacitors and TSV-inductors integrated in the interposer, high-reliable non-volatile Magnetic RAM), circuit-level (inductorless high-voltage DC-DC converter, high-temperature 28nm System-on-Chip platform) and system-level (compact 3D embedded power mechatronic system). Enabling high integration levels of complex systems, operating in harsh environments, in a single packaged 3D device, ATHENIS_3D allows for one order of magnitude area reduction vs. today PCB-based power and control systems. Integration costs will be consequently reduced in key industrial sectors for Europe where high-voltage/temperature operations are mandatory (vehicles, avionics, space/defense, industrial automation, energy).

A ball bonding process was simulated over a high-voltage isolation structure. The removal of an inter-dielectric metal crack-stop layer was investigated through 3D simulation. Material properties for the bonded gold ball were obtained using nanoindentation and atomic force microscopy with a methodology from the work of Ma et al. This yielded both elastic and plastic material parameters. The methodology was then evaluated by using the parameters in a nanoindentation simulation. Although the topography simulated only roughly agreed with measurement, the simulated and measured indenter curves closely overlapped. The parameters were then used in the bonding simulation. The deformation of the bond ball was also measured so that the equivalent deformation could be simulated. This was achieved following the incorporation of both ultrasonic motion and softening in the simulation. Two bonding process geometries were then set up: one with the crack-stop layer present and the other without. Both were simulated and the output was applied within a failure theory to evaluate the risk to the isolation oxide.

One of the main issues for the simulation of MOS transistors is the correct prediction of threshold voltages that depend on the active doping profiles in the channel under the gate oxide. Simulating a power MOS process we encountered a situation in which Sentaurus Process with default models failed to predict threshold voltages by as much as 3 V. An in-depth investigation revealed that the threshold voltage in our pMOS devices is determined by a very special distribution of the doping in the channel that involves both n-type and p-type doping which nearly compensate each other. As threshold voltages were found in the simulations to be particularly sensitive to boron segregation, silicon samples were implanted with boron and oxidized in several atmospheres for a variety of process times.The profiles were studied by advanced SIMS methods. Because of the limitations of the SIMS depth resolution, they had to be complemented by electrical measurements on MOS transistors. This combination finally allowed finding a new calibration for the segregation models which allows predicting the electrical characteristics of the transistors in a wide range of experimental conditions. Since the threshold voltage in our transistors turned out to be extremely sensitive to the boron segregation parameters, in contrast to technologies in which only one dopant type prevails, the newly achieved calibration should be superior to previous work. (C) 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim

For an assessment of the stresses occurring during ball bonding of high-voltage CMOS chips in a structure comprising a thin and a thick silicon dioxide layer below the bonding pad, a dynamic model of the process was set up and the materials parameters were calibrated. For a realistic result of the deformation of the bonding ball during the ultrasonic stage, up to 60 ultrasonic cycles were simulated. To reproduce the final height of the bonding ball, dynamically increased friction between the ball and the bonding pad as well as ultrasonic softening of the metals within the model had to be taken into account. For a more sensitive prediction of failure, the conventional failure criterion based on the ultimate tensile strength of brittle materials was complemented by an additional criterion suggested by Christensen which takes the combined effects of perpendicular tensile and compressive principle stresses into account. This yielded a prediction of earlier failure for the thinner oxide layer while no failure was predicted for the thick isolation oxide layer.

The 0.35μm HV-CMOS process technology utilizes several junctions with different doping levels and depths. This process supports complete modular 3V and 5V standard CMOS functionality and offers a wide set of HV transistor types capable for operating voltages from 20V to 120V made available with only 2 more mask adders [1]. Compared to other reported integration of photo detection functionalities in normal CMOS processes [2] or special modified process technologies [3] a much wider variety of junction combinations is already intrinsically available in the investigated technology. Such junctions include beside the standard n+ and p+ source/drain dopings also several combinations of shallow and deep tubs for both p-wells and n-wells. The availability of junction from submicron to 7μm depths enables the selection of appropriate spectral sensitivity ranging from ultraviolet to infrared wavelengths. On the other side by appropriate layouts the contributions of photocurrents of shallower or deeper photo carrier generation can be kept to a minimum. We also show that by analytically modelling the space charge regions of the selected junctions the drift and diffusion carrier contributions can be calculated with a very good match indicating also the suppression of diffusion current contribution. We present examples of spectral responsivity of junction combinations optimized for peak sensitivity in the ranges of 380-450nm, 450-600nm or 700-900nm. By appropriate junction choice the ratios of the generated photo currents in their respective peak zones can exhibit more than a factor of 10 compared to the other photo diode combinations. This enables already without further filter implementation a very good spectral resolution for colour sensing applications. Finally the possible junction combinations are also assessed by the achievable dark current for optimized signal to noise characteristic.

This paper presents the electrical and optical behavior of Single Photon Avalanche Diode. Key parameters as reverse breakdown voltage, spectral responsivity, photon detection probability, dark count rate and time delay of the diode are extracted from dedicated TCAD simulations.