A method used to determine the harmonic components of the output of a two-level sinusoidal PWM inverter is presented. The method calculates the Fourier coefficients of corresponding positive and negative pulse pairs of the output PWM waveform and adds them together using the principle of superposition to calculate the Fourier coefficients of the entire PWM output signal. This method allows direct calculation of harmonic magnitudes and angles without having to use numerical techniques, look-up tables, or Bessel functions. The method presented is a general method that can easily be extended to other types of multilevel inverters and PWM schemes such as space vector modulation. The method has also been tested and proven to be valid in the overmodulation region.
A method for exact calculation of the harmonic content of the classic three-level sinusoidal PWM waveform for any modulation index is presented. Unlike methods that are based on the double Fourier series and Bessel functions, this method uses only the cosine function and linear algebra operators. As such it is well suited for both simulations and real-time control algorithms. For applications using low-level DSP's and microcontrollers, an approximate method is provided.
A new logarithmic amplifier suitable for integration in controller IC's for power electronics systems is introduced. The amplifier can be implemented in standard BiCMOS technologies commonly used to manufacture controller IC's but consumes little silicon real estate as compared to commercial log amplifiers, leaving room for primary controller features. Particularly suitable to high voltage measurements at low power, the amplifier includes internal temperature compensation. The amplifier is in fabrication using the TSMC 0.35 /spl mu/m technology node. Simulations results at a single supply of 3.3 V predict true logarithmic performance with only 1.5 mW of quiescent power consumption. The active area of the amplifier (sans I/O pads) is 100 /spl mu/n x 125 /spl mu/n.
A method to improve the transient response of a VRM is developed in this paper through Pspice simulation. By using another compensator converter with very quick response, a compensation current is injected or extracted according to the transient type. This compensation is triggered by comparators monitoring the output voltage to accomplish the same cycle transient control. The compensation current can be tailored for the main converter for best possible transient response. Each of these converters are optimized for a different purpose to obtain optimum overall performance. The tradeoff of speed, efficiency, and stability is thus resolved.
A digitally-controlled, low-cost driver for piezoceramic flight control surfaces in miniature aircraft and munitions has been developed. The piezoceramic material, being capacitive, requires /spl plusmn/DC voltages for bi-directional deflection. Accordingly, the driver is a variable output capacitor charger with bipolar output voltage. Output voltage slew rate is also variable, providing rate-of-closure adjustment. Overvoltage protection is elegantly provided without additional components while a microcontroller handles serial data transfers from a remote targeting system and gating of MOSFETs within the driver. Measured performance and mathematical predictions are in agreement and loss mechanism are identified and modeled.
A capacitor charging power supply with power factor correction operating from a 120 V AC source is presented. The supply consists of a flyback converter, analog to TTL-compatible interface circuitry and a digital control system implemented using standard TTL logic components. A 300-V prototype has been constructed and tested.
This paper reports basic DC and low frequency noise characteristics of 6H-SiC MOSFETs. Effective channel mobilities ranged from 55 to 94 cm(2)/V . s at room temperature, and decreased to 20 cm(2)/V . s at 400 . C for all devices. Other DC parameters are examined, and preliminary low frequency noise measurements at high temperatures did not reveal any unexpected generation-recombination centers. Devices maintained stable small-signal voltage gain of 5 to 20V/V up to 400 degrees C.
Discrete, buried-gate 4H-SiC JFETs (W/L = 1 mm/5 μm) were packaged and characterized at temperatures ranging from 290 Κ to 773 Κ for use in a hybrid, 4H-SiC analog amplifier. A contaminated passivation oxide was found to limit high-temperature operation initially, but upon removal of the passivation layer the devices demonstrated stable operation to 773 Κ with adequate amplification (Aν greater than 200 V/V) up to 673 K. From the 16 devices tested, a peak extrinsic saturated transconductance (gmsat) of 27.1 mS/mm was measured at 308 K, corresponding to a channel mobility of 400 cm2/Vs, excluding significant series resistance effects.
6HSiC depletion-mode, n-channel MOSFETs were analyzed across the temperature range of 295–723 K. Effective channel mobilities ranged from 94 cm2V−1·s−1 at 296K to about 20 cm2V−1·s−1 in the five devices measured. Small-signal voltage gain ranged from 5 V/V to 20 V/V in the five devices tested, and was essentially constant for all devices up to 723 K. Thermally-activated leakage across the 450 Å thick gate oxide (SiO2) was identified as the primary cause of device failure from 673 to 773 K. The mechanisms responsible for the leakage across SiO2 were identified as Fowler-Nordheim tunneling at bias levels greater than about 650 kV cm−1, while low-field leakage was a result of trap-assisted tunneling in combination with other mechanisms such as Poole-Frenkel or thermionic emission. Measured source-drain to body (pn junction) leakage was thermally activated with an activation energy of approximately 972 meV.
6H-SiC buried-gate n-channel depletion-mode junction field-effect transistors (JFET's) were characterized from 25 degrees C to 350 degrees C in terms of transconductance (g(m)), pinchoff voltage (V-p), output resistance (r(o)), input resistance (R(in)), drain-to-source current at zero gate-to-source voltage (I-DSS), gate-to-source reverse biased leakage current (I-GSS), off-state drain-to-source current (I-DSS(off)), and noise power spectral density (S-V) The 6H-SiC JFET's were used in a hybrid temperature monitoring circuit (tested from -196 degrees C to 500 degrees C) fabricated at Auburn University for use in numerous industrial applications. Simulation program with integrated circuit emphasis (SPICE) simulations of the temperature monitoring circuit's output voltage corresponded well with measured data as a function of temperature. Linear regression (LR) analysis of measured data revealed a notably sensitive (similar to 2.3 mV/degrees), and an eminently linear (correlation coefficient = -0.9996G... over 25 degrees C to 500 degrees C range) relationship between the measured output voltage and temperature. Below -50 degrees C, the output became nonlinear, presumably from carrier freeze-out effects. To the best of our knowledge, this represents the first successful implementation of SiC active devices into a temperature sensor which demonstrated stable operation up to 500 degrees C.
6H-SiC buried-gate n-channel depletion-mode Junction Field-Effect Transistors (JFETs) manufactured by Cree Research, Inc. were characterized from 25 to 350/spl deg/C in terms of transconductance (g/sub m/), pinchoff voltage (V/sub p/), output resistance (r/sub 0/), input resistance (R/sub in/), drain-to-source current at zero gate-to-source voltage (I/sub DSS/), gate-to-source reverse biased leakage current (I/sub GSS/), off-state drain-to-source current (I/sub DSS(off/)), and noise power spectral density (S/sub V/). Degradation of the small-signal voltage gain (to /spl sim/1 at 350/spl deg/C) as a result of increasing output resistance, was found to be the most serious device shortcoming. The 6H-SiC JFETs were tested for use in a temperature monitoring circuit (from 25 to 350/spl deg/C) currently under development at Auburn University for use in automotive and other industrial applications. A SPICE model was developed to match the experimental data obtained from the 6H-SiC JFETs and diode. The SPICE simulation of the temperature monitoring circuit's output voltage corresponded well with measured data as a function of temperature. Maximum temperature percent error was 2.4% over the temperature range of 25 to 350/spl deg/C.
The noise spectra for n-channel, depletion-mode MOSFETs fabricated in 6H-SiC material were measured from 1-10(5) Hz at room temperature; Devices were biased in the linear regime, where the noise spectra was found to be dependent upon the drain-to-source bias current density. At a drain-to-source current of 50 mu A for MOSFETs with a W/L of 400 mu m/4 mu m, the measured drain-to-source noise power spectral density was found to be A/f(lambda), with A being 2.6 x 10(-12) V-2, and lambda being between 0.73 and 0.85, indicating a nonuniform spatial trap density skewed towards the oxide-semiconductor interface. The measured Hooge parameter (alpha(H)) was 2 x 10(-5). This letter represents the first reported noise characterization of 6H-SiC MOSFET's.
An operational amplifier has been designed, fabricated, and tested at 350°C using silicon carbide MESFET pairs and thick-film hybrid technology. The amplifier was successfully tested over the temperature range of 25-350°C. The gain of the amplifier was greater than 60 dB, the common-mode rejection ratio was greater than 55 dB, and the offset voltage varied from 139 to 159 mV over the entire temperature range. The results demonstrate the feasibility of high-temperature circuit design and assembly using this approach
A new interconnect structure formed by the selective anodization of aluminum thin films is examined. Interconnect lines of aluminum embedded in anodic aluminum oxide dielectric were fabricated. Resistivity of the lines was determined to be - 3.1 μΩcm. This value compares well to the bulk value of 2.8 μΩ.cm Crosstalk is expected to be < 10%.
It is widely known that the current gain of the bipolar transistor is degraded by low-temperature operation. However, the temperature dependence of another important parameter, the amplification factor, has not been reported. This brief presents theory and experimental results demonstrating the temperature independence of the Early voltage, and showing as a consequence that the amplification factor is inversely proportional to temperature. Using this information and the bandgap narrowing theory for current gain reduction, predictions and measurements are offered for simple bipolar amplifier circuits. Furthermore, the product of the current gain and amplification factor is proposed as a figure of merit for the transistor. The temperature that optimizes the gain product can be below 100 K for transistors with current gains that are weak functions of temperature.
A new method for the direct measurement of the available voltage gain of bipolar and field-effect transistors is presented. The method is easily automated using existing semiconductor parameter analysis systems. An example of direct measurement of the mismatch in available gain is also presented.