Heterogeneous integration (HI) opens up a new dimension to improve system-level functionality, performance, power, form factor, and cost. Both 3DIC interconnect and monolithic CMOS technology affect the HI strategy and cost, as well as die-to-die data interface design. A novel 3D package, with a 2nm SOC die copper-bonded on an RDL interposer, is analyzed for power integrity and thermal, mechanical, and electrical properties to illustrate co-optimization by modeling.

In this paper, multiple points of strain and temperature measurement in real-time is investigated using a Brillouin optical time domain reflectometry (BOTDR) system. The Brillouin frequency shift (BFS) is analysed with strain and temperature effects applied at various locations of the sensing fibre. In addition, a passive depolarizer was employed in order to reduce the polarization noise. The temperature and strain coefficients are found to be 0.79 MHz/°C and 0.057 MHz/µε.

Technology Computer Aided Design (TCAD) tools can be used to effectively study and analyze a multitude of reliability issues in semiconductor devices. In the following article, we first describe Negative-Bias Temperature Instability (NBTI), which is one of the most severe reliability issues. Using the Reaction-Diffusion (RD) model for simulating the NBTI effect, we show that the simulated threshold voltage degradation agrees well with measured data. Based on the simulation results, we propose an on-chip heater to enhance recovery and revert the NBTI degradation. Next, we discuss how to apply the Hot-Carrier Stress (HCS) model to analyze hot carrier degradation in FinFET. We show that the threshold voltage shift agrees well with experiment and use the HCS model for the simulation of breakdown voltage walkout in a LDMOS transistor. Then, we apply process emulation to better understand modern DRAM structures and illustrate the row hammering reliability issue. Finally, we demonstrate a multi-level sub-modeling methodology for chip to package interaction (CPI) and apply the method to study the effect of wafer bending on the reliability of re-distribution layers (RDL).

Using TCAD tools, many reliability issues can be studied quantitatively. Examples are hot carrier degradation of interfaces, threshold voltage shifts during NBTI stress, radiation effects and soft errors, ESD and latch-up, thermo-mechanical issues, electro-migration and stress-voiding.