We study the defect clusters VH-AlK-VH in KDP crystals based on first principles. Neutral and-1 charged defect cluster obtained from DFE may exist within the crystal. The computed absorption peak from VBM to +1 charged defect transition is 311 nm, which is very close to the experimental measured wavelength of 312.4 nm of the incident laser that causes a sharp drop in the laser damage threshold, therefore we believe that the defect cluster exists within the crystal and may lead to the generation of vacancy superabundance. Through the calculation of DOS, we found that the defect cluster would produce a higher density of defect states in the bandgap, which is likely to participate in multiphoton transition, and the transition process would produce a significant lattice relaxation energy (1.4 and 1.8 eV). Therefore, we conclude that the defect clusters VH-AlK-VH will cause serious damage to the crystal.

A novel 3-dimensional charge-balanced self-shielding isolation (3-D CSI) technology is proposed and experimentally demonstrated in this paper based on a 0.35 mu m bipolar-CMOS-DMOS (BCD) process platform. The 3-D CSI structure is realized by forming internal N-type islands in highly doped P-wells and introducing two deep N-well (DN) regions in the bulk of the device, in which ionized negative charges in the P-well, P-bury, and P-sub regions achieve 3-D charge balance with ionized positive charges in the surrounding DN, N-well, and internal N-well islands regions. The new technology widens the safe operating area (SOA) of the level-shifting Laterally Diffused MOSFET (LDMOS) while increasing the on-state current. In experiments, the breakdown voltage V-B of the level-shifting LDMOS using 3-D CSI technology was increased from 656 V of the conventional structure to 867 V with a leakage current of just 10-11 A. The 3-D CSI technology has passed 1 000 hours of high-temperature reverse bias (HTRB) test and realized the commercial application.

This brief presents the minimum specific ON-resistance R-min,R-SiC of balanced symmetric 4H-silicon carbide superjunction (4H-SiC SJ) devices based on the resistance well ( R -well) model. The R -well of 4H-SiC SJ is modified by considering both the anisotropy of impact ionization in the OFF-state and carrier incomplete ionization and JFET effect under the ON-state conditions. Compared with the conventional model that only considers the breakdown voltage V-B design in the OFF-state, R-min,R-SiC optimization achieves the minimum specific ON-resistance R-on,R-sp in shorter SJ length and lower SJ doping concentration, resulting in reduced process complexity and wider process tolerance. Based on this study, a new R-on,R-sp proportional to V-B relationship and corresponding design formula are obtained for 4H-SiC SJ. It is shown that R-min,R-SiC optimization has the potential to significantly improve the reported R-on,R-sp characteristics by 77%-92% at the same V-B , providing a significant margin for further optimization.

The IC industry in the Chinese mainland has encountered the difficulty caused by the embargo on lithography machines in developing state-of-the-art semiconductor IC processes. For the first time, this work fabricates out the HVTFET which we have independent intellectual property rights. A 50 nm channel length N HVTFET device is fabricated successfully using a 0.35 µm process, and its characteristics are close to those of TSMC’s 55 nm planar N MOSFET. The experimental results of this paper have two important significances. First, it shows that the fabrication of the advanced ICs in the Chinese mainland can get rid of the limitation of the lithography machine by using the HVTFET. Second, it shows that it is possible to decrease the chip area by about 3/4 by using the HVTFET structure for the ICs with 28 nm and above planar MOS processes, which are quite common in China.

To achieve the goal of neuromorphic computing hardware implementation with extremely high efficiency, low power consumption, and high density, it is necessary to develop transistor-free memristors and implement differential operation without subtraction circuits. In this study, argon ion irradiation was used during the fabrication process of a single crystalline LiNbO3 (LN) thin film to controllably introduce oxygen vacancies (OVs) into the bottom surface, which realized the modulation of OVs based on the excellent environment provided by a single-crystalline thin film. The memristive behavior of memristors was then modulated by regulating the distribution of OVs, and the effect of OVs distributed near the bottom surface of the single crystalline LN thin film on the memristive behavior was analyzed. In this way, two transistor-free memristors with opposite memristive behavior directions were fabricated. Two transistor-free memristors exhibit excellent synaptic plasticity and reliable multilevel resistance states. Based on two transistor-free memristors, a novel differential pair was constructed. Hardware implementations of direct differential operation without subtraction circuits were achieved. This study provides a new pathway to develop a transistor-free memristor and achieve differential operation without subtraction circuits in neuromorphic computing, which will simplify the peripheral circuits, improve integration density, and reduce power consumption and latency.

In recent years, the applications of Deep Echo State Network (DESN) are increasing in wind speed prediction, energy consumption prediction, temperature prediction, etc. However, when the reservoir structure of the DESN is too deep, its overall stability decreases, and its generalization ability decreases. For applications where the input dimension is much lower than the dimension of the reservoir structure, we proposed a novel strategy which uses genetic algorithms to optimize the Laplacian Echo State Network (LAESN) to solve the problems caused by the deep reservoir structure. We took the chickenpox case in New York City as a case, simulated the optimized DESN, and compared it with the three models—Echo State Network (ESN), DESN and LAESN, to verify its effectiveness.

In this paper, based on RISC-V architecture, the processor design of a reconfigurable array with adjacency interconnect is realized by adding adjacency interconnect instructions and related circuits, using the classical five-stage pipeline structure. In addition, this processor also realizes the basic instruction set of RV32I, ALU also has a two-level pipelining multiplier, can realize multiplication operation. The proposed processor is implemented in Verilog HDL and further prototyped on FPGA development board, BASYS 3. The processor operates at a frequency of 100 MHz and the Slice LUTS and Slice Registers are occupying 3816 and 2131, respectively.

In this paper, the influence of double wire submerged arc welding parameters on the mechanical properties of high strength low alloy has been investigated. The 20mm steel plate has been welded by double wire submerged arc welding process using different welding parameters. The Charpy absorbed energy of specimens is assessed using impact test at the temperature of -50°C. Testing results show that high heat input parameters will lead to low strength of welded joint. Impact toughness of fusion line is lower than that of other areas of welded joint.

This work proposes an economical, practical, and easy-to-operate combined measuring device to measure volume. This device integrates measuring tools that are commonly employed in architectural engineering for gauging distance, height, area, and volume, and has an error rate of less than 1% in volume measuring. Regarding the microcomputer controller, the law of cosines in trigonometric functions was adopted to calculate side lengths. The experimental results verified that this device can identify the correlation coefficients of side-length measurements by using sensors and calculating the side length of an object according to the law of cosines .Consequently, the study device achieved non-contact volume measurement using a microcomputer controller, and the results conformed to the gauge repeatability and reproducibility (GR&R) method in measurement system analysis.

With the explosive growth of data, the performance of querying the huge amounts of data is more and more important. Simply Method of improving the performance of stand-alone already can't meet the demand. We need to handle huge amounts of data with distributed technology. However, traditional ways are just outrageous abuse of distributed resources, there are a lot of methods to improve efficiency and throughput. In terms of saving resources effectively, index is an indispensable tool. This article embarks from the traditional indexing mechanism, based on the advantage of the traditional methods in combination with the advantages of bitmap index, put forward a kind of extended local index mechanism, which is effective in reducing the traditional local indexes for distributed resources unnecessary overhead. At the same time it also improve the query efficiency. Finally, the test results show that the improved algorithm is efficient.