Despite the many advantages of 3D ICs, the yield loss experienced during the 3D IC fabrication process limits the commercialization of 3D IC products. In this study, we propose a novel method for TSV failure analysis and analyze TSV failures electrically to detect failures and their locations in TSV-based 3D IC.
This paper describes the application of parallel algorithms for analyzing the electronic packages and PCB's in a fast and efficient manner. The effectiveness of multithreading at various stages of the analysis has been illustrated. The application of distributed computation to further accelerate the solution process is demonstrated.
This paper presents a parasitic-aware design method using parameterization of embedded passive devices on multilayer organic substrates. The parameterization enables designers to map electrical circuits into high quality physical layouts and to use parasitics of embedded inductors and capacitors for high quality RF design. The proposed method was demonstrated through design of compact, high performance bandpass filter on multilayer organic substrates.
In this paper we present stochastic high order basis functions suitable for the volumetric discretization of interconnect structures. The proposed basis functions are wideband, and can easily be integrated within a stochastic magneto-quasi static (MQS) or a fullwave Mixed Potential Integral Equation (MPIE) solver, rendering the stochastic formulation computationally efficient. In addition, our high order basis functions facilitate the calculation of a correction term, improving the accuracy of the impedance ensemble average.
We present a general class of frequency-selective weighting schemes, allowing for a drastic accuracy improvement when embedded in passivity enforcement algorithms for linear lumped macromodels. The proposed technique minimizes the in-band model perturbation while achieving global passivity, even in the difficult case of large out-of-band passivity violations.
