The ultra-high frequency (UHF) tag IC’s main part of the power management unit (PMU) design technique is presented. The technique is a step-by-step algorithm for designing a PMU and consists of five interrelated stages. At the first stage, the requirements for the parameters of the PMU (output voltage, output DC power, efficiency, output capacitor capacity) and the Q-factor of the tag analog front-end are determinates. At the second stage, the design of an electrical circuit of a voltage multiplier (VM) is carried out. VM is required to convert the voltage of the input radio frequency (RF) signal into an DC voltage. During the third stage, the design of the electrical circuit of the DC voltage limiter is carried out, which is necessary to reduce the output voltage of VM to a safe level. The result of stage 4 is an electrical circuit of surge protection designed to provide the required level of immunity of the tag IC to the effects of electrostatic discharge and a high-power RF signal. As part of the final stage, the evaluation and alignment with the required Q-factor value of the tag IC analog front-end is carried out. The proposed technique can be used for the development of domestic UHF tag ICs (ISO 18000-6C, GJB 7377.1, etc.) based on CMOS technological processes, including ICs designed for radio frequency identification of critical infrastructure objects. Using the presented technique, the design of a PMU with an estimated efficiency value of 70%, an estimated Q-factor of the analog front-end of less than 15 at an RF input signal power of -12.7 dBm was performed.

Results of designing the low-noise amplifier, quadrature demodulator, and baseband amplifier with an integrated low-pass filter for the UHF radio frequency identification receiver are presented. IP-blocks are designed for implementation in the domestic CMOS 180 nm technology process. The low-noise amplifier is implemented with integrated single pole double throw switches based on the MOSFETs which are needed for bypass mode realization at the RF input. The benefits of this approach are increased input linearity of the receiver by no less than 30 dB with an increase of a noise figure. The quadrature demodulator is realized according to a typical design based on the passive MOSFET mixer core. The programmable-gain baseband amplifier is implemented with an integrated low-pass filter based on Tow-Thomas biquad architecture. IP-blocks designed for use in an RFID reader transceiver VLSI IC with sensitivity value no more than -75 dBm and input linearity value not less than 10 dBm in a «Talk» mode. The trustiness of the receiver is provided by the full-cycle design procedure and verification under experimental investigation. The electric parameters values of the proposed receiver correspond to foreign VLSIs implemented in a CMOS process with the same technology nodes. Thus, it is important to design the domestic ISO 18000-6C reader equipment intended for critical infrastructure.

This paper presents the design, implementation, and experimental investigation results of the UHF power amplifier (PA) based on a silicon MOSFET manufactured by vertical diffusion technology (VDMOS). The designed PA has operating frequency range from 800 to 1100 MHz, power gain 10 dB and maximal PAE 36 %. Single-event effects (SEEs) and total ionizing dose (TID) test results are presented for VDMOS transistors in this study.

Results of designing the specialized RF elements library intended for use in the CMOS 180 nm process are presented. The RF library includes a set of RF MOSFETs for amplifiers and switches design, three types of varactors based on the MOS-structure, spiral inductors, MIM-capacitors and other elements. The RF library is intended for use in combination with CAD Cadence Virtuoso IC and is focused on designing a set of amplifiers, frequency oscillators and convertors, controlled attenuators and phase shifters microwave IP-blocks of the transceiver VLSI. A test chip is developed with using the presented RF library, focused on conducting research by probe methods and containing 13 types of basic elements and specialized structures for the RF characterization of the domestic CMOS 180 nm process.

High data rate and low latency are the key parameters of a fifth-generation (5G) mobile network. Millimeter-wave transceiver integrated circuits (IC) are the important building blocks of a remote radio unit that determine the commination distance and consume the significant value of power. Transceiver ICs include beamformer and frequency converter paths. Active phased antenna arrays with a size of up to 256 elements are employed to improve radio channel efficiencies such as data rate and operating range. In this work, a brief review of the 5G beamformer millimeter-wave transceivers ICs implemented in SiGe BiCMOS and CMOS processes is presented. A variety of examples of transceivers IC with a frequency range from 24 to 30 GHz are compared in terms of the Figure of merit (FOM). It’s shown that the CMOS transceiver ICs has a maximum FOM of $1.2 \cdot 10^{18}$Hz/W.

The Microwave automated test and measurement system (ATMS) for on-wafer total ionizing dose and dose rate effects investigations is described. The ATMS is based on Cascade PM5 probe station and measurement hardware providing on-wafer investigations of RF and MW ICs with operating frequencies up to 67 GHz. The ATMS is equipped with radiation sources: RIK-0401 X-Ray Source and Radon-8M Laser Source. Dosimetry of radiation sources provided by calibration researches methodologies is described. All measurement hardware and radiation sources are interconnected into single work network controlled by PC with specialized software. The ATMS is used for radiation characterization of RF ICs, IP-blocks, and test structures during an on-wafer investigation. The results of ATMS approbation during 180 nm SOI CMOS process characterization are present.

Measurements and numerical simulation results of GaAs MESFET and PHEMT response to transient irradiation for wide range of ionization levels and bias conditions are presented. It was shown that specific bias conditions and ionization levels can be found for detail separate investigation of channel current change and bipolar-like amplification effects. Simple Shockley FET model was found to be applicable to analyze channel current change due to photovoltage occurrence at channel-buffer junction.

Design and testing results of I/Q mixer and voltage-controlled oscillator IP-blocks for application in 5G communications are presented. IP-blocks were implemented in a commercial 0.42/0.25 μm SiGe BiCMOS process. The test results demonstrate that designed mixer has a conversion gain of more than 5.5 dB in the operating RF frequency range from 25.5 GHz to 26.5 GHz and IF frequency range from 1 GHz to 2 GHz, power consumption less than 235 mW. The designed voltage-controlled oscillator has an operating frequency range from 20.8 GHz to 24.6 GHz in the control voltage range from 0 V to 4 V, the output power is not less than 6 dBm, power consumption is less than 116 mW.

Представлен задел кооперации предприятий в разработке ЭКБ твердотельной СВЧ электроники на российской кремниевой фабрике - элементов и функциональных блоков приемо-передающих БИС до 15 ГГц. Рассмотрены перспективы контрактного производства конкурентоспособной ЭКБ для систем связи, радиолокации, радиочастотной идентификации, навигации.

Рассмотрены вопросы создания и применения цифровых моделей элементов библиотек базовых технологических процессов, сложно-функциональных блоков и изделий электронной компонентой базы в отечественной электронной промышленности, в том числе учитывающих радиационное воздействие.

Проведена отработка методики расчетно-экспериментального восстановления параметров паразитной тиристорной структуры технологического процесса SiGe БиКМОП 0,42 мкм, предназначенной для использования в системах схемно-топологического проектирования.

Compact models of silicon-germanium and gallium-arsenide heterojunction bipolar transistors, gallium-arsenide pseudomorphic high electron mobility transistor, and silicon on insulator field-effect transistor radiation responses are presented. Special subcircuits for modeling displacement damages, dose rate, and total ionizing dose effects are connected to the standard device models. Models based on core VBIC, EEHEMT and BSIM provided by semiconductor foundry as a part of process design kit and verified in a frequency range from DC to 26 GHz and suitable for small signal and non-linear simulation. Radiation-dependent parameters are described by physically based equations which compatible with proprietary simulators. Examples of radiation-hardening by design techniques for microwave monolithic integrated circuits (MMIC) are presented with standard computer-aided design (CAD) tools. Proposed models were verified by estimating static and dynamic characteristics of transistors. Disagreement of experimental and simulation results are less than 20% that makes it useful and efficient tool for MMIC radiation hardening by design.

Radiation-oriented (RO-) and microwave (MW) characterization of the several process technologies – CMOS silicon-on-insulator (SOI) 180 nm process, CMOS 90 nm process, SiGe BiCMOS 0.42/0.25 µm process, GaAs heterojunction bipolar transistor (HBT) 2 µm process and GaAs pseudomorphic high electron mobility transistor (PHEMT) 0.5 µm process, which suitable for the development of radiation-tolerance transceiver integrated circuits with operating frequencies up to 30 GHz are presented. The results of MW-characterization showed two process technologies manufacturing in "foundry" mode – CMOS SOI 180 nm and CMOS 90 nm potentiality for the development of transceiver ICs with operating frequencies above 3 GHz and 12 GHz respectively. Obtained experimental results allow to determine radiation-tolerance indicators for the total ionizing dose, neutrons, impulse exposure and heavy ions and specify critical elements and IP-block fragments for given processes. Experimental data can be used at the first step of reasonable choice of process technologies for radiation-tolerant transceiver design.

Radio frequency identification systems (RFID) are widely used for monitoring and localization of underground infrastructure objects: pipelines, power, and communication networks. Wireless underground sensor networks (WUSN) are the promising application areas that cover a number of fields: agriculture, mining, environmental control, etc. A progress in semiconductor technologies has opened up new opportunities for developing cheap and compact monolithic ultra-high frequency (UHF) receiver and transmitter integrated circuits - basic building blocks of RFID and WUSN systems. Read range (RR), the path loss (PL) and the bit error rate (BER) are the main characteristics of RFID and WUSN communication channel. The dielectric properties of the soil, determined by the composition and moisture, affect the electromagnetic wave (EMW) propagation that leads to significant PL and limits RR. In this work, a practical approach to UHF underground channel characterization, based on the modified Friis model and the vector network measurements is proposed. The modeling and measurements issues are discussed, that are important for the path loss prediction in the soil with different composition and moisture.

This work focuses on the design issues of radio frequency (RF) bipolar integrated circuits (ICs) as a part of frequency synthesizers for extreme environmental applications. It is shown that silicon-germanium (SiGe) and gallium arsenide (GaAs) heterojunction bipolar transistors (HBTs) as well as bipolar RF ICs (including frequency dividers, voltage-controlled oscillators, and wide-band amplifiers) are highly sensitive to ambient temperature and radiation-induced displacement damage. This article also presents a design approach based on specialized HBT macromodels and hardening techniques.

Рассмотрены тенденции развития ЭКБ твердотельной СВЧ-электроники (ТСВЧЭ) класса «система на кристалле» и «система в корпусе» РЭА связи и передачи данных, радиолокации, навигации. Проведен анализ номенклатуры изделий отечественной ЭКБ ТСВЧЭ, рассмотрены проблемные вопросы проектирования и производства.

Рассмотрены особенности создания и применения радиационно-ориентированных моделей (РОМ) при проектировании отказоустойчивых изделий СВЧ-диапазона класса СнК и СвК. Представлены примеры РОМ для техпроцессов, применяемых отечественными ДЦ.

Рассмотрены состояние и проблемные вопросы контрактного производства ЭКБ ТСВЧЭ, представлены результаты характеризации ряда отечественных и зарубежных техпроцессов, пригодных для разработки радиационно стойких приемопередающих ИС с рабочими частотами до 30 ГГц.

Design and testing results of a single power supply wide-band low noise amplifier (LNA) based on low cost 0.5 ?m D-mode pHEMT process are presented. It is shown that the designed cascode LNA has operating frequency range up to 3.5 GHz, power gain above 15 dB, noise figure below 2.2 dB, output linearity above 17 dBm and power consumption less than 325 mW. Potential immunity of the LNA to total ionizing dose and destructive single event effects exceed 300 krad and 60 MeV?cm2/mg respectively.

Results of domestic D-mode pHEMT 0.5 μm process characterization obtained during the design and testing of the single power supply wide-band low noise amplifier (LNA) are present. The simulation and test results demonstrate that designed cascode LNA has operating frequency range up to 3.5 GHz, power gain above 15 dB, noise figure below 2.2 dB, output linearity above than 17 dBm and power consumption less than 325 mW. Potential immunity of LNA to total ionizing dose and destructive single event effects exceed 300 krad and 60 MeV·cm 2 /mg respectively.