Recent advancements in extreme ultraviolet (EUV) lithography have greatly enhanced the manufacturing of fine semiconductor nodes in high volume production (HVM). With the introduction of high NA (numerical aperture) EUV, further miniaturization is expected, and it is necessary to develop lithography technology to accommodate this. Chemically amplified resist (CAR) is widely used in HVM due to their stability and advantages as metal–free resists, and adapting CAR to the High–NA EUV era has important implications. Achieving high resolution in EUV involves a trade–off between resolution, line width roughness (LWR), and sensitivity. Reducing roughness is especially important because roughness can cause pattern defects. This paper aims to reduce CAR roughness and improve the trade–off. We investigated the reduction of roughness through a post–development treatment applied to EUV–exposed patterns. To examine the influence of this post–development treatment, we performed a power spectral density (PSD) analysis of LWR. Additionally, we compared the cross–sectional shape of resist patterns before and after treatment to understand the reactions occurring within the resist. The results showed that the LWR decreased by 13.1% for 44nm line/space (L/S) pitch and 4.0% for 28nm L/S pitch after the post–development treatment. Of particular interest, the use of additional processing demonstrated the potential to reduce low–frequency roughness, which is normally very challenging. These results show the potential for the application of CAR in next–generation lithography.

High-NA EUV lithography is currently under development to keep up with device node scaling with smaller feature sizes. In this paper, the most recent advances in EUV patterning using metal oxide resists (MOR) and chemically amplified resists (CAR) are discussed. A newly developed resist development method (ESPERT™) was examined on MOR with 24 nm pitch line and space (L/S) patterns and 32 nm pitch pillars for preparation of high-NA EUV patterning. The patterning results showed improved sensitivity and pattern collapse margin. CAR contact hole patterning at 28 nm pitch was also examined by stochastic lithography simulation. The simulation results indicate that resist film thickness needs to be optimized for target pitches.

One of the key steps in the pattern formation chain of (extreme ultraviolet) EUV lithography is the development process to resolve the resist pattern after EUV exposure. A simple traditional development process might not be sufficient to achieve the requirements of an ultra-high-resolution feature with low defect levels in high numerical aperture (NA) EUV lithography. In our previous literature, a new development method named ESPERTTM (Enhanced Sensitivity develoPER TechnologyTM) has been introduced to improve the performance of metal oxide resists (MOR) for 0.33 NA EUV lithography by breaking the dose-roughness trade-off. In this work, this development technique was optimised for high-NA lithography to not only keep the advantages of previous ESPERTTM version, but also reduce the defect levels at a higher EUV sensitivity. This is made possible thanks to the capability of the new version of ESPERTTM that can easily remove the residue (undeveloped resist) at low exposure dose area to enhance the developing contrast. Using 0.33 NA EUV scanners at imec on 16-nm half-pitch (HP) line/space (L/S) patterns, with the new development method, EUV dose-to-size (DtS) was reduced roughly 16%, and total after-development-inspection (ADI) defects was reduced by a factor of approximately 7, simultaneously. In another condition, DtS was reduced from 44.2 to 28.4 mJ/cm² (an improvement of 36%), while the number of after-etch-inspection (AEI) single-bridge defects was reduced by half, simultaneously. Using the 0.5 NA exposure tool at Lawrence Berkeley National Laboratory with this new development method, the exposure sensitivity and line-width-roughness (LWR) were both improved by 30% and 21%, respectively. An 8-nm-HP L/S pattern was also successfully printed by this high NA tool. Using a 150 kV electron-beam (EB) lithography system, a 12-nm-HP of pillars was successfully printed on a 22-nm-thick MOR resist with ESPERTTM. With all the advantages of having a high exposure sensitivity, a low defectivity, and an ultra-high-resolution capability, this new development method is expected to be a solution for high-NA EUV lithography.

Extreme ultraviolet (EUV) lithography has already introduced in high volume manufacturing and continuous improvements has allowed to resolve pitch 24 nm line and space (L/S), pitch 32 nm contact hole and pillar pattern with single exposure at even numerical aperture (NA) 0.33. However, pattern roughness, local critical dimension uniformity (LCDU) and process related defects are still major challenges with decreasing critical dimensions (CD). Pitch downscaling also require the use of thinner photoresist mask to prevent pattern collapse from high aspect ratios. Thinner photoresist mask is challenging for pattern transfer because the resist “etch budget” is becoming too small to prevent pattern break during plasma etch transfer. It is required to investigate a co-optimization of lithography processes, underlayers and etch processes to further EUV patterning extension. In this paper our latest developed technology and process solutions to extend the limits of EUV patterning will be report.

In this talk we present core technology solutions for EUV Patterning and co-optimization between EUV resist and underlayer coating, development and plasma etch transfer to achieve best in class patterning performance. We will introduce new hardware and process innovations to address EUV stochastic issues, and present strategies that can extend into High NA EUV patterning. A strong focus will be placed on dose reduction opportunities, thin resist enablement and resist pattern collapse mitigation technologies. CAR and MOR performance for leading edge design rules will be showcased. As the first High NA EUV scanner is scheduled to be operational in 2023 in the joint high NA lab in Veldhoven, Tokyo Electron will collaborate closely with imec, ASML and our materials partners to accelerate High NA learning and support EUV roadmap extension.

EUV (extreme ultraviolet) lithography has been introduced in high volume manufacturing in 2019 and continuous improvements have allowed to push the lithographic performance to the limits of 0.33 NA single exposure. However, stochastic failures, pattern roughness and local critical dimension uniformity (LCDU) are still major challenges that need to be addressed to maintain node shrinkage and improve yield. Together with pitch downscaling, photoresist thickness is decreasing to prevent pattern collapse. A lower depth of focus is also expected with high NA EUV which might even thin further down the resist layer. Being able to transfer the patterns with good fidelity is therefore getting very challenging because the resist “etch budget” is becoming too small to prevent pattern break during plasma etch transfer. A co-optimization of lithography processes, underlayers coating and etch processes is essential to further support the EUV patterning extension. In this report, recently developed hardware and process solutions to stretch the limits of EUV patterning will be presented. The latest performance for both chemically amplified resists (CAR) and metal oxide resists (MOR) will be introduced, with a focus on defect mitigation, dose reduction strategies and CD stability.

In the last years, the continuous efforts on the development of extreme ultraviolet lithography (EUVL) have allowed to push the lithographic performance of the EUV photoresists on the ASML NXE:3400 full field exposure tool, however, stochastic resist roughness, local critical dimension uniformity (LCDU) and pattern defectivity at nano-scale are still the major limiting factors of the lithographic process window of EUV resist when looking at sub-40nm pitches for both linespace (LS) and contact hole (CH) applications, especially in the low exposure dose regime [1]. To be effective during the lithographic EUV resist screening evaluation phase for such tight pitches, imec has implemented since 2018 [2] additional metrology analysis after resist development inspection (ADI) to further quick feedback on the quantification of nano-failures (nano-bridges, broken lines, merging or missing contacts) induced by a stochastic EUV patterning regime, and thus to improve the resist design at lithographic step in a faster manner. In this work, we have further extended the examination of the resist performance introducing additional metrology analysis after pattern transfer in a silicon nitride (SiN) substrate. We present the characterization results on 40nm and 36nm pitch staggered dense contact holes looking at both lithographic and etching knobs to mitigate the patterning process stochastic issues, confirming that the holistic litho-etch approach is an important and necessary step in the development path of EUV advanced patterning applications towards high volume manufacturing and high-NA EUV lithography.

One of the critical challenges for delivering next nodes or high-NA extreme ultraviolet (EUV) lithography to high volume manufacturing (HVM) in the semiconductor industry is to have a high-performance EUV resist process. The high-performance resist process needs to simultaneously meet multiple requirements, such as high resolution, high sensitivity, low roughness, a low defect level, and good global CD uniformity (CDU). In this paper, we will introduce a new wet development (DEV) method to improve the performance of metal oxide resists (MOR), which is named ESPERTTM** (Enhanced Sensitivity develoPER Technology). This newly invented method can meet multiple requirements together where it is not possible with the conventional development method. With 36 nm pitch pillar patterns, we have confirmed with after etch inspection (AEI) data that the new method produced 22% improvement in EUV dose and 7% improvement in LCDU, simultaneously. No pattern collapse was observed at least up to 15.4 nm pillar size. In the case of 30 nm pitch line/space (L/S) pattern, the improvements were 26% in EUV sensitivity and 12.3% in LWR also with AEI results. Furthermore, the new method could also shift the bridging cliff 0.5 nm to the larger line CD while its global CDU was improved 2.6 times. The new data achieved by the new wet development method make us believe that MOR are mostly ready for HVM and this new method is also aiming to be used in high NA EUV lithography in the near future. **) ESPERTTM is trademarks of Tokyo Electron Limited.

Background: In extreme ultraviolet lithography, maximum printable feature density is limited by stochastic defectivity. One of the methods to reduce it is the optimization of the aerial image via source mask optimization. To guide this optimization, we need to know which aerial image metric predicts defectivity. Feature variability is linked to defectivity. Aim: Find which aerial image metric best predicts variability and defectivity. Approach: We construct seven pupils that vary aerial image metrics [normalized image log slope (NILS), depth-of-focus (DoF), maximum intensity] in a controlled way. We measure variability and defectivity after development and after two different etch processes and correlate them to aerial image metrics. Results: Stochastic critical dimension uniformity (CDU) is best predicted by NILS. Systematic CDU is determined by mask roughness through spatial frequency, with low frequencies differentiating outer and inner sigma pupils. Defectivity is best predicted by maximum intensity for missing holes and minimum intensity for merging holes. NILS and maximum intensity are strongly correlated. DoF has minimal impact. Conclusions: Optimization toward maximum intensity reduces defectivity. Outer sigma pupils reduce variability. Increasing numerical aperture in next-generation EUV lithography is expected to reduce missing hole defects. (c) 2022 Society of Photo-Optical Instrumentation Engineers (SPIE)

Extreme ultraviolet (EUV) lithography has been used for mass production for several years. Now the resolution limit of current 0.33 NA single exposure has been approaching. To enhance the resolution limit, high NA exposure tool has been developing. At the limit, not only the stochastic failures1, but also patterning trade-off has been becoming challenging. In this paper, to overcome the patterning trade-off of LS and CH, several approaches were demonstrated for both CAR and MOR. As for chemically amplified resist (CAR), to overcome the patterning trade-off of line and space, two different approaches were demonstrated. One was a developer rinse process optimization, and the other was a top deposition treatment during etching process. By using the two approaches, pitch 24 nm LS patterns were successfully transferred. As to CAR CH patterning, a new shrink technique during etch process was successfully tested for sub 15 nm hole patterning. No missing hole detected at 12 nm hole size by voltage contrast metrology. For tighter nodes, spin-on metal oxide resist (MOR) have been considering to be used because it offers a series of advantages. It has high sensitivity and resolution because of its high photon absorption and simple reaction mechanism. It also inherently has a higher etch resistance which enables resist thickness thinner and collapse margin higher. Spin-on process of MOR is expect to contribute high productivity which is essential for high volume manufacturing (HVM). Because defect reduction is one of the key points to enable MOR process for HVM, continuous investigation of defect mitigation has been done. For pitch 32 nm LS, the mitigation was confirmed by fine optimization with the combination of the etch process and the implementation of new under layers. As to pitch 28nm line and space, optimized illumination gave better defect process windows. Moreover, a new wet developer process was successfully proposed to prevent pitch 36 nm hexagonal pillars collapse during wet development with 25% higher EUV sensitivity.

Extreme ultraviolet (EUV) lithography faces major challenges for smaller nodes due to the impact of stochastic and processing failures.1 One of the main challenges for pitch shrink at these nodes is the optimization of the trade-off between break type defects versus bridge type defects as the process window between these defect modes gets smaller.2 In this paper, we examine EUV defect reduction techniques for Chemically Amplified Resist (CAR) and Metal Oxide Resist (MOR) via coater/developer process development combined with optimized etching processes.

EUV (extreme ultraviolet) lithography is progressively being inserted in high volume manufacturing of semiconductors to keep up with node shrinkage. However, defectivity remains one big challenge to address in order to be able to exploit its full potential. As in any type of lithographic process, processing failures and in-film particles are contributors that need to be reduced by the optimization of coating and development processes and improved dispense systems. On top of these defects, stochastic failures, due to photon shot noise or non-uniformities in the resist, are another major contribution to the defectivity. To support their mitigation, etch process can be used to avoid their transfer to underlying layers. However, it requires a sufficient resist mask thickness. For line and space patterns, providing more resist budget comes with a trade-off which is the increase of pattern collapse failures, especially with shrinking critical dimensions. Collapse mitigation approaches are therefore very important to enable tight pitches and were explored. Stack engineering and especially optimization of resist under layers will be crucial components to enable patterning and defect reduction of shrinking pitches. Finally, as an alternative to traditional chemically amplified resists, metal containing resists are also promising because of their inherent high etch resistance. Dedicated hardware and processes were developed the use of such materials and prevent metal contamination to other tools during further processing steps. In this report will be presented the latest solutions to further decrease defectivity towards manufacturable levels and provide more process margin to achieve better quality patterning towards the limits of NA 0.33 EUV exposure. Furthermore, technologies to improve CD uniformity and stability, which are required for mass production, will also be reported.

Extreme ultraviolet (EUV) lithography has been begun high volume manufacturing (HVM). To allow for robust processing, both CAR and novel metal oxide resist (MOR) materials are needed, but they each come with unique challenges specific to the layer being printed. CAR resist shows good capability for CH printing and pattern transfer. However, specific processing techniques for the pattern transfer is required to mitigate LCDU issues. Additionally CAR L/S printing shows robust capability at 18nm HP, but when approaching 16nm HP, the defect process window is impacted by collapse and bridging. For ultimate resolution, novel materials such as MOR have been demonstrated but sensitivities of the materials for CD stability and defectivity need to be mitigated. TOKYO ELECTRON investigates ways to reduce these risks with a novel approach for coating process, post exposure bake, and developing sequence. This paper reports technologies to improve CDU, PW, and defectivity. In addition, we report solutions of solving metal contamination risk for MOR while maintaining productivity.

Although being progressively introduced to mass production, extreme ultraviolet (EUV) lithography still faces major challenges for 5nm and smaller nodes due to the impact of stochastic and processing failures, resulting in very narrow defect process windows. 1 These failures are strongly linked to critical dimension (CD) variations.2 Therefore, careful control of CD is now directly linked to defect reduction in addition to more conventional in-film particles/developer residues reduction. Photoresist profiles are also believed to be one possible limiting factor and improvements via collapse control or increased resist mask thickness for etch transfer need to be considered. In this paper, most recent understandings regarding defect process window limitations and optimization of processes to further enable narrow pitch EUV lithography will be presented.