To enhance sampling rates of CMOS digital-to-analog converters (DACs), analog multiplexing of several DAC output signals in the time domain provides a solution. In this article, a full CMOS integration of two sub-DACs and an active analog multiplexer (AMUX) on a single chip in 28-nm fully depleted silicon-on-insulator (FD-SOI) CMOS technology is presented for the first time for sampling rates of 100 GS/s and beyond. Sampling rates up to 108 GS/s for broadband pulse-amplitude modulated (PAM) signals and up to 118 GS/s for oversampled signals are shown outperforming previously reported data in terms of sampling rate or data rate, respectively. Two 8-bit sub-DACs up to 59 GS/s with CMOS inverter-based output drivers and pseudo-segmentation provide the analog input data for the 2:1 AMUX realized in current-mode topology. An additional on-chip memory of 256 kB completes the system to a universal arbitrary waveform generator (AWG). At 100 GS/s, the total power consumption is about 4 W. Generally, an AMUX is able to shift the limits of DACs in well-established CMOS technologies toward higher frequencies independent on technology advances and opens a second, conceptual path for achieving higher sampling rates with an additional benefit of a principle bandwidth extension by the AMUX operation.

To enhance the performance of digital-to-analog converters (DACs), time interleaving by an analog multiplexer (AMUX) provides a powerful concept. Next to an increased sampling rate, potential signal quality improvement as well as a sin( ${x}$ )/ ${x}$ roll-off shift due to the nonlinear switching operation enabling a true bandwidth extension can be achieved. In this letter, an integrated AMUX in a 28-nm CMOS technology is presented. The fundamental roll-off shift is deduced from a general mathematical model. In measurements, the roll-off shift as well as improvements of the edge jitter of pulse-amplitude modulated (PAM) signals due to the AMUX are demonstrated at a sampling rate of 100GS/s. Compared to single-DAC operation at 50GS/s, the total edge jitter of a PAM-2 signal can be improved from a standard deviation of about 1.27ps to about 0.56ps at 100GS/s with AMUX operation in the given system. Finally, switching operation of the AMUX at 126GS/s is shown demonstrating the potential of the concept.

In high-speed data transmission systems, CMOS digital-to-analog converters (DACs) at very high sampling rates are essential components allowing predistortion of the transmitted signal. Next to compensation of bandwidth limitations of the DAC and assembly, predistortion is also able to compensate other effects originating from time interleaving or from artifacts of the DAC circuit concept. Especially, linear, periodically time-varying (LPTV) effects are one source of impairments in the output signal causing spurious components and their compensation is of particular importance for time-interleaved systems. In this work, a universal predistortion concept including system identification based on the system’s reactions to unit impulses at all corresponding positions in a period is presented and applied to a 28-nm CMOS DAC with time interleaving by an analog multiplexer at sampling rates up to 100 GS/s. Measurements of this DAC reveal LPTV effects with a period of 32 affecting the analog output signal that may be attributed to time interleaving as well as architecture. A theoretical problem description is given and sources of LPTV distortions are identified. Starting from the theoretical description, a universal N:1 predistortion method in time domain is deduced based on a simple system identification method. Measurements of single-tone signals reveal a signal-to-noise and distortion ratio improvement up to 13.5 dB and around 7 dB for a broadband, two-level pulse-amplitude modulated signal at 100 GS/s compared to a linear, time-invariant filter. The proposed predistortion concept is a universal method to compensate for any N:1 LPTV artifacts with significant reduction of LPTV distortions and can be translated to a common transversal filter structure.

Pulse shaping for signal transmission over bandwidth limited channels and for sensor systems is very important to control intersymbol interference and to comply with spectrum emission mask specifications by reducing the occupied bandwidth. In this work, an efficient, low-power concept for digital-to-waveform conversion is presented on a 22 nm CMOS node. A key characteristic is the approximation concept of a raised-cosine filter for waveform synthesis by non-binary weighting in the digital-to-analog converter (DAC) keeping hardware complexity and thus power consumption low. Due to the proposed pulse shaping method, spectral side lobes of a pseudo-random bit stream example can be reduced by more than 20 dB at 24 GS/s and a power consumption of only about 30 mW. In summary, this concept replaces high-resolution DACs or analog filters, respectively, in pulse shaping circuits by simple CMOS logic and an application-centric DAC.

Clock paths in mixed-signal integrated circuits are critical building blocks possibly determining the entire circuit performance. A precisely controllable clock phase is highly desirable e.g. for monolithic, ultra high-speed data converters with time-interleaving, i.e. digital-to-analog (DAC) and analog-to-digital (ADC) converters, to adjust the time-interleaved converter channels' timing. More precisely, these converters use the means of analog multiplexing at the DAC outputs or analog demultiplexing at the ADC inputs, respectively. A broadband and low jitter clock path for frequencies up to 57 GHz is presented including 5 bit programmable phase interpolators at half input frequency with a phase delay resolution of about 1.25 ps realized in a 28nm FD-SOI CMOS technology. A combination of current mode logic and CMOS logic is used in the proposed circuit.

This data set contains simulation results of a high-speed serializer for a 64 GS s-1 digital-to-analog converter. The circuit is presented in the paper "High-Speed Serializer for a 64 GS s-1 Digital-to-Analog Converter in a 28 nm Fully-Depleted Silicon-on-Insulator CMOS Technology" in the open access journal "Advances in Radio Science".

An attractive solution to provide several channels with very high data rates of tens of Gbit s−1 for digital-to-analog converters (DACs) in arbitrary waveform generators (AWGs) is to use a high speed serializer in front of the DAC. As data sources, on-chip memories, digital signal processors or field-programmable gate arrays can be used. Here, we present a serializer consisting of a 19 channel 16:1 multiplexer (MUX) for output data rates up to 64 Gbit s−1 per channel and a low skew ( ∼ 8.8 ps) two-phase frequency divider and clock distribution network that is completely realized in static CMOS logic. The circuit is designed in a 28 nm Fully-Depleted Silicon-on-Insulator (FD-SOI) technology and will be used in an 8 bit 64 GS s−1 DAC between the on-chip memory and the DAC output stage. Due to a four bits unary and four bits binary segmentation, a 19 channel MUX is required. Simulations on layout level reveal a data-dependent peak-to-peak jitter of less than 1.8 ps at the output of one MUX channel with a total average power consumption of approximately 1.15 W of the whole MUX and clock network.

This paper presents a 2:1 Analog Multiplexer (AMUX) in a SiGe-HBT technology. The AMUX is used for time interleaving operation of two digital-to-analog converters (DACs) and therefore extends both the sampling rate and the bandwidth compared to a single DAC. The linear AMUX signal path allows for generation of broadband signals with higher order modulation schemes which is essential for raising data rates in optical communication networks. The AMUX provides a differential peak-to-peak output voltage of up to 1 V with linear gain. A signal path 3-dB bandwidth exceeding 6 7 GHz has been measured. The clock path exhibits a 3-dB bandwidth of 6 0 GHz. S-parameter measurements are presented. Measured PAM4 eye diagrams at 5 6 GS/s from the time interleaving operation of two DACs are reported.

We present a sealed, permanent, compact and efficient optical fiber-to-chip interface utilizing the wide-spread grating coupler. The easily produced fiber link is based on the reflection in an angle-polished fiber with a reflective metal coating. Efficiencies for different coupling methods to grating couplers are compared.

We present a novel silicon-organic hybrid modulator based on an integrated dual-mode interferometer. The modulator offers a compact, simplified design and enhanced robustness to on-chip fluctuations of temperature compared to conventional Mach-Zehnder based systems. A prototype modulator showing a voltage dependent transmission spectrum is obtained by cladding a dual-mode waveguide in a 250 nm silicon-on-insulator technology with a customized organic electro-optic layer. Estimated phase shifts and corresponding figures of merit are discussed in this contribution. The used organic layer is based on the guest-host approach with customized donor-π-acceptor chromophore embedded and poled in a poly(methylmethacrylate) matrix. The presented prototype is to the best of the authors' knowledge the first integrated single waveguide silicon-organic hybrid modulator.

Room temperature lasing from electrically pumped n-type doped Ge edge emitting devices has been observed. The edge emitter is formed by cleaving Si-Ge waveguide heterodiodes, providing optical feedback through a Fabry-Perot resonator. The electroluminescence spectra of the devices showed optical bleaching and intensity gain for wavelengths between 1660 nm and 1700 nm. This fits the theoretically predicted behavior for the n-type Ge material system. With further pulsed electrical injection of 500 kA/cm2 it was possible to reach the lasing threshold for such edge emitters. Different lengths and widths of devices have been investigated in order to maintain best gain-absorption ratios.

Multi-quantum well light-emitting diodes, consisting of ten alternating GeSn/Ge-layers, were grown by molecular beam epitaxy on Si. The Ge barriers were 10 nm thick, and the GeSn wells were grown with 7% Sn and thicknesses between 6 and 12 nm. The electroluminescence spectra measured at 300 and 80 K yield a broad and intensive luminescence band. Deconvolution revealed three major lines produced by the GeSn wells that can be interpreted in terms of quantum confinement. We interpret that the three lines represent two direct lines, formed by transitions with the light and heavy hole band, respectively, and an indirect line. Biaxial compressive strain causes a splitting of light and heavy holes in the GeSn wells. This interpretation is supported by an effective mass band structure calculation.

The heteroepitaxial growth of GeSn and Ge crystals on Si substrates are investigated for Si-based photonic applications. Light Emitting Diodes with emission wavelengths from 2,100 to 1,550 nm could be demonstrated with active intrinsic GeSn light emitting layers between Ge barriers. A clear shift of the direct band gap toward the infrared beyond 2 μm is measured. Emission intensity is increased compared to Ge Light Emitting Diodes. Room temperature lasing from electrically pumped n-type doped Ge edge emitting devices are demonstrated. The edge emitter is formed by cleaving Si-Ge waveguide heterodiodes, providing optical feedback through a Fabry-Pérot resonator. The electroluminescence spectra of the devices showed optical bleaching and intensity gain for wavelengths between 1,660 nm and 1,700 nm.

We compare charge transitions on a deterministic single P donor in silicon using radio frequency reflectometry measurements with a tunnel coupled reservoir and DC charge sensing using a capacitively coupled single electron transistor (SET). By measuring the conductance through the SET and comparing this with the phase shift of the reflected radio frequency (RF) excitation from the reservoir, we can discriminate between charge transfer within the SET channel and tunneling between the donor and reservoir. The RF measurement allows observation of donor electron transitions at every charge degeneracy point in contrast to the SET conductance signal where charge transitions are only observed at triple points. The tunnel coupled reservoir has the advantage of a large effective lever arm (similar to 35%), allowing us to independently extract a neutral donor charging energy similar to 62 +/- 17 meV. These results demonstrate that we can replace three terminal transistors by a single terminal dispersive reservoir, promising for high bandwidth scalable donor control and readout. (C) 2015 AIP Publishing LLC.

Germanium tin (GeSn) shifts the photo-response of infrared (IR) light detectors from a typical cutoff wavelength of Ge detectors of 1550nm toward the mid infrared (MIR) [1]. The determination of the optical absorption coefficient of GeSn is difficult because it requires both high grade GeSn material and appropriate measurement structure. A series of vertical pin photodetector with the absorber material GeSn of excellent quality were fabricated achieving quantitative extraction of the absorption coefficient from photo-response. In this paper the fabrication of vertical GeSn photodetectors, the measurement of the background doping level in the intrinsic region (i-region) and the determination of the absorption coefficient are presented and the influence of high doped contact layers and electro-absorption effects from the built-in electric field are discussed.

Two new types of Ge1-XSnX virtual substrate (VS) with a Sn concentration of 2 % and 4 % were fabricated. The two types consist of a non-annealed directly on Si grown Ge1-XSnX VS and an annealed Ge1-XSnX VS on Ge VS. The complete layer structure is grown by means of ultra-low temperature molecular beam epitaxy (MBE) in order to suppress the Sn segregation. For an electrical and optical characterization, the VS technology is used to grow p-i-n photodetectors. The dark current characteristics show a higher dark current for Ge1-XSnX directly on Si, also the responsivity and the emission intensity are lower due to more dislocations.

In this presentation we discussed the growth and the optical properties of n-doped Ge lateral LEDs. We showed, that the optical bleaching of the material and the corresponding decrease of net absorption in the Fabry-Perot cavity leads to higher electroluminescence intensity. This is a very important step to achieve net-gain inside the indirect semiconductor material Ge and to build a laser device5 with low threshold current densities.

The fabrication of GeSn layers is one of the worldwide current areas of research in material science. The driving force behind it, is the possibility to realize a group IV direct bandgap semiconductor. Theoretical calculations show values between 10 % for relaxed GeSn crystals and 6 % for tensile-strained GeSn crystals. However, only its synthesis on Si substrates is of interest for the photonic components applications. For the manufacture of GeSn based components on Si substrates, a specific Ge VS (virtual substrate) has to be first realized in order to overcome the large lattice mismatch (≥ 4.2 %). This method has been developed by Kasper et al. for SiGe heterostructures on Si and its here used to provide, without epitaxial break, the desired lattice constant for the grow of Sn based alloys. The use of such VS minimize the number of the threading dislocations as required for high performance optical devices. The significant progress made in recent years allowed the demonstration of GeSn based electro-optical components integrated on Si. A compressively strained heterostructure can by relaxed by various methods. These are, for example, special annealing steps, increasing the layer thickness over the critical thickness t crit or by means of point defects introduced during low temperature growth. If a Ge or GeSn film is deposited directly on Si it relaxes very quickly since the critical thickness is only a few nanometer thick. At the same time the threading dislocation density is extremely high. An alternative is an ultra-thin Ge VS developed in the last few years. The threading dislocation density is significantly reduced by high temperature annealing steps close to the melting point of Ge. This technology is used here as a basis for GeSn structure growth. The optical properties of the GeSn layers with 2 % and 4 % Sn content are addressed via pin photodetectors fabrication (see Fig. 1). As a reference the GeSn pin detectors were manufactured without VS directly on Si. An overview of the layer structures are shown in figure 2. The strain statuses of the individual samples were analyzed by RSM (reciprocal space mapping). These show that the samples on Si are 100 % strain relaxed and the samples on Ge VS are still under 50 % rest compressive strain. The dark current of the individual samples are shown in the figure 3. The GeSn samples grown directly on Si show a much higher dark current due to the significantly higher threading dislocation densities compared to the samples on Ge-VS. At a bias of -1 V, the dark current is increased by more than one order of magnitude. In Figure 4, the optical responsivity of each sample is shown as a function of wavelength.

The optical properties and the Franz-Keldysh effect at the direct band gap of GeSn alloys with Sn concentrations up to 4.2% at room temperature were investigated. The GeSn material was embedded in the intrinsic region of a Ge heterojunction photodetector on Si substrates. The layer structure was grown by means of ultra-low temperature molecular beam epitaxy. The absorption coefficient as function of photon energy and the direct bandgap energies were determined. In all investigated samples, the Franz-Keldysh effect can be observed. A maximum absorption ratio of 1.5 was determined for 2% Sn for a voltage swing of 3 V.

In this paper we investigate the influence of n-type doping in Ge light emitting diodes on Si substrates on the room temperature emission spectrum. The layer structures are grown with a special low temperature molecular beam epitaxy process resulting in a slight tensile strain of 0.13%. The Ge LED's show a dominant direct bandgap emission with shrinking bandgap at the Γ point in dependence of n-type doping level. The emission shift (38 meV at 10²⁰cm⁻³) is mainly assigned to bandgap narrowing at high doping. The electroluminescence intensity increases with doping concentrations up to 3x10¹⁹cm⁻³ and decreases sharply at higher doping levels. The integrated direct gap emission intensity increases superlinear with electrical current density. Power exponents vary from about 2 at low doping densities up to 3.6 at 10²⁰cm⁻³ doping density.