Cu films with low impurities were electroplated on pure Cu, CuCo alloy and electrodeposited Co seed layers to study the room temperature grain growth behavior. As-evaporated Cu and CuCo alloy seed layers showed a significant enhancement effect on the Cu recrystallization compared with sputtered Cu seed layers and post-annealed evaporated seed layers. The impact of the electrodeposited Co seed layer on the Cu grain growth was found to be dependent on the Co plating chemistry and on the thickness of the Co film. Co films plated in the absence and presence of saccharin showed a crystal structure of fcc and hcp, respectively. While the former showed little to no impact on the Cu recrystallization, the later was found to enhance or hinder the Cu recrystallization depending on the thickness of the Co. Studies on a Cu/Co sandwich stack structure showed that the recrystallization started at the top Cu layer, proceeding to the middle layer and then to the bottom layer. (C) 2013 The Electrochemical Society. All rights reserved.

Mesoporous silica (MPS) films are attractive for isolating Cu wiring in nanodevices but are susceptible to pore wall collapse and water and metal uptake. Pore-sealing and chemical passivation with molecular surfactants are potential solutions that could address these challenges. Here, we show that silylated MPS films capped with a Cu overlayer fracture near the Cu/MPS interface at a distance that correlates with the Cu penetration depth into MPS. Pristine MPS films fracture farther from the MPS/Cu interface than silylated MPS, where silylation-induced pore passivation hinders Cu penetration. Silylation also lowers the tensile stress and the fracture toughness of MPS films, but the relative extent of the decreases in these properties decreases the overall driving force for cracking. Such effects of molecular passivation on metal penetration, film stress, and fracture toughness and pathways are important for engineering stable porous dielectrics for nanodevice wiring structures.

Low dielectric permittivity mesoporous silica (MPS) films with high mechanical and chemical stability are attractive for electrically isolating multilevel wiring in future nanodevices. Here, we show that pore structure is a crucial determinant of chemically induced leakage currents in pristine and silylated MPS films and strongly influences film stiffness and hardness in silylated MPS films. Films with three-dimensional pore networks exhibit superior mechanical properties than films with cylindrical pores oriented exclusively parallel to the surface. The latter, however, exhibit a fourfold higher resilience to copper diffusion. These differences are attributed to the pore structure and its influence on silylation-induced bond-breaking and passivation.

Low-k organosilicate films are considered essential for meeting the material needs of interconnect dielectric layers in present and future semiconductor devices. These materials, whether deposited by chemical vapor deposition or spin-on processes, are mechanically inferior as compared to undoped silicate glass or fluorine doped silicate glass. The introduction of porosity to further lower the dielectric constant diminishes the mechanical properties even more. For this reason, post-porosity treatments such as E-beam and UV curing have been explored. In this paper, we describe the use of laser spike annealing (LSA) to achieve similar results. Infrared analysis coupled with Rutherford backscattering, forward recoil, and X-ray photoelectron spectroscopy were used to study the effect of varying laser power and dwell time on the structural changes of both a dense and porous organosilicate, indicating removal of hydrogen and some carbon from the samples. These changes were interpreted in terms of oxidative and bond redistribution transformations. As a result of the structural changes, significant increases in Young's modulus were achieved. Properties such as k, refractive index, film shrinkage, and water contact angle were also correlated with laser power and dwell time. LSA compares favorably with both E-beam and UV curing and three times improvements in modulus without significantly affecting k were observed.

UV-curable nanoimprint resist characteristics and performance are key to controlling resist-related defects formed during template removal due to cohesive failure and strong resist-template adhesion. The debonding process is governed by both the chemical bonds that form between the template and the resist during cure, and by the structure of the resist itself which determines its elastic-plastic response under load. To gain insight to contributions from resist composition to the debonding process we examine the connection between mechanical and chemical properties of a family of methacrylate polyfunctionalized polyhedral oligomeric silsesquioxane (mPSS) containing resists to their adhesion to fluoroalkyl silane release layers. We also survey debonding of one of the mPSS formulations, an acrylate formulation and a vinyl ether formulation from as series of metal oxide and metal nitride release layers. The results show that while intrinsic storage modulus of a cured material is important,, interfacial segregation of reactants in fluid resists can influence adhesive properties as well. The metal-containing release layers are shown to have generally much lower adhesion to cured resists than does a fluoroalkyl silane release layer. They present a useful alternative for template release treatments.

A porous pSiCOH interconnect dielectric with a dielectric constant k=2.4 has been developed from mixtures of a SiCOH skeleton precursor and bicycloheptadiene (BCHD) and optimized for successful integration in the interconnect structure of 45 nm ULSI chip. The ulk pSiCOH is characterized by small pores, low pore connectivity, and excellent electrical properties. This paper describes the selection of the precursors, the optimization process and the properties of the optimized pSiCOH. The film has been qualified for integration in three 2X dual damascene metallization levels of 45 nm interconnects.

Integration of low-dielectric constant SiCOH dielectrics (k~3) adjacent to gate stacks is demonstrated using 65 nm technology. Substantial reductions in parasitic capacitances are achieved through reductions in the outer fringe component of the overlap capacitance and the capacitance between the gate stack and metal contacts. These results are consistent with modeling. Although this is demonstrated with 65 nm devices, low-k spacers can cut active power consumption and have the potential to improve performance through reductions in parasitic capacitances which will be of greater importance for future technology nodes.

An advanced porous SiCOH (pSiCOH) dielectric with k = 2.4 and superior properties optimized for reliable integration is presented. This ULK pSiCOH is characterized by small pores, low pore connectivity, and high Si-CH3 concentration. Excellent electrical properties are measured in blanket films of advanced pSiCOH: low leakage current, high breakdown field, and stable k value after exposure to integration processing. The electrical performance of the advanced pSiCOH demonstrates that this new ULK dielectric will provide reliable BEOL interconnects with low RC product for CMOS generations at 45 nm and beyond.

Low dielectric constant (low-k) nanocomposite thin films have been prepared by spin coating and thermal cure of solution mixtures of one of two organic low-k thermoset prepolymers and a silica nanoparticle with an average diameter of about 8 nm. The electrical, the mechanical, and the thermomechanical properties of these low-h nanocomposite thin films have been characterized with 4-point probe electrical measurements, nanoindentation measurements with an atomic force microscope, and specular X-ray reflectivity. Addition of the silica nanoparticle to the low-k organic thermosets enhances both the modulus and the hardness and reduces the coefficient of thermal expansion of the resultant nanocomposite thin films. The enhancements in the modulus of the nanocomposite thin films are less than those predicted by the Halpin-Tsai equations, presumably due to the relatively poor interfacial adhesion and/or the aggregation of the hydrophilic silica nanoparticles in the hydrophobic organic thermoset matrices. The addition of the silica nanoparticle to the low-k organic thermoset matrices increases the relative dielectric constant of the resultant nanocomposite thin films. The relative dielectric constant of the nanocomposite thin films has been found to agree fairly we 11 with an additive formula based on the Debye equation. (C) 2007 Wiley Periodicals, Inc.

Reliability is an important requirement for the newly developed porous low-k ILD materials that are being introduced into (BEOL). Dependence of Young's moduli, as measured by nanoindentation technique, on the environment [such as high relative humidity, water immersion and recovery] is presented along with FT-IR spectra for a number of films with different k values. Effect of the moduli changes on cracking behavior is also discussed.

With the simple insertion of imbedded nano layer during the deposition of plasma deposited porous low k SiCOH film, the cracking resistance of the hick ILD film can be improved significantly without changing modulus and hardness properties. The reduction in cracking will help to facilitate the implementation of thick ILD in Cu/Low-k ILD for advanced BEOL

A high performance 45nm BEOL technology with proven reliability is presented. This BEOL has a hierarchical architecture with up to 10 wiring levels with 5 in PECVD SiCOH (k=3.0), and 3 in a newly-developed advanced PECVD ultralow-k (ULK) porous SiCOH (k=2.4). Led by extensive circuit performance estimates, the detrimental impact of scaling on BEOL parasitics was overcome by strategic introduction of ULK at 2times wiring levels, and increased 1times wire aspect ratios in low-k, both done without compromising reliability. This design point maximizes system performance without adding significant risk, cost or complexity. The new ULK SiCOH film offers superior integration performance and mechanical properties at the expected k-value. The dual damascene scheme (non-poisoning, homogeneous ILD, no trench etch-stop or CMP polish-stop layers) was extended from prior generations for all wiring levels. Reliability of the 45 nm-scaled Cu wiring in both low-k and ULK levels are proven to meet the criteria of prior generations. Fundamental solutions are implemented which enable successful ULK chip-package interaction (CPI) reliability, including in the most aggressive organic flip-chip FCPBGA packages. This represents the first successful implementation of Cu/ULK BEOL to meet technology reliability qualification criteria

During the manufacturing process of the BEOL the low-k brittle ILD dielectrics are exposed to wet environments. These environments could and do affect the films fracture toughness, the so called critical film thickness, above which spontaneous cracking occurs. Nanoindentation combined with AFM imaging methods allow to study these phenomena.

This paper describes the optimization of Plasma Enhanced Chemical Vapor Deposition (PECVD) low dielectric constant SiCOH films implemented in 65nm CMOS devices ground riles. The SiCOH film properrties were optimized for high mechanical strength and low cracking velocity while maintaining with low dielectric constant in the range of k=2.72.8. The integration results were comparable to those of the current first-generation SiCOH film (k similar to 3.0) integration. The film structure analysis showed that the films contain a high level of cross-linked bonding which attributed to its improved mechanical strength. The improved mechanical film properties allowed its implementation into 65nm Cu/low-k BEOL using the 90nm process integration scheme, while maintaining ULSI chip reliability.