Silicon photonic (SiPh) micro-ring resonator (MRR) based optical interconnects integrated with XPU/switch packages can enable very high data rates per-fiber through dense wavelength division multiplexing (DWDM). We demonstrate an O-band DWDM link with simultaneous $16-\lambda$ transmission at $50 \text{Gbps} / \lambda$, for an aggregate data-rate of 800 Gbps/fiber, with BER<1e-9. An Intel 22 nm CMOS electronic integrated circuit (EIC) is 3D assembled with an Intel Fab11X photonic IC (PIC) and placed in an open-cavity substrate. The PIC integrates a $16-\lambda$ laser, $\lambda$-interleavers, MRRs for modulation and $\lambda$-demultiplexing, and optical amplification for link margin. The 22nm EIC features several high-speed techniques to push per-$\lambda$ data rate.

We demonstrate a fully integrated DWDM transmitter and a passive polarization diversity receiver operating at 4 lambda x 32 Gbps. Eye diagrams remain stable under polarization scrambling, indicating effective polarization diversity operation.

The surge in high-throughput applications necessitates advancements in data transmission. Increasingly complex, power-hungry equalization and digital signal processing (DSP) techniques limit electrical interconnect scalability and reach. Pluggable optical modules extend the reach, but at the cost of scalability/power challenges, due to their integrated re-timer (or DSP) which cleans up the received signal before sending it to the optical engine (OE). By directly connecting computing (XPU) systems to OEs, emerging co-packaged optics (CPO) [1]–[2] can address these challenges by eliminating the re-timer. Multi-mode vertical-cavity surface-emitting lasers (VCSEls) continue to improve their performance and enable high-BW connectivity over a few tens of meters [1]–[2] in conjunction with high bandwidth (BW) circuit techniques. Higher order pulse-amplitude modulation such as PAM-4 doubles the BW. This paper presents a PAM-4 VCSEl -based direct-drive OE targeting CPO applications [1]–[2]. The XPU IC is not implemented in this work. The direct-drive OE integrates VCSEl driver (VCDRV) and transimpedance amplifier front end (TIAFE) $\text{lCs}$, with their VCSEl and photodiode (PO) counterparts which are fiber terminated with optical waveguides or direct optical wiring (DOW) technology [3]. Several circuit techniques are introduced to enable the $> 100\text{Gb}/\mathrm{s}$ PAM-4 direct-drive OE: (1) a high-linearity coupled-inductor-based compact complex-zero continuous-time linear equalizer (CZ-CTlE) to equalize a complex-pole pair in VCSEl optical response; (2) a high-linearity differential TIAFE to handle high input optical modulation amplitudes (OMAs); and (3) an active complex-zero CTlE to equalize for the complex-pole pair in the shunt-feedback TIA response.

We demonstrate a 3-D heterogeneously integrated dense wavelength-division multiplexing (DWDM) silicon-photonic transmitter simultaneously modulating eight 200-GHz spaced wavelengths at 50 Gbps lambda each, to deliver an aggregate per-fiber bandwidth of 400 Gbps. All necessary O -band optical components are fully integrated on the photonic integrated circuit (PIC), including an eight-wavelength laser array, a broadband semiconductor optical amplifier (SOA), and eight microring modulators (MRMs). Eight 50-Gbps non-return-to-zero (NRZ) modulator drivers, capable of delivering 2-V-pp modulation voltage, are integrated in a 28-nm CMOS electronic IC (EIC). The EIC also includes a thermal control unit (TCU) to align the eight MRMs to the eight laser wavelengths by appropriately tuning integrated MRM heaters. The measured energy efficiency at 50 Gb/s of the high-speed electronics, including serializer overhead, is 1.17 pJ/bit.

This paper presents a 4-channel co-packaged optical RX that integrates a photo diode array, fiber termination and a transimpedance amplifier front end (TIA-FE) IC on the same package as an RX data-path IC. To achieve high sensitivity, the TIA-FE employs bandwidth extension and in-band group delay compensation techniques that are co-optimized with a 1/4-rate 2-tap feed-forward equalizer (FFE) in the RX data-path. A StrongArm latch that improves noise variance by 3.5x for iso-power is introduced. Modulated by its VCSEL-based optical TX counterpart, the optical RX demonstrates 4×50Gb/s NRZ at 1.5pJ/b with BER<10 −12 and a sensitivity of -6dBm.

We demonstrate a 3-D heterogeneously integrated dense wavelength-division multiplexing (DWDM) silicon-photonic transmitter simultaneously modulating eight 200-GHz spaced wavelengths at 50 Gbps/ $\lambdab $ each, to deliver an aggregate per-fiber bandwidth of 400 Gbps. All necessary $O$ -band optical components are fully integrated on the photonic integrated circuit (PIC), including an eight-wavelength laser array, a broadband semiconductor optical amplifier (SOA), and eight microring modulators (MRMs). Eight 50-Gbps non-return-to-zero (NRZ) modulator drivers, capable of delivering 2-V $_{\mathrm{pp}}$ modulation voltage, are integrated in a 28-nm CMOS electronic IC (EIC). The EIC also includes a thermal control unit (TCU) to align the eight MRMs to the eight laser wavelengths by appropriately tuning integrated MRM heaters. The measured energy efficiency at 50 Gb/s of the high-speed electronics, including serializer overhead, is 1.17 pJ/bit.

As bandwidth demand increases, electrical interconnects suffer from limited reach due to channel loss. Multi-mode vertical-cavity surface-emitting laser (VCSEL)-based optical interconnects can enable high-bandwidth connectivity while extending the reach to tens of meters [1] –[3]. Pluggable VCSEL-based optical modules are widely used in data center communication. With VCSELs and their drivers separately mounted on a board, these modules similarly suffer from electrical interconnect limitations when they communicate to computing/switching (XPU/SW) systems; hence, they do not meet stringent system requirements on interconnect latency, bandwidth (BW), or energy efficiency. A co-packaged optical interconnect solution can address the outlined challenges by integrating the optical components with an XPU/SW and satisfy VCSEL temperature and reliability requirements [4]. This paper presents a co-packaged VCSEL-based optical TX solution that integrates a VCSEL driver (VCDRV) IC, VCSEL array, and fiber termination on the XPU/SW package. A complex-zero continuous time linear equalizer (CTLE) is introduced to equalize a complex-pole pair present in the VCSEL optical response and enhance the maximum achievable baud rate for best latency and energy efficiency. A low-power, low-jitter resonant clocking architecture improves system jitter performance and includes a transmission-line (TL)-based resonant distribution and a wide-tuning-range quadrature generation (quad-gen). Finally, a low-power serializer and electrical driver architecture employs pulse-width correction for improved eye symmetry.

We present a 256 Gb/s (8$\lambda$*32 Gb/s/$\lambda$) 3D-integrated silicon photonic (SiPh) receiver suitable for integration in XPU/switch packages. The photonic IC (PIC) integrates a multi-wavelength laser, optical amplifier, and cascaded micro-ring resonators (MRRs) to implement dense wavelength division multiplexing (DWDM) with minimal footprint. The 28nm CMOS electronic IC includes eight SerDes channels, and PIC interface/control electronics. A dither-based thermal control unit tunes MRRs in the optical demux to align with the laser grid with sub-pm resolution. Measured results demonstrate BER<1e-12 when receiving 256 Gb/s DWDM input generated by MRRs modulating eight 200 GHz-spaced wavelengths. This is 2X higher aggregate bandwidth than previously published SiPh MRR-based receivers, with higher level of photonic integration.

Silicon photonics-based optical 1/O is a promising technology direction to meet the ever growing off-chip 1/O bandwidth needs of data-intensive computing. While silicon photonic (SiPh) transceivers are increasingly being used in pluggable modules for data center communications, the power efficiency and latency constraints for their integration in XPU/switch packages (such as recent demonstrations in [1], [2]) are significantly more stringent, requiring different solutions. Ring resonator-based transceiver architectures are attractive for this application due to their small footprint and suitability for dense wavelength division multiplexing (DWDM), which enables energy-efficient bandwidth scaling. System demonstrations of ring-based transceivers with per-wavelength data rates of up to 16 Gb/s and low BER (<1e-12) have been shown recently [2]; however, these require an external multi-wavelength laser source, increasing optical path loss and requiring additional fibers be attached to the compute package. Prior demonstrations have shown higher baud rates in ring-based systems, but modulate only one wavelength at a time [3], [4]. This paper presents a SiPh microring-based TX that includes all photonic and electronic components needed to support simultaneous modulation of eight 200 GHz-spaced wavelengths at 32 Gbps/λ (for an aggregate bandwidth of 256 Gbps/fiber).

We demonstrate a 256Gbps WDM transceiver with eight 200GHz-spaced wavelengths simultaneously modulated at 32Gbps and <1e-12 BER. The system includes a silicon photonic PIC with integrated lasers, microring modulators, SOAs, Ge photodetectors, and a co-designed CMOS EIC.

An optical transmitter (TX) data path is demonstrated in 28-nm CMOS which drives an 850-nm vertical-cavity surface-emitting laser (VCSEL) up to 56 Gb/s non-return-to-zero (NRZ). A dc-coupled single-ended voltage-mode driver employs area- and energy-efficient equalization techniques including slew-rate-based pulse-shaping at <40 Gb/s, active shunt peaking, and a three-tap feed-forward equalizer (FFE) at ≥40 Gb/s, for an optimum TX optical eye. At a 56 Gb/s data rate, the energy efficiency of 1.28 pJ/b from a 1.15 V supply is measured which is $> 2\times $ more energy- and area-efficient than optical TXs reported to date. The highly digital circuit architecture enables the supply scalability to 0.7 and 0.85 V to operate the TX at 32 and 40 Gb/s at 0.56 and 0.77 pJ/b, respectively, which is $\ge 4\times $ more energy-efficient than the prior art.

Optical receivers (ORXs) with integrated CMOS electronics enable compact, low-power solutions for 400-G Ethernet and co-packaged optics. In this article, we present a 100-Gb/s PAM-4 ORX with TIA and sampler integrated into a single 28-nm CMOS IC. ORX sensitivity is optimized using a low noise, sub-Nyquist bandwidth TIA followed by a mixed signal sampler that includes 2-tap FFE and 2-tap DFE. A distributed current-integrating summer helps meet feedback latency requirements of 50-Gbaud direct-feedback PAM-4 DFE. Measurements characterizing the CMOS linear TIA indicate ~23-GHz trans-impedance (ZT) bandwidth (BW) with- $2.5~\mu \text{A}_{\mathrm {rms}}$ input-referred noise. Optical measurement results at 100 Gb/s show that −8.9-dBm sensitivity is achieved at 2.4e-4 BER with 3.9-pJ/bit energy efficiency.

Photonics die or integrated photonics modules co-packaged with compute engines have the potential to deliver significant improvements in power, bandwidth and reach needed to meet the computing and communication demands of data centers and other high-performance computing (HPC) systems. The challenges and solutions in co-packaging photonics modules are described through two case studies; one of a network-switch die co-packaged with socketable photonics modules and another of a Field Programmable Gate Array (FPGA) co-packaged with optical dies (tiles). The technical requirements to deliver the promise of co-packaged photonics in high volume are outlined.

This work presents a hybrid-integrated 4- $\lambda $ micro-ring modulator-based wavelength-division multiplexed (WDM) optical transmitter (OTX) in the O-band, suitable for co-packaged optics. It supports up to 112 Gb/s per wavelength using high-bandwidth micro-ring modulators (MRMs) together with nonlinear equalization in the driver electronics. A thermal control scheme using MRM photocurrent to sense process and temperature variations is implemented, enabling <0.05 dB TDECQ penalty over 10 °C. This compact photocurrent-based control method significantly reduces the hardware and packaging overhead required for ring-based WDM transceivers. Measurements from a 4- $\lambda $ OTX with 28-nm CMOS electronic IC (EIC) and custom silicon photonic IC (PIC) show the OTX supports 112 Gb/s with <0.7 dB TDECQ across all four channels while dissipating 5.8 pJ/bit in the electronics.

A low-power CMOS linear driver IC, optimized for microring modulator-based co-packaged optics, is presented. This 2.5 V ppd driver, assembled with a photonic IC, achieves 2 dB TDECQ at 106 Gb/s PAM4 with 1.33 pJ/bit efficiency.

We present a 4λ×112 Gb/s/λ hybrid-integrated silicon photonic TX suitable for 400G Ethernet modules and co-packaged optics. The photonic IC (PIC) uses cascaded micro-ring modulators (MRMs) with integrated heaters for efficient wavelength division multiplexing (WDM). The 28nm CMOS electronic IC includes PAM4 MRM drivers with nonlinear FFE and control circuits to stabilize MRM performance against process and temperature variations. A thermal control scheme based on sensing MRM photocurrents is used to minimize monitoring hardware in the PIC. Measured results demonstrate 112 Gb/s PAM4 operation with <0.7 dB TDECQ from each of the 4 channels. To our best knowledge, this is the highest per-λ data rate reported for an O-band ring-based WDM transmitter.

Several 400G Ethernet standards (e.g. 400G-DR4/FR4) have been developed to address the rapid increase in interconnect BW demand created by data-centric computing [1]. Low-cost100Gb/s PAM-4 optical transceivers are critical to spur their adoption in high volume by data centers. While low-cost integrated silicon-photonic 100Gb/s PAM-4 transmitters have been demonstrated recently, the electronics in current receiver solutions is more disaggregated. They typically employ a standalone BiCMOS TIA 1C followed by a 100G PAM-4 (ADC+DSP)-based SerDes 1C (designed to equalize high-loss electrical channels), which results in higher power dissipation and package cost. To address these drawbacks, we present a 100Gb/s PAM-4 optical RX with a single-chip Solution integrating all 0f the RX electronics in a bulk CMOS process. While standalone l00Gb/s PAM-4 CMOS linear TIAs have been shown in prior work [2], [3], their integration with subsequent SerDes has not yet been demonstrated.

We demonstrate a 4λ ring-based WDM transceiver, with all-silicon ring photodetectors, ring modulators and all necessary CMOS transceiver electronics. All four channels are verified at 50 Gb/s/λ with better than 1e-12 BER.

As data rates continue to increase, the reach of electrical interconnects is becoming shorter due to loss and distortion of the signal. Optical interconnects based on vertical-cavity surface-emitting lasers (VCSELs) provide a cost-effective solution to transfer data over tens of meters in data centers. However, integrating optical transceivers within a server platform requires improved bandwidth density and energy efficiency. High data-rate, compact area, and energy-efficient transmitter (TX) circuits that mitigate VCSEL nonlinearity and bandwidth limitations are key enablers of this integration. This paper presents an optical TX implemented in 28nm bulk CMOS which drives an 850nm VCSEL up to 56Gb/s.

Microring modulators (MRMs) with CMOS electronics enable compact low power transmitter solutions for 400G Ethernet and co-packaged optical transceivers. In this article, we present a 3-D-integrated 112-Gb/s pulse amplitude modulation (PAM)-4 optical transmitter (OTX) using silicon photonic MRM, on-chip laser, and co-packaged 28-nm CMOS driver. The 3- $V_{\mathrm {pp}}$ driver includes a lookup table (LUT)-based PAM-4 nonlinear equalizer to address static and dynamic MRM nonlinearities. An integrated thermal control method that is insensitive to input power fluctuations is proposed to compensate for the temperature sensitivity of MRMs. PAM-4 measurement results of our OTX at 112 Gb/s show that transmitter dispersion eye closure quaternary (TDECQ) < 1.5 dB is achieved from 28 °C to 55 °C with 7.4-pJ/bit energy efficiency including on-chip laser.