A four-channel vertical cavity surface-emitting laser (VCSEL)-based co-packaged optical (CPO) transceiver (TRX) is demonstrated, integrating a photodiode (PD) array, a trans-impedance amplifier front-end integrated circuit (TIA-FE IC), an electrical receiver (RX) IC, and optical fiber termination on a single package on the receive side. The transmitter (TX) counterpart incorporates a VCSEL array, a VCSEL driver IC, and an electrical TX IC, all on a single package. To mitigate the group delay (GD) distortion caused by packaging parasitics, an input matching network is introduced in the TIA-FE IC. Several bandwidth extension techniques are employed, along with a two-tap Cherry-Hooper-based FIR feedforward equalizer (FFE) in the electrical RX IC, to compensate for inter-symbol interference (ISI) and a low-noise double-tail latch. When modulated by its VCSEL-based optical TX counterpart, the RX achieves an aggregate four-channel data rate of 200 Gb/s non-return-to-zero (NRZ) at 1.5 pJ/b, with a bit error rate of less than 10(-12) and a sensitivity of -6 dBm.

This article introduces a four-channel (4-Ch) multi-mode (MM) vertical-cavity surface-emitting laser (VCSEL)-based co-packaged optical transmitter (TX), integrating a VCSEL array, a VCSEL driver (VCDRV) IC, an electrical TX IC, and optical fiber termination within a single package. A complex-zero continuous-time linear equalizer (CZ-CTLE) is proposed to effectively equalize the complex-pole response of the VCSEL, improving in-band gain/group delay (GD) flatness and extending bandwidth (BW). To enhance link energy efficiency and jitter margin, resonant clocking techniques are proposed, including a transmission-line-based resonant global clock distribution and a wide-tuning-range coupled-resonator-based quadrature generation. A low-power electrical TX architecture employing an NMOS-over-NMOS (N/N) voltage-mode driver with eye symmetry correction is introduced to further improve the energy efficiency and link margin. The optical TX prototype, implemented in a 22-nm FinFET process, achieves an aggregate non-return-to-zero (NRZ) data rate of 256 Gb/s with an energy efficiency of 1.3 pJ/b. This work outperforms previous optical TXs by >2.2x in optical modulation amplitude, achieving 1.4x (7.6x) greater eye width (EW) eye height (EH), with 14% higher per-channel baud rate and 11% better energy efficiency. The direct-drive optical driver achieves 80-Gb/s NRZ operation, demonstrating a 13% higher data rate and 25x better energy efficiency than prior art. This work also marks the first successful demonstration of more than 50-Gb/s VCSEL-based co-packaged optical TX topology at a 6.4x higher rate than the previous efforts.

The surge in high-throughput applications necessitates advancements in data transmission. Increasingly complex, power-hungry equalization and digital signal processing (DSP) techniques limit electrical interconnect scalability and reach. Pluggable optical modules extend the reach, but at the cost of scalability/power challenges, due to their integrated re-timer (or DSP) which cleans up the received signal before sending it to the optical engine (OE). By directly connecting computing (XPU) systems to OEs, emerging co-packaged optics (CPO) [1]–[2] can address these challenges by eliminating the re-timer. Multi-mode vertical-cavity surface-emitting lasers (VCSEls) continue to improve their performance and enable high-BW connectivity over a few tens of meters [1]–[2] in conjunction with high bandwidth (BW) circuit techniques. Higher order pulse-amplitude modulation such as PAM-4 doubles the BW. This paper presents a PAM-4 VCSEl -based direct-drive OE targeting CPO applications [1]–[2]. The XPU IC is not implemented in this work. The direct-drive OE integrates VCSEl driver (VCDRV) and transimpedance amplifier front end (TIAFE) $\text{lCs}$, with their VCSEl and photodiode (PO) counterparts which are fiber terminated with optical waveguides or direct optical wiring (DOW) technology [3]. Several circuit techniques are introduced to enable the $> 100\text{Gb}/\mathrm{s}$ PAM-4 direct-drive OE: (1) a high-linearity coupled-inductor-based compact complex-zero continuous-time linear equalizer (CZ-CTlE) to equalize a complex-pole pair in VCSEl optical response; (2) a high-linearity differential TIAFE to handle high input optical modulation amplitudes (OMAs); and (3) an active complex-zero CTlE to equalize for the complex-pole pair in the shunt-feedback TIA response.

article presents a multimode vertical-cavity surface-emitting laser (VCSEL)-based direct-drive optical engine for co-packaged optics (CPOs) applications that employs pulse amplitude modulation (PAM)-4 to enhance shoreline bandwidth (BW) density and features a compact direct optical wiring (DOW) approach for on-package fiber termination. On the transmit side, a VCSEL driver (VCDRV) comprising a passive complementary-drive complex-zero continuous-time linear equalizer (CZ-CTLE) is introduced to compensate for the VCSEL's complex-pole response while offering the high linearity required for PAM-4 signaling. The receiver integrates a high-linearity transimpedance amplifier front-end (TIA-FE) capable of handling large input current swings, followed by an active CZ-CTLE to equalize the complex-pole pair response of the low-gain shunt-feedback transimpedance amplifier (TIA). The transceiver prototype, fabricated in a 22-nm FinFET process and integrated on-package with optical devices and fiber-termination, achieves a PAM-4 data rate of 108 Gb/s with a record energy efficiency (EE) of 0.9 pJ/b-representing over 1.7x improvement in data rate compared to previously reported VCSEL-based transceivers. The optical transmitter supports 128 Gb/s PAM-4 operation, demonstrating a 1.5x data rate improvement and 1.6x better EE than the fastest reported integrated VCDRV. Compared to PAM-4 VCDRVs in the prior art, this work achieves 2x higher data rate, > 1.8x better optical modulation amplitude (OMA), and 3x better EE.

We demonstrate a 3-D heterogeneously integrated dense wavelength-division multiplexing (DWDM) silicon-photonic transmitter simultaneously modulating eight 200-GHz spaced wavelengths at 50 Gbps lambda each, to deliver an aggregate per-fiber bandwidth of 400 Gbps. All necessary O -band optical components are fully integrated on the photonic integrated circuit (PIC), including an eight-wavelength laser array, a broadband semiconductor optical amplifier (SOA), and eight microring modulators (MRMs). Eight 50-Gbps non-return-to-zero (NRZ) modulator drivers, capable of delivering 2-V-pp modulation voltage, are integrated in a 28-nm CMOS electronic IC (EIC). The EIC also includes a thermal control unit (TCU) to align the eight MRMs to the eight laser wavelengths by appropriately tuning integrated MRM heaters. The measured energy efficiency at 50 Gb/s of the high-speed electronics, including serializer overhead, is 1.17 pJ/bit.

This paper presents a 4-channel co-packaged optical RX that integrates a photo diode array, fiber termination and a transimpedance amplifier front end (TIA-FE) IC on the same package as an RX data-path IC. To achieve high sensitivity, the TIA-FE employs bandwidth extension and in-band group delay compensation techniques that are co-optimized with a 1/4-rate 2-tap feed-forward equalizer (FFE) in the RX data-path. A StrongArm latch that improves noise variance by 3.5x for iso-power is introduced. Modulated by its VCSEL-based optical TX counterpart, the optical RX demonstrates 4×50Gb/s NRZ at 1.5pJ/b with BER<10 −12 and a sensitivity of -6dBm.

We demonstrate a 3-D heterogeneously integrated dense wavelength-division multiplexing (DWDM) silicon-photonic transmitter simultaneously modulating eight 200-GHz spaced wavelengths at 50 Gbps/ $\lambdab $ each, to deliver an aggregate per-fiber bandwidth of 400 Gbps. All necessary $O$ -band optical components are fully integrated on the photonic integrated circuit (PIC), including an eight-wavelength laser array, a broadband semiconductor optical amplifier (SOA), and eight microring modulators (MRMs). Eight 50-Gbps non-return-to-zero (NRZ) modulator drivers, capable of delivering 2-V $_{\mathrm{pp}}$ modulation voltage, are integrated in a 28-nm CMOS electronic IC (EIC). The EIC also includes a thermal control unit (TCU) to align the eight MRMs to the eight laser wavelengths by appropriately tuning integrated MRM heaters. The measured energy efficiency at 50 Gb/s of the high-speed electronics, including serializer overhead, is 1.17 pJ/bit.

As bandwidth demand increases, electrical interconnects suffer from limited reach due to channel loss. Multi-mode vertical-cavity surface-emitting laser (VCSEL)-based optical interconnects can enable high-bandwidth connectivity while extending the reach to tens of meters [1] –[3]. Pluggable VCSEL-based optical modules are widely used in data center communication. With VCSELs and their drivers separately mounted on a board, these modules similarly suffer from electrical interconnect limitations when they communicate to computing/switching (XPU/SW) systems; hence, they do not meet stringent system requirements on interconnect latency, bandwidth (BW), or energy efficiency. A co-packaged optical interconnect solution can address the outlined challenges by integrating the optical components with an XPU/SW and satisfy VCSEL temperature and reliability requirements [4]. This paper presents a co-packaged VCSEL-based optical TX solution that integrates a VCSEL driver (VCDRV) IC, VCSEL array, and fiber termination on the XPU/SW package. A complex-zero continuous time linear equalizer (CTLE) is introduced to equalize a complex-pole pair present in the VCSEL optical response and enhance the maximum achievable baud rate for best latency and energy efficiency. A low-power, low-jitter resonant clocking architecture improves system jitter performance and includes a transmission-line (TL)-based resonant distribution and a wide-tuning-range quadrature generation (quad-gen). Finally, a low-power serializer and electrical driver architecture employs pulse-width correction for improved eye symmetry.

This article presents a ultra-wideband (UWB)-based wireless transceiver (TRX) in a reconfigurable frequency-division duplexing (FDD) wireless network for short-range multicast applications. The TRX operates at the 7–10-GHz band, adopts a digital-process-friendly architecture, and delivers up to 2-Gb/s data rate in 500-MHz channel bandwidth. The measured power consumption is 19.8 mW at the 8-GHz channel, resulting in a best-in-class energy efficiency of 9.9 pJ/b for sub-10-GHz wireless TRXs. The TRX outputs −5.5-dBm power and achieves −67.5-dBm sensitivity at 1 Gb/s. Having a coherent TRX architecture, it can tolerate self-interference during FDD operation with 1-dB receiver de-sensitization and close-in −26-dBm Wi-Fi blockers with 3-dB de-sensitization.

We present a 256 Gb/s (8$\lambda$*32 Gb/s/$\lambda$) 3D-integrated silicon photonic (SiPh) receiver suitable for integration in XPU/switch packages. The photonic IC (PIC) integrates a multi-wavelength laser, optical amplifier, and cascaded micro-ring resonators (MRRs) to implement dense wavelength division multiplexing (DWDM) with minimal footprint. The 28nm CMOS electronic IC includes eight SerDes channels, and PIC interface/control electronics. A dither-based thermal control unit tunes MRRs in the optical demux to align with the laser grid with sub-pm resolution. Measured results demonstrate BER<1e-12 when receiving 256 Gb/s DWDM input generated by MRRs modulating eight 200 GHz-spaced wavelengths. This is 2X higher aggregate bandwidth than previously published SiPh MRR-based receivers, with higher level of photonic integration.

This paper presents a sub-10GHz wireless transceiver for short-range multicast applications in a reconfigurable FDD wireless network. The transceiver adopts a digital-process-friendly architecture and can deliver up to 2Gb/s data rate in a 500MHz channel bandwidth with 19.8mW power consumption and 9.9pJ/b energy efficiency. Being a coherent transceiver, it outputs -5.5dBm power, achieves -67.5dBm sensitivity at 1Gb/s and 1dB de-sensitization during FDD operation while tolerating -26dBm close-in Wi-Fi blockers.

An experimentally validated numerical model is developed to analyze the operation of a piezoelectrically actuated cantilever vibrating close to a heated surface. The vibrating cantilever acts as a fan and provides localized cooling. The numerical results for the flow field and heat transfer show satisfactory agreement with experiments. The numerical model is used to develop fan curves for the piezoelectric fans, using a methodology similar to that used in constructing pump or fan curves for conventional fans. A simplified model based on stagnation region heat transfer in impingement flows is also proposed to estimate the heat transfer from a piezoelectric fan. The velocities obtained from the piezoelectric fan curves generated are used in this impingement heat transfer model, and the predictions are found to agree with measured stagnation zone Nusselt numbers with an average deviation of 17%.

Piezoelectric fans have emerged as a viable cooling technology for the thermal management of electronic devices, owing to their low-power consumption, minimal noise emission, and small and configurable dimensions. Piezoelectric fans are investigated for application in the cooling of low-power electronics. Different experimental configurations are considered, and the effect of varying the fan amplitude, the distance between the fan and the heat source, the fan length, its frequency offset from resonance, and the fan offset from the center of the heat source are studied to assess the cooling potential of the fans. A design of experiments (DOE) analysis revealed the fan frequency offset from resonance and the fan amplitude as the critical parameters. Transfer functions are obtained from the DOE analysis for the implementation of these fans in electronics cooling. For the best case, an enhancement in convective heat transfer coefficient exceeding 375% relative to natural convection was observed, resulting in a temperature drop at the heat source of more than 36.4°C. A computational model for the flow field and heat transfer induced by the piezoelectric fan is also developed. Effects of the flow on convection heat transfer for different fan-to-heat source distances and boundary conditions are analyzed. Transition between distinct convection patterns is observed with changes in the parameters. The computational results are validated against experimental measurements, with good agreement.

The cooling performance of piezoelectric actuators is evaluated for low-form-factor electronics in this work. A piezoelectric actuator is a cantilever made from metal or plastic with a piezoelectric material bonded to it. Under an alternating electrical current, the piezo actuator oscillates back and forth, generating airflow. Compared to conventional fans, these actuators have the advantages of low power consumption, low noise, and smaller dimensions. The parameters investigated in the experiments are actuator orientation, actuator-to-heat source distance, and actuator amplitude. For an actuator power consumption of 31 mW, the heat source temperature was lowered by more than 25 degrees C compared to natural convection conditions (for a 2.45 W heater power dissipation). Performance comparisons against axial fans and natural convection heat sinks show that the piezo actuators perform significantly better in terms of power consumption and cooling volume.

Piezoelectric fans are investigated as a cooling technology for the thermal management of electronic devices. Flow visualization experiments are conducted to better understand the physics of fan operation. Prototypes of the fans are built and tested to assess their feasibility and cooling performance and determine optimal locations for the fans. An enclosure the size of a cellular phone and a commercially available laptop computer are used to demonstrate the cooling feasibility of the fans. Piezoelectric fans are found to offer significant localized cooling, exceeding enhancements in convective heat transfer coefficients of 100%, while exhibiting low power consumption, minimal noise, and small dimensions. Performance metrics for piezoelectric fans should be based on heat transfer characteristics, such as the percent increase in the heat transfer coefficient of the system. Optimization techniques that maximize the electromechanical coupling factor (EMCF) can be used to design efficient fans.

Piezoelectric fans have emerged as a viable alternative for electronics cooling applications requiring low input power and noiseless operation. A piezoelectric fan is a cantilever actuated by a piezoelectric ceramic material bonded to it. The fan oscillates back and forth creating airflow when an alternating electric field is applied to this bonded piezoelectric ceramic. Forced convection induced by such an oscillating fan in an enclosure is numerically investigated. The computational model is capable of sustaining deforming fluid cells that allow large boundary movement. The moving wall boundary, modeled as large-amplitude beam deflection, initiates flow in the fluid domain which enhances convection to varying extents depending on the heat source-to-fan distance and beam deflection amplitude. The effects of these parameters on heat transfer are studied. Transition between distinct convection patterns is observed with changes in the parameters. Results are validated against experimental measurements, with good agreement.

Miniaturized resonating slender beams are finding increased applications as fluidic actuators for portable electronics cooling. Piezoelectric and ultrasonic "fans" drive a flexural mode of the beam into resonance thus inducing a streaming flow, which can be used to cool microelectronic components. This paper presents analytical, computational, and experimental investigations of the incompressible two-dimensional streaming flows induced by resonating thin beams. Closed-form analytical streaming solutions are presented first for an infinite beam. These are used to motivate a computational scheme to predict the streaming flows from a baffled piezoelectric fan. Experiments are conducted to visualize the asymmetric streaming flows from a baffled piezoelectric fan and the experimental results are found to be in close agreement with the predicted results. The findings are expected to be of relevance in the optimal design and positioning of these solid-state devices in cooling applications.