Magnetoresistive Random Access Memory (MRAM) offers high-speed, non-volatile storage for advanced embedded and standalone applications, yet wafer-level characterization of switching and reliability remains challenging due to the magnetic nature of device operation. This work presents synchronized magnetic–electrical wafer-level testing using the Hprobe IBEX platform integrated with a Tokyo Electron Limited Precio XL 300 mm probe station. The system enables localized three-dimensional vector magnetic field control and sub-nanosecond pulsed electrical excitation, combined with an adaptive Test/Skip methodology to reduce device stress. Experiments on 300 mm wafers with 14 MTJ pillar (RR) and bottom electrode (V0) geometries quantify resistance screening, R–H loops, DC and pulsed I–V behavior, bit error rate (BER), and endurance across pulse widths from 20 to 200 ns. Statistical analysis across multiple dies demonstrates size dependent switching voltage, yield trends, and pulse-width dependent degradation, consistent with thermal activation models for spin-transfer torque switching. Time savings of up to 28.5% were observed in this paper where overall savings depended heavily on initial device yield time. These results highlight the importance of wafer-level magnetic probing for predictive reliability assessment and scalable high-volume MRAM test methodologies.

Negative differential resistance (NDR) behavior observed in several transition metal oxides is crucial for developing next-generation memory devices and neuromorphic computing systems. NbO2-based memristors exhibit two regions of NDR at room temperature, making them promising candidates for such applications. Despite this potential, the physical mechanisms behind the onset and the ability to engineer these NDR regions remain unclear, hindering further development of these devices for applications. This study employed electrical transport and ultra-low frequency noise spectroscopy measurements to investigate two distinct NDR phenomena in nanoscale thin films of NbO2. By analyzing the residual current fluctuations as a function of time, spatially inhomogeneous and non-linear conduction are found near NDR-1 and a two-state switching near NDR-2, leading to an insulator-to-metal (IMT) transition. The power spectral density of the residual fluctuations exhibits significantly elevated noise magnitudes around both NDR regions, providing insights into physical mechanisms and device size scaling for electronic applications. A simple theoretical model, based on the dimerization of correlated insulators, offers a comprehensive explanation of observed transport and noise behaviors near NDRs, affirming the presence of non-linear conduction followed by an IMT connecting macroscopic device response to transport signatures at the atomic level.

Phase change memory (PCM) is considered an enabling technology for non-volatile multilevel data storage and neuromorphic computing. Recent advancements in PCM have highlighted the need to improve resistance drift and energy efficiency. At present, binary alloys that phase-separate upon crystallization offer a promising solution. The Al–Sb binary alloy crystallizes into a rhombohedral Sb-rich phase and a cubic AlSb phase, with the latter having a higher melting temperature that enables selective melting of the Sb-rich phase for partial RESET programming. Continuum resistance states result from a reversible alloying process, in which programming pulses modulate the granularity and aluminum content of the amorphous Sb-rich phase. Al0.4–Sb0.6 PCM cells, fabricated on Si-foundry templates, exhibit a high resistance contrast of up to 4000× between fully amorphous and crystalline states, along with a low resistance drift coefficient (∼0.06). The high melting point of AlSb also leads to nanoscale compositional heterogeneity, which persists in the amorphous state, suppressing structural relaxation and thus reducing resistance drift. These findings position Al0.4–Sb0.6 as a promising material for engineering multilevel PCM cells based on phase-separating alloys.

Resistive Random Access Memory (ReRAM) is a novel non-volatile memory technology, with potential applications spanning high-density memory and embedded memory in various non-von Neumann computing architectures. This study investigated the dependency of ReRAM switching parameters on the stoichiometry of the tantalum oxide switching layer. Devices were fabricated using reactive sputtering where oxygen partial pressure was varied during deposition of the switching layer. X-ray photoelectron spectroscopy was employed to evaluate the resulting tantalum oxide film composition, showing distinct Ta sub-oxides for each oxygen partial pressure implemented during reactive sputtering. Electrical characterization revealed optimal device performance, with sub-3 V forming voltage and memory window >10 for ReRAM devices deposited with 0.14 mTorr pO2. Devices fabricated at lower pO2 and excessively high pO2 failed to exhibit resistive switching behavior.

The demand for differentiated devices in the back-end-of-line increases necessitates the need for a test vehicle that enables the integration and electrical characterization of such devices. An Insulator-Metal Transition based NbO2 device was integrated onto the NY CREATES/UAlbany memory test vehicle (MTV) utilizing a 65nm process technology to fabricate nanoscale devices with a footprint down to 120x120 nm(2). NbO2, the metastable allotrope of niobium oxide, was deposited onto coupons diced out of the 300mm MTV. This occurred in an oxygen-controlled environment yielding phase-pure NbO2 after a 750 degrees C crystallization anneal. An endurance of at least 25x10(6) cycles was demonstrated with an R-off/R-on ratio above 100 and an extrapolation towards >2000 with further device scaling.

As new applications for non-volatile memory (NVM) continue to grow, scalable testing platforms are needed to evaluate new materials and devices. To address this a Memory Test Vehicle (MTV) platform was designed, fabricated and tested for large-scale testing and characterization of NVM technologies including resistive random-access memory (ReRAM). The template includes a variety of ReRAM-only cells, as well as 1-resistor 1-ReRAM (1R1R) cells with series resistor values ranging from 0-50 k Omega. Other features of the MTV include variable bottom electrode (BE) size from 30-220 nm, radio frequency (RF) test structures, and a 2 x 12 probe pad interface with 100-micron pitch. In this work the MTV was used to implement tantalum oxide ReRAM using a hybrid processing flow. The MTV was fabricated using the Albany NanoTech 300mm foundry to yield wafers with BE structures and probe pads. Diced wafer coupons were then transitioned to a 200mm wafer processing facility to implement ReRAM switching layers and top electrode. Electrical characterization of the resulting coupons demonstrates excellent device performance and suggests that MTV is an effective platform for testing non-volatile memory devices for the development of next-generation memory technologies that are compatible with standard CMOS processing.

Significant research has focused on low-power stochastic devices built from memristive materials. These devices foster neuromorphic approaches to computational efficiency enhancement in merged biomimetic and CMOS architectures due to their ability to phase transition from a dielectric to a metal at an increased temperature. Niobium dioxide has a volatile memristive phase change that occurs ∼800^∘C that makes it an ideal candidate for future neuromorphic electronics. A straightforward optical system has been developed on a horizontal tube furnace for in situ spectral measurements as an as-grown film is annealed and ultimately crystallizes as . The system measures the changing spectral transmissivity of as it undergoes both reduction and crystallization processes. We were also able to measure the transition from metallic-to-non-metallic during the cooldown phase, which is shown to occur about 100^∘C lower on a sapphire substrate than fused silica. After annealing, the material properties of the and were assessed via X-ray photoelectron spectroscopy, X-ray diffraction, and 4-point resistivity, confirming that we have made crystalline .

Neuromorphic and in-memory computing (IMC) enabled by Resistive Random Access Memory (ReRAM) holds the potential to dramatically improve the energy efficiency of computation. ReRAM-based IMC facilitates an efficient hardware solution for neural networks reliant on vector matrix multiplication (VMM) and associated applications. To demonstrate these capabilities, we utilized fully CMOS-integrated ReRAM arrays to perform IMC operations for a robotic line following navigation task. In this work, we developed a custom microcontroller-based interface for receiving sensor inputs, performing VMM operations on custom fabricated and packaged ReRAM arrays, and using VMM outputs to guide the robotic demonstrator. This work demonstrates a comprehensive analysis of the impact of ReRAM resistance stochasticity on navigational accuracy, the impact of microcontroller / board design on ReRAM performance, and how careful selection of ReRAM resistance states can mitigate operational errors.

The oxygen diffusion rate in hafnia (HfO2)-based resistive memory plays a pivotal role in enabling nonvolatile data retention. However, the information retention times obtained in HfO2 resistive memory devices are many times higher than the expected values obtained from oxygen diffusion measurements in HfO2 materials. In this study, we resolve this discrepancy by conducting oxygen isotope tracer diffusion measurements in amorphous hafnia (a-HfO2) thin films. Our results show that the oxygen tracer diffusion in amorphous HfO2 films is orders of magnitude lower than that of previous measurements on monoclinic hafnia (m-HfO2) pellets. Moreover, oxygen tracer diffusion is much lower in denser a-HfO2 films deposited by atomic layer deposition (ALD) than in less dense a-HfO2 films deposited by sputtering. The ALD films yield similar oxygen diffusion times as experimentally measured device retention times, reconciling this discrepancy between oxygen diffusion and retention time measurements. More broadly, our work shows how processing conditions can be used to control oxygen transport characteristics in amorphous materials without long-range crystal order. We quantified the oxygen tracer diffusion in amorphous hafnium oxide thin films. These tracer diffusion values are consistent with the experimentally measured retention times of hafnium oxide resistive memory devices.

Electronic switches based on the migration of high-density point defects, or memristors, are poised to revolutionize post-digital electronics. Despite significant research, key mechanisms for filament formation and oxygen transport remain unresolved, hindering our ability to predict and design device properties. For example, experiments have achieved 10 orders of magnitude longer retention times than predicted by current models. Here, using electrical measurements, scanning probe microscopy, and first-principles calculations on tantalum oxide memristors, we reveal that the formation and stability of conductive filaments crucially depend on the thermodynamic stability of the amorphous oxygen-rich and oxygen- poor compounds, which undergo composition phase separation. Including the previously neglected effects of this amorphous phase separation reconciles unexplained discrepancies in retention and enables predictive design of key performance indicators such as retention stability. This result emphasizes non-ideal thermodynamic interactions as key design criteria in post-digital devices with defect densities substantially exceeding those of today's covalent semiconductors.

Resistive Random-Access Memory (RRAM) presents a transformative technology for diverse computing and artificial intelligence applications. However, variability in the high resistance state (HRS) has proved to be a challenge, impeding its widespread adoption. This study focuses on optimizing TaOx-based RRAMs by strategically placing a nitrogen-doped TaOx barrier-layer (BL) to mitigate variability in the HRS. Through comprehensive electrical characterization and measurements, we uncover the critical influence of BL positioning on HRS variability and identify the optimal location of the BL to achieve a 2x lowering of HRS variability as well as an expanded range of operating voltages. Incremental reset pulse amplitude measurements show that the TaOx:N maintains a low HRS variability even at higher operating voltages when the position of the BL is optimized. Our findings offer insights into stable and reliable RRAM operation, highlighting the potential of the proposed BL to enhance the functionality of TaOx-based RRAMs and elevate overall device performance.

The electrical properties and performance characteristics of niobium dioxide (NbO_2)-based memristive devices are examined at cryogenic temperatures. Sub-stoichiometric Nb_2O_5 was deposited via magnetron sputtering and patterned in microscale (2×2 - 15×15 μm^2) cross-bar Au/Ru/NbO_x/Pt devices and electroformed at 3-5 V to make NbO_2 filaments. At cryogenic temperatures, the threshold voltage (V_th) increased by more than a factor of 3. The hold voltage (V_h) was significantly lower than the threshold voltage for fast voltage sweeps (200 ms per measurement). If the sample is allowed to cool between voltage measurements, the hold voltage increases, but never reaches the threshold voltage, indicating the presence of non-volatile Nb_2O_5 in the filament. The devices have an activation energy of E_a ≈ 1.4 eV, lower than other NbO_2 devices reported. Our works shows that even nominally “bad" memristive devices can be improved by reducing the leakage current and increases the sample resistance at cryogenic temperatures.

Niobium dioxide has a volatile memristive phase change that occurs ∼800 °C that makes it an ideal candidate for future neuromorphic electronics. A straightforward optical system has been developed on a horizontal tube furnace for in situ spectral measurements as an as-grown Nb2O5 film is annealed and ultimately crystallizes as NbO2. The system measures the changing spectral transmissivity of Nb2O5 as it undergoes both reduction and crystallization processes. We were also able to measure the transition from metallic-to-non-metallic NbO2 during the cooldown phase, which is shown to occur about 100 °C lower on a sapphire substrate than fused silica. After annealing, the material properties of the Nb2O5 and NbO2 were assessed via x-ray photoelectron spectroscopy, x-ray diffraction, and 4-point resistivity, confirming that we have made crystalline NbO2.

The electrical properties and performance characteristics of niobium dioxide (NbO2)-based memristive devices are examined at cryogenic temperatures. Sub-stoichiometric Nb2O5 was deposited via magnetron sputtering and patterned in microscale (2x2 - 15x15 mu m(2)) cross-bar Au/Ru/NbOx/Pt devices and electroformed at 3-5 V to make NbO2 filaments. At cryogenic temperatures, the threshold voltage (V-th) increased by more than a factor of 3. The hold voltage (Vh) was significantly lower than the threshold voltage for fast voltage sweeps (200 ms per measurement). If the sample is allowed to cool between voltage measurements, the hold voltage increases, but never reaches the threshold voltage, indicating the presence of non-volatile Nb2O5 in the filament. The devices have an activation energy of E-a approximate to 1.4 eV, lower than other NbO2 devices reported. Our works shows that even nominally ``bad" memristive devices can be improved by reducing the leakage current and increases the sample resistance at cryogenic temperatures.

Memristors, non-volatile switching memory platform, has recently attracted significant interest, offering unique potential to enable the realization of human brain-like neuromorphic computing efficiency. Memristors also demonstrate excellent temperature tolerance, long-term durability, and high tunability with nanosecond pulses, making them highly attractive for neuromorphic computing applications. To better understand the material processing, microstructure, and property relationship of switching mechanisms in memristor devices, computational methodologies, and tools are developed to predict the I-V characteristics of memristor devices based on tantalum oxide (TaOx) resistive random-access memory (ReRAM) integrated with an n-channel metal-oxide-semiconductor (NMOS) transistor. A multiphysics model based on coupled partial differential equations for electrical and thermal transport phenomena is solved for the high- and low-resistance states during the formation, growth, and destruction of a conducting filament through SET and RESET stages. These stages effectively represent the migration of oxygen vacancies within an oxide exchange layer. A series of parametric studies and energy minimization calculations are conducted to determine probable ranges for key material and model parameters accounting for the experimental data. The computational model successfully predicted the measured I-V curves across various gate voltages applied to the NMOS transistor in the one transistor one resistance (1T1R) configuration.

In this work, hafnium zirconium oxide (HZO)-based 100 × 100 nm2 ferroelectric tunnel junction (FTJ) devices were implemented on a 300 mm wafer platform, using a baseline 65 nm CMOS process technology. FTJs consisting of TiN/HZO/TiN were integrated in between metal 1 (M1) and via 1 (V1) layers. Cross-sectional transmission electron microscopy and energy dispersive x-ray spectroscopy analysis confirmed the targeted thickness and composition of the FTJ film stack, while grazing incidence, in-plane x-ray diffraction analysis demonstrated the presence of orthorhombic phase Pca21 responsible for ferroelectric polarization observed in HZO films. Current measurement, as a function of voltage for both up- and down-polarization states, yielded a tunneling electroresistance (TER) ratio of 2.28. The device TER ratio and endurance behavior were further optimized by insertion of thin Al2O3 tunnel barrier layer between the bottom electrode (TiN) and ferroelectric switching layer (HZO) by tuning the band offset between HZO and TiN, facilitating on-state tunneling conduction and creating an additional barrier layer in off-state current conduction path. Investigation of current transport mechanism showed that the current in these FTJ devices is dominated by direct tunneling at low electric field (E < 0.4 MV/cm) and by Fowler–Nordheim (F–N) tunneling at high electric field (E > 0.4 MV/cm). The modified FTJ device stack (TiN/Al2O3/HZO/TiN) demonstrated an enhanced TER ratio of ∼5 (2.2× improvement) and endurance up to 106 switching cycles. Write voltage and pulse width dependent trade-off characteristics between TER ratio and maximum endurance cycles (Nc) were established that enabled optimal balance of FTJ switching metrics. The FTJ memory cells also showed multi-level-cell characteristics, i.e., 2 bits/cell storage capability. Based on full 300 mm wafer statistics, a switching yield of >80% was achieved for fabricated FTJ devices demonstrating robustness of fabrication and programming approach used for FTJ performance optimization. The realization of CMOS-compatible nanoscale FTJ devices on 300 mm wafer platform demonstrates the promising potential of high-volume large-scale industrial implementation of FTJ devices for various nonvolatile memory applications.

Vector math operations are considered one of the basic operations for computationally intensive algorithms. The latest emerging resistive random access memory device (ReRAMI) and ReRAM crossbar arrays have shown convincing results for analog vector matrix multiplication with high energy efficiency and hence, are of great interest for computing applications because of their capability to perform array level in-memory computing in a single step. To perform fast and accurate vector math operations to a column of 1-transistor 1ReRAM (ITIR) devices in an array, a hardware interface that provides a precise control over programming the devices is needed. In this work, we demonstrate a microcontroller-based custom printed circuit board (PCB) design to perform device level testing and in-memory computation on packaged hafnium oxide based ITIR ReRAM arrays fabricated at SUNY Polytechnic Institute. Experimental results demonstrate that when ITIR ReR.AM array devices are programmed as logic states “0” high resistance state (HRS) and “1” low resistance state (LRS), the observed current ($I_{\text {sut}}$) shows the effect of read variability based on the number and position of the devices that are read. Overlapping of the current outputs can be reduced by using write-verify while programming the array of devices.

Tellurium-free antimony-based phase change memory (PCM) alloys have attracted much attention due to their superior attributes such as fast switching speed, wide resistance window, and low drift. However, programming reproducible intermediate states in such PCM materials has been challenging. In this study, bilayer PCM cells comprised of Ga–Sb films with two different compositions separated by a 1-nm-thick AlO x diffusion barrier layer were fabricated on Si foundry templates with a Ø120-nm TiN heater and TaN top contact. The current–voltage measurements of the cells exhibit two threshold voltages, separating three stable resistance regions. These cells can be controllably switched among three resistance states, that is, the SET ( $\sim 10^{3} \ \Omega)$ , intermediate ( $\sim 10^{4} \ \Omega)$ , and RESET states ( $\sim 5\times 10^{5}\,\,\ \Omega {)}$ . The phase transitions during switching among three resistance states are discussed and correlated with the device resistance profiles. The stability of the AlO x barrier layer is investigated with transmission electron microscopy (TEM) and energy-dispersive X-ray spectroscopy (EDS).

Deep Learning (DL) applications using Analog Neuromorphic Network (ANN) applications require linear, symmetric, and multilevel conductance modulation for high accuracy results. These requirements have led to the heavy use of GPUs for ANN applications. However, due to large power requirements for ANN, Non-Volatile Memory (NVM) devices such as Resistive Random Access Memory (ReRAM) are being investigated due to their lower power and lower area usage compared to conventional CMOS. In this work, using our 65nm CMOS integrated TaOx ReRAM devices, we explore the effects of parameter adjustment for voltage and current controlled device operation in constant pulse programming cases and operational differences with incremental pulse programming. We present a simple statistical model for symmetry and linearity and explore the effect of linearity mismatch on cycle-to-cycle variability, switching pulse variation, and finally the effect on Neural Network (NN) learning using a "Cross-Sim" simulator trained on the MNIST dataset for handwritten digit recognition.

Analog hardware-based training provides a promising solution to developing state-of-the-art power-hungry artificial intelligence models. Non-volatile memory hardware such as resistive random access memory (RRAM) has the potential to provide a low power alternative. The training accuracy of analog hardware depends on RRAM switching properties including the number of discrete conductance states and conductance variability. Furthermore, the overall power consumption of the system inversely correlates with the RRAM devices conductance. To study material dependence of these properties, TaOx and HfOx RRAM devices in one-transistor one-RRAM configuration (1T1R) were fabricated using a custom 65 nm CMOS fabrication process. Analog switching performance was studied with a range of initial forming compliance current (200–500 µA) and analog switching tests with ultra-short pulse width (300 ps) was carried out. We report that by utilizing low current during electroforming and high compliance current during analog switching, a large number of RRAM conductance states can be achieved while maintaining low conductance state. While both TaOx and HfOx could be switched to more than 20 distinct states, TaOx devices exhibited 10× lower conductance, which reduces total power consumption for array-level operations. Furthermore, we adopted an analog, fully in-memory training algorithm for system-level training accuracy benchmarking and showed that implementing TaOx 1T1R cells could yield an accuracy of up to 96.4% compared to 97% for the floating-point arithmetic baseline, while implementing HfOx devices would yield a maximum accuracy of 90.5%. Our experimental work and benchmarking approach paves the path for future materials engineering in analog-AI hardware for a low-power environment training.