Statistical analysis techniques Experiment Design (ED) and Response-Surface-Method (RSM) have traditionally been employed to conduct and analyse real-world experiments. ' ED and RSM provide a systematic and efficient framework for conducting a minimum number of experiments while gaining a maximum amount of information from the experimental results. Recently, ED and RSM have been applied to computer "experiments" involving integrated processing, device and circuit simulations. ^ These simulations typically require extensive amounts of CPU tiine and involve a huge number of input parameters. For processing technology and device design optimization, the goal is to determine a set of input parameters which produce the desired output device and circuit specifications. Rather than conduct an inefficient investigation involving a lengthy series of full computer simulations, ED is used to sparsely sample the input parameter space, and RSM is used to calculate the coefficients of approximatmg functions for the various output parameters over the entire range of the input parameter variations. These analytical functions are then used to find an optimal point where all of the design specifications are met. They are also used to produce statistical distributions of responses with respect to input parameter variations. In general, RSM utilizes a fitting function which is a first-, second-, or higher-order polynomial of the input parameters. The fitting accuracy may be improved by transformation of the inputs and/or outputs. We have developed a technique to determine possible improving transformations of the input parameters. The approach is based on an experimental design known as a Central-Composite-Faced (CCF) design. A CCF design for two input variables is shown in figure 1. Each circle in the figure represents an experiment where the input parameters are set to values within the range of interest: + 1 is highest, —1 is lowest. For each input parameter, a characteristic ratio is extracted from the experimental results. This characteristic ratio is used to select parameters in a transformation family (modified Box-Cox transformation, for example). In many cases, transformation of the inputs produces an approximating function which fits the experimental data much more closely than the classical RSM model. We employ a system which we have developed to automatically conduct computer simulation experiments. This system calculates the experiment design array, performs the series of coupled process and device simulations, extracts the output parameters from the simulation results, and analyzes the results. For each experiment, values of selected input variables are substituted into the input decks which are then submitted to the process and device simulators. Process simulations are performed for three cross-sections of an MOS transistor, and the results are combined together and used as input for the two-dimensional device simulator. An example of the approach is illustrated in figures 2-5. In this example, a blanket threshold-adjust implant dose, and the gate oxidation temperature are varied. These variations produce the several channel region doping profiles shown in figure 2. The fitting function which was found for the extracted threshold voltage is shown in figure 3. This fitting function shows a sub-linear response along the dose axis. 9 experimental points were used to calculate this fitting function. In order to evaluate the fitting accuracy, all of the experiments over an 8 X 8 grid of input parameter variations were conducted. The difference between the 64 extracted threshold voltage values and the fitting function is shown in figure 4. Transformations were automatically found for the two input variables, and a fitting function involving these transformed variables was found. The difference between the 64 extracted threshold voltage values and the transformed fitting function is shown in figure 5. The fitting accuracy (rms error) is improved by a factor of about 5 over the unrefined case. This drastic improvement of the fitting accuracy of this approach over the classical RSM technique will result in a major reduction in the overall optimization cycle time.
This paper discusses the optimisation of a high performance, low cost 0.13 μm CMOS technology with a view on its further scaling to the 100 nm technology node. The focus is mainly on gate oxide (thickness and nitridation method), deep junction implants and annealing. It is shown that in order to take the full benefit of gate oxide thinning, low energy boron implants and spike rapid thermal anneal are mandatory for pMOS devices. The same route gives also promising results for nMOS transistors when gate predoping is used to reduce gate depletion.
In this study the origin of the leakage current of n(+)p diodes and the impact of process conditions on the leakage current is investigated. The influence of isolation modules, namely, conventional local oxidation of silicon (LOCOS) vs. polybuffered LOGOS, and different junction annealing conditions, namely, furnace anneal and rapid thermal anneal, on the diode leakage current is discussed. The diode leakage current level distribution over a wafer is very sensitive to specific processing steps, such as active area definition. For large peripheral diodes in p-type substrate or in p-well, the leakage current strongly depends on junction annealing conditions. The diodes processed with furnace anneal have one order of magnitude lower leakage currents compared to the diodes with rapid thermal anneal. This difference in leakage current is due to different surface generation velocities at the silicon-oxide isolation interface. (C) 1999 The Electrochemical Society. S0013-4651(98)02-067-9. All rights reserved.
In this article we propose to use a combination of two optimization strategies, the Response Surface Model (RSM) method and the Levenberg-Marquardt (LM) method, for various optimization purposes in IC-technology. It is argued that both optimization techniques can be used complementary, combining the strenghts of both techniques while avoiding their weaknesses. As an illustration we apply this strategy to the calibration of a compact model for a lateral DMOST. We also show a CMOS TCAD example optimized with this strategy.
This paper presents the NORMAN/DEBORA TCAD system developed at IMEC to design and optimize sub-micron IC technology using process and device simulators. The versatility of the TCAD system will be shown for two important problems encountered in IC technology design and optimization.
In this paper, we discuss a system for performing process optimization, and its application to the optimization of a 0.5μm CMOS process. The approach includes an initial Target-Oriented experimental design strategy, elimination of ineffective parameters, a second set of experiments to determine a set of approximating models for each response, detection of appropriate transformations of input factors which improve the accuracy of the models, and optimization with respect to a set of constraints.
The accurate prediction of dopant ion implantation profiles both before and after thermal processing is becoming increasingly critical in the design of ultra-large scale integration (ULSI) sub-micron devices. In this paper, the ion implantation moments of boron, phosphorus and arsenic dopants implanted into thin film titanium, tungsten and cobalt suicides are calculated using Monte Carlo, Boltzmann transport equation and look-up table approaches. Four ion implantation simulators are evaluated: the TRansport of Ions in Matter (TRIM89) Monte Carlo code, RAMM and SUPREM-3 transport equation codes and PREDICT-1.4 which relies on look-up tables for its calculations. Theoretical results are subsequently compared with experimentally measured boron, phosphorus and arsenic range and straggle parameters in thermally reacted titanium silicide thin films obtained using secondary ion mass spectroscopy (SIMS) and Rutherford backscattering spectrometry (RBS). Ion implantation energies were varied from 20 keV to 160 keV. It is demonstrated that SUPREM-3 and PREDICT-1,4 ion implantation codes do not at the present time accurately calculate the ion implantation moments of dopants implanted into the suicides investigated. However the overall correlation between TRIM, RAMM and the experimental data presented is very good. The ion implantation models in TRIM and RAMM could be employed as preprocessors in a more general ULSI sub-micron process simulator capable of modelling a doped silicide fabrication technology.
This paper reports on a study of the Silicon-On-Insulator (SOI) structures obtained by oxygen ion implantation (SIMOX) and subsequent thermal annealing. With Transmission Electron Microscopy (TEM) a novel defect structure is revealed in the case of low temperature annealings. Electrical measurements of test devices are performed and a correlation with impurity decoration of defects is investigated.
Classical parameter-extraction programs rely on the minimisation of the relative current deviation. However, since, especially for analogue applications, the slope of the IDS/VDS curve in the saturation region is at least equally important, a new fit strategy has been developed. This new fit strategy extracts a parameter set which optimises the current residual as well as the slope residual at every point.
The scaling laws for MOS transistors are reviewed and the optimum performance predicted for both n-channel and p-channel devices are discussed. The physical and technological limitations for MOS VLSI are then described and some important technological challenges such as the implementation of new isolation techniques are pointed out. The mobility degragation effect due to velocity saturation is explained and illustrated by experimental data. The various limitations to the maximum operating voltage of scaleg devices are discussed. Finally, some considerations about speed and power consumption of scaled technologies are made.