Leakage currents in InAlN/GaN‐based high‐electron‐mobility transistors considered for normally‐off devices critically depend on the oxidation behavior of InAlN thin films. Herein, lattice‐matched InAlN thin films deposited on GaN (0001) are rapid thermally annealed at 800 °C in an oxygen‐rich environment. Aberration‐corrected scanning transmission electron microscopy combined with electron energy‐loss spectroscopy is used to systematically characterize the oxidation behavior of InAlN films as a function of annealing time. Initial growth of oxide layers is found to be reaction limited, which is replaced by a diffusion limited growth process once a critical thickness of the oxide layer is obtained. Growing oxide layers are amorphous and become porous with increasing annealing time.

Diamond has the most desirable thermal properties for applications in electronics. In principle, diamond is the best candidate for integration with other materials for thermal management due to its high thermal conductivity. Therefore, if low thermal boundary resistance can be developed between diamond and the semiconductor material, it would most effectively channel the heat away from areas of high power dissipation. Recent advancement of N-polar GaN in high power RF and conventional power electronics motivated us to study the diamond/Si3N4/GaN interface to understand how effectively the heat can be transferred from the GaN channel to diamond heat-sink. Prior studies showed that there are challenges in incorporating diamond with GaN while still maintaining the high crystalline quality necessary to observe the desirable thermal properties of the material. Therefore, in this study we investigated the influence of methane concentration (0.5–6%), gas pressure (40–90 Torr), sample surface temperature (600–850 °C), and growth duration (1~5 h) on polycrystalline diamond growth. The diamond/Si3N4/GaN interface looks abrupt with no signs of etching of the GaN for the samples with methane concentration above 2%, pressures up to 90 Torr, and temperatures < 850 °C, allowing for incorporation of diamond close to the active region of the device. This approach contrasts with most prior research, which require surface roughening and thick growth on the backside.

We report the first demonstration of Nitrogen polar (N-polar) GaN current aperture vertical electron transistor with a blocking electric field over 2.9 MV/cm. The devices were grown by metalorganic chemical vapor deposition on a c-plane sapphire substrate. The fabrication involved a maskless planar regrowth of a very thin-AlN layer above the current blocking layer, which induced a two-dimensional electron gas (2DEG) in the channel, and also prevented the out-diffusion of activated Mg ions into the GaN channel layer. The alloyed source and drain ohmic contacts on the regrown n(+)-GaN layer offered the low-contact resistance of 0.18 m Omega.cm(2) (0.22 Omega.mm). The device displayed a maximum drain current of 1.68 kA/cm(2) with a low RON, SP of 2.48 m Omega.cm(2). With just about 200 nm drift layer, a three-terminal breakdown voltage of 58 V was achieved. The output characteristics were free of dispersion under pulsed measurements with 80 mu s and 500 ns pulse widths. The N-polar current aperture vertical electron transistors show fundamentally significant advantages in favor of using Mg2+-implanted GaN as current blocking layers compared with Ga-polar counterparts.

We report upon the microwave plasma chemical vapor deposition (MPCVD) growth of polycrystalline diamond on varying crystallographic orientations of GaN (Ga-polar and N-polar), as well as on Si3N4-coated N-polar GaN, as applied to top-side heat spreading layers for III-N-based high electron mobility transistors. Integration of diamond with GaN in this configuration is subject to differing process constraints from previous research focusing on backside heat sinks. A critical requirement is to prevent hydrogen-related etching of the III-N surface in the H+ plasma ambient, as well as to avoid plasma damage to the GaN crystal or HEMT channel region near the surface. Thus we developed the seeding and MPCVD techniques under a low power density plasma with low sample temperatures during deposition. We systematically investigated samples seeded via polymer-assisted dip seeding in a nanoparticle suspension, which were then subjected to MPCVD growth under identical conditions. We evaluated the quality of the films via scanning electron microscopy and Raman spectroscopy to understand the relationship between grain size, interface abruptness, propensity for surface etching, as well as film uniformity. Finally, we were able to identify a process window for both N-polar GaN and Si3N4-coated N-polar GaN which yields thin, fully coalesced, nanocrystalline diamond films with an abrupt interface to the underlying substrate. These diamond films exhibit microscopic uniformity in crystal grain size, and macroscopic uniformity in thickness and interface abruptness via a process which is scalable to large wafer sizes.

This study presents a systematic characterization of AlInGaN films grown by metalorganic chemical vapor deposition as a function of thickness, V-III ratio, temperature, growth rate, and composition. The AlInGaN films grown in this study exhibited features of the spiral growth mode, whose characteristic hillock features may be described by the theory of crystal growth by Burton, Cabrera, and Frank (BCF theory). According to BCF theory, an increase in the driving force for the vapor-to-solid phase transition (moving further from equilibrium) result in a higher density of spiral growth hillocks with smaller radii of curvature. The spiral growth mode is first observed in the III-N material system for the growth of MBE-grown GaN and occurs under highly non-equilibrium growth conditions. Adjusting the vapor phase supersaturation via growth parameters, and therefore the driving force, have effects on the morphology consistent with BCF theory. It is found that, over a wide compositional range, very smooth AlInGaN films can be achieved with a morphology dominated by densely packed spiral growth hillocks. For very high AlN crystal fraction, high V/III ratio, or low temperature, the AlInGaN films exhibited a 2-D island nucleation growth mode.

We report on the first observation of avalanche electroluminescence resulting from band-to-band recombination (BTBR) of electron hole pairs at the breakdown limit of Gallium Nitride p-n diodes grown homo-epitaxially on single crystalline GaN substrates. The diodes demonstrated a near ideal breakdown electric field of 3 MV cm−1 with electroluminescence (EL) demonstrating sharp peaks of emission energies near and at the band gap of GaN. The high critical electric field, near the material limit of GaN, was achieved by generating a smooth curved mesa edge with low plasma damage, using etch engineering without any use of field termination. The superior material quality was critical for such a near-ideal performance. An electric field of 3 MV cm−1 recorded at the breakdown resulted in impact ionization, confirmed by a positive temperature dependence of the breakdown voltage. The spectral data provided evidence of BTBR of electron hole pairs that were generated by avalanche carrier multiplication in the depletion region.

The rapid development of RF power electronics requires amplifier operating at high frequency with high output power. GaN-based HEMTs as RF devices have made continuous progress in the last two decades showing great potential for working up to G band range. However, vertical structure is preferred to obtain higher output power. In this paper, we have designed and fabricated GaN static induction transistor using the self-aligned technology, which was accomplished mainly by using a SiO 2 lift-off step in buffered oxide etch (BOE). By optimizing the time in ultrasonic bath and in BOE, the SiO 2 and the metal on top were removed completely which resulted in the gate metal only on the sidewalls. Both dry and wet etch techniques were investigated to reduce the gate leakage on the etched surface. The low power dry etch combined with the tetramethylammonium hydroxide wet etch can effectively reduce the etch damages, decrease the gate leakage and enhance the gate control over the channel.

Gallium nitride (GaN) based transistors have been of interest to power electronics community because of their high breakdown voltage, high sheet carrier density, and the high saturation velocity of GaN. The low switching losses of GaN enable high-frequency operation which reduces bulky passive components with negligible change in efficiency [1,2]. The most established GaN electronic devices are fabricated on the Ga-polar orientation of GaN. Recently, N-polar GaN based devices are being explored for high frequency applications due to their advantages over Ga-face, such as lower contact resistance since the 2DEG is contacted through a lower bandgap material and better electron confinement due to natural back-barrier provided by the charge inducing barrier [3]. In this work, the first N-polar GaN current aperture vertical electron transistor is presented. The samples were grown by metal-organic chemical vapor deposition on c-plane Sapphire substrate. Mg ions were implanted at 80keV (dose: 1×〖10〗^15 〖cm〗^(-2)) into the top GaN layer, everywhere except the current aperture to form the current blocking layer. A 7 A^0 AlN to reduce alloy scattering followed by 150nm UID N-polar GaN as channel were regrown on top of the implanted structure. The 2DEG density and the mobility of the as-grown sample, determined using Hall measurement, were 1.1×〖10〗^13 〖cm〗^(-2) and 1800 〖cm〗^2/(V-S) , respectively. The CAVET showed excellent device modulation and a maximum current of 2 KA〖cm〗^(-2) at V_G=2V. The maximum transconductance per mm of source was 140 mS. The device had a very large pinch-off voltage of -14V as calculated due to the presence of high charge density in the channel. [1] S. Chowdhury et al 2013 Semicond. Sci. Technol. 28 074014 [2] J. Millán, et al 2014 IEEE Transactions on Power Electronics, 29, 2155 [3] Uttam Singisettiet al 2013 IOP Semicond. Sci. Technol. 28 074006

In this work, a study of two different types of current aperture vertical electron transistor (CAVET) with ion-implanted blocking layer are presented. The device fabrication and performance limitation of a CAVET with a dielectric gate is discussed, and the breakdown limiting structure is evaluated using on-wafer test structures. The gate dielectric limited the device breakdown to 50V, while the blocking layer was able to withstand over 400V. To improve the device performance, an alternative CAVET structure with a p-GaN gate instead of dielectric is designed and realized. The p-GaN gated CAVET structure increased the breakdown voltage to over 400V. Measurement of test structures on the wafer showed the breakdown was limited by the blocking layer instead of the gate p-n junction.

A normally OFF trench current aperture vertical electron transistor (CAVET) was designed and successfully fabricated with Mg-doped p-GaN current blocking layers. The buried Mg-doped GaN was activated using a postregrowth annealing process. The source-to-drain body diode showed an excellent p-n junction characteristics, blocking over 1 kV, sustaining a maximum blocking electric field of 3.8 MV/cm. Three-terminal breakdown voltages of trench-CAVETs, measured up to 225 V, were limited by dielectric breakdown. This paper highlights the achievement of the well-behaved buried p-n junction that has been a formidable challenge in the success of vertical GaN devices.

In this letter, a GaN-based current aperture vertical electron transistor (CAVET) with a p-type gate layer and an implantation-based current blocking structure is presented. The devices measured showed a breakdown voltage of 450 V and no dispersion. The factors limiting higher breakdown voltages in these devices were carefully studied and discussed. The devices were grown on sapphire and relied on a box-shaped Mg implanted current blocking scheme. This is the first demonstration of an implantation-based CAVET, grown on sapphire blocking of 450 V with respectable on-state characteristics.

Coherent InxAl1−xN (x=0.15 to x=0.28) films were grown by metalorganic chemical vapor deposition on GaN templates to investigate if the films obey Vegard’s Law by comparing the film stress-thickness product from wafer curvature before and after InxAl1−xN deposition. The In composition and film thickness were verified using atom probe tomography and high resolution X-ray diffraction, respectively. Ex-situ curvature measurements were performed to analyze the curvature before and after the InxAl1−xN deposition. At ∼In0.18Al0.82N, no change in curvature was observed following InAlN deposition; confirming that films of this composition are latticed matched to GaN, obeying Vegard’s law. The relaxed a0- and c0- lattice parameters of InxAl1−xN were experimentally determined and in agreement with lattice parameters predicted by Vegard’s law.

GaN lateral transistors (HEMTs) continue to penetrate the power electronics market demonstrating excellent performance in the medium power applications. However, for power applications 10kW and higher, vertical GaN devices are preferred over lateral one, since the former offers higher current and power densities. To date, several different vertical transistor structures have been proposed and reported, such as in-situ oxide based vertical trench MOSFET with an undoped GaN interlayer as a channel (OGFET) [1, 2], current aperture vertical electron transistors (CAVETs) [3, 4], junction field effect transistors (JFETs) [5, 6] and MOSFETs [7, 8]. Gupta et al. have demonstrated the high performance OGFET with low specific on-state resistance (Ron, sp) recently [1]. This study presents the large device scaling of the OGFET to realize high output current.

A polarization-induced three-dimensional hole gas (3DHG) was demonstrated in undoped and compositionally graded InxGa1−xN layers. All samples were grown on Ga-face bulk GaN substrates by metal organic chemical vapor deposition. A high hole concentration of 2.8 × 1018 cm−3 was obtained in a 100-nm-thick InxGa1−xN layer where the indium composition was graded from x = 0 to x = 0.2. 3DHG density control by varying the indium composition and thickness of a compositionally graded InxGa1−xN layer was also demonstrated.

Parasitic pre-reactions are known to play a role in the growth of aluminum nitride (AlN) via metal organic chemical vapor deposition, where they can deplete precursor molecules before reaching the substrate, leading to poor growth efficiency. Studies have shown that reducing the growth pressure and growth temperature results in improved growth efficiency of AlN; however, superior crystal quality and reduced impurity incorporation are generally best obtained when growing at high temperatures. This study shows that, with proper alkyl source dilution, parasitic pre-reactions can be suppressed while maintaining high growth temperatures. The results show an 18x increase in growth rate and efficiency of AlN films: from 0.04 mu m h(-1) to 0.73 mu m h(-1), and 26 mu m mol(-1) to 502 mu m mol(-1), respectively; under constant TMAl flow and a small change in total gas flow. This results in 6.8% of Al atoms from the injected TMAl being utilized for AlN layer growth for this reactor configuration. This is better than the standard GaN growth, where 6.0% of the Ga atoms injected from TMGa are utilized for GaN growth.

III-N materials, especially ternary and quaternary alloys, are profoundly affected by barrier height inhomogeneity as evidenced by great variability in reported barrier height and Richardson constant values for Schottky diode samples involving epilayers with identical material composition. Research into AlInGaN-based devices is gaining traction due to its usefulness for strain engineering, polarization engineering, and vertical device design. Thus it is important to characterize the Schottky barrier height between AlInGaN and technologically relevant metals like nickel. It is proposed that alloy composition fluctuations inherent to low-temperature III-N alloys result in a Schottky barrier height inhomogeneity, and that the Schottky barrier height follows a Gaussian distribution. Current vs voltage data as a function of temperature was measured for three AlInGaN samples of varying composition. Utilizing a model tailored to thermionic emission over a Gaussian distribution of barriers, both the average barrier height and the standard deviation in the distribution were extracted from experimental data via multiple linear regression. Average barrier height was found to correlate with the AlInGaN band gap, while the standard deviation in barrier height increased with aluminum and indium concentration on the group-III sublattice.

This letter reports the influence of the added InGaN interlayer on reducing the inherent interfacial barrier and hence improving the electrical characteristics of wafer-bonded current aperture vertical electron transistors consisting of an InGaAs channel and N-polar GaN drain. The current-voltage characteristics of the transistors show that the implementation of N-polar InGaN interlayer effectively reduces the barrier to electron transport across the wafer-bonded interface most likely due to its polarization induced downward band bending, which increases the electron tunneling probability. Fully functional wafer-bonded transistors with nearly 600 mA/mm of drain current at VGS = 0 V and Lgo = 2 μm have been achieved, and thus demonstrate the feasibility of using wafer-bonded heterostructures for applications that require active carrier transport through both materials.

Transistor operation by common emitter (CE) current modulation is shown for the first time in III-N hot electron transistors (HETs). The emitter and collector barriers (φ BE and φ BC ) are implemented using Al 0.45 Ga 0.55 N and In 0.1 Ga 0.9 N layers as polarization dipoles, respectively. CE modulation is achieved by increasing the E-B barrier height beyond the B-C barrier height by increasing the Al 0.45 Ga 0.55 N thickness (t). Similar CE performance is seen in the identical HET structures grown on both bulk GaN and sapphire. A maximum α of ~0.3 is achieved using a GaN base thickness of 10 nm. The InGaN dipole used as the collector barrier is shown to be instrumental in enabling ohmic base contacts, low base sheet resistance, and low collector leakage, simultaneously.