In this article, we present gold-free AlGaN/GaN high electron mobility transistors (HEMTs) fabricated on SiC substrates using an Al-Si alloy gate fabrication process. The proposed devices incorporate a two-step deposited (TSD) Ti/Al/Ti/TiN metal stack with high-dose ion-implanted ohmic regions and implement an ohmic trench etching technique. This design achieves an ultralow ohmic contact resistance (R-C) of 0.18 Omega center dot mm and a highly uniform surface morphology with a root-mean-squared (rms) roughness of 2.33 nm. In addition, the gate electrode employs a Ti/AlSi metal stack that is fully compatible with Si-based CMOS technology. Owing to the superior ohmic contact properties, the fabricated HEMTs exhibit a peak transconductance (g(m)) of 302.2mS/mm and a saturation drain current (I-D,I- max) of 1.26 A/mm. Small-signal radio frequency (RF) measurements yield a cutoff frequency (f(T)) of 23.9 GHz and a maximum oscillation frequency (f(max)) of 38.9 GHz. Furthermore, the TSD HEMT demonstrates an output power density (P-sat) of 3.9 W/mm and a peak power-added efficiency (PAE) of 63.1% at 3.6GHz. These findings highlight the potential of this approach in advancing high-performance and low-cost Au-free GaN HEMTs for sub-6 GHz RF applications.

Two-dimensional (2D) semiconductor devices hold great promise in specialized operating regimes including radio-frequency, high-temperature, and cryogenic conditionsu2014yet their potential for power handling has received little emphasis, so far. Here we report a molybdenum disulphide (MoS2) device design that strategically selects the channel width (W) and length (L) to distribute current density and mitigate self-heating, enabling operation at a source-drain bias Vds of 10 V and a drain current Ids of 0.1 A, while maintaining an on/off ratio of 105. This corresponds to sustained dissipation P = IdsVds ~ 1 W, and highlights a pathway for Watt-level switching in van der Waals electronics. We demonstrate a sensor circuit that uses our Watt-level MoS2 transistors to function as a step-down converter and a switching device. Further, a proof-of-concept on flexible substrates is presented. Our findings mark a step change in 2D power electronics, paving the way for higher-voltage devices compatible with flexible substrates and, ultimately, wearable and conformal power systems.

In this article, the differences in performance of two GaN high electron mobility transistor (GaN HEMT) with different structures have been compared. The AlGaN/GaN/Graded-AlGaN:Si-doped/GaN Double-Channel HEMT (Sample A) proposed, achieved an Output Third-Order Intercept Point (OIP3) of 39.6 dBm and a output current density of 1925.2 mA/mm. Despite Sample A achieved a higher output current, the Si doping introduces larger leakage current, leading to the deterioration of breakdown characteristics and making it unable to operate stably for high power conditions (achieving the power output density of 0.75 W/mm). In order to achieve both high power and high linearity, the Composite Graded-AlGaN/Graded-InGaN/GaN HEMT (Sample B) was presented. The OIP3 of 40.9 dBm and a high Output Power Density (Pout) of 4.48 W/mm are achieved by the Sample B. These results highlight the potential of sample B for high-linearity and high-power applications.

The deployment of deep learning for radio frequency (RF) signal processing at the edge necessitates highly efficient hardware accelerators. This paper presents a hardware-algorithm co-design framework for Automatic Modulation Classification (AMC) based on a GaN 1HEMT1R analog crossbar array. We first experimentally characterize the 1HEMT1R synaptic cells, establishing a realistic hardware model that captures both the 4-bit discrete conductance quantization and the intrinsic Random Telegraph Noise (RTN). A multi-layer perceptron (MLP) is then mapped onto the differential memristive array to classify BPSK, QPSK, and 16-QAM signals under varying signal-to-noise ratios (SNRs). Specifically, we investigate the classification degradation caused by subset overlapping between QPSK and 16-QAM within the constrained hardware weight space. By introducing L2 regularization and weight clipping during the software training phase, the hardware-mapped network exhibits significant robustness against RTN, recovering the classification accuracy to 88.87% at 20 dB SNR. The results validate the feasibility of deploying compact, non-volatile GaN neuromorphic arrays for real-time, low-power wireless computing.

Effective thermal management is the primary bottleneck restricting the performance of high-power Gallium Nitride (GaN)-based electronic devices. While diamond is the ultimate heat sink material, integrating it with GaN via room-temperature bonding is severely hindered by the exorbitant cost of fine-polishing diamond and the interface damage induced by the conventional ion beam planarization. In this paper, we propose an in-situ Surface-Reconstruction (SRC) technique integrated with Surface-Activated Bonding (SAB) to achieve high-quality GaN-on-Diamond structures. By employing alternating cycles of amorphous silicon (alpha-Si) deposition and oblique Ar ion bombardment, the diamond surface asperities were effectively smoothed via a "valley-filling" mechanism, reducing the Root-Mean-Square (RMS) roughness to below 0.5 nm without inducing surface graphitization. Consequently, a macroscopically void-free bonding interface was achieved using an ultra-thin (similar to 8 nm) Si interlayer with a record-low Thermal Boundary Resistance (TBR) of 7.7 +/- 0.6 m(2)K/GW. This work provides a cost-effective, non-destructive, and scalable pathway for fabricating high-performance GaN-on-Diamond devices.

In this paper, we design two types of compact coupled dual-gate (CCDG) PA-switch GaN HEMTs. Both structures are based on a stacked HEMT configuration. One is a multi-stage compact coupled dual-gate device, which integrates a switching function into the coupled stacked HEMT structure, primarily enhancing the small-signal characteristics of the conventional dual-gate power amplifier (DGPA). The maximum oscillation frequency (fmax) reaches 40.1 GHz, and the maximum available gain/maximum stable gain (MAG/MSG) is improved by 2.3 dB at 8 GHz compared to a single-stage DGPA. The other structure combines the dual-gate device with a series-shunt compact HEMT (SSC-HEMT), significantly improving the isolation (ISO) of the conventional DGPA. The electrical characteristics of both devices are simulated and compared using Silvaco TCAD. This demonstrates that the compact coupled dual-gate GaN HEMT enhances device performance with minimal area overhead, showing great promise for future wireless communication applications.

In this article, we introduce a new analytical model for determining the threshold voltage ( V- TH ) in charge-trap-based hybrid gate-stack enhancement-mode (E-mode) AlGaN/GaN MIS-high electron mobility transistors (HEMTs). The V( TH )expression is derived by simultaneously solving the potential balance and interfacial Gauss equations based on band and charge distribution analyses, with the stored charge in the charge-trapping layer (CTL) evaluated considering both Wentzel-Kramers-Brillouin (WKB)-based tunneling and thermally activated emission probabilities. The model examines how V- TH depends on structural parameters across three CTL thickness regimes: thin, where CTL thickness has minimal effect, but the blocking layer thickness dominates; intermediate, where both CTL thickness and trapped charge influence V- TH; and thick, where trapped charge is negligible and V- TH decreases linearly with increasing CTL thickness. The model's accuracy was validated by TCAD simulation, and the dependence of V- TH on various initialization voltages and temperature was analyzed. The results offer valuable guidance for optimizing the structure and designing charge-trap-based hybrid gate-stack E-mode GaN MIS-HEMTs.

Abstract Gallium nitride (GaN)-on-GaN high-electron-mobility transistors (HEMTs) are acting as candidates with potential for high-frequency and high-power RF electronics in future due to their superior material quality and extremely low dislocation density. Despite these advantages, their application is limited by several challenges, including leakage current at the epilayer/substrate interface, difficulties in achieving low ohmic contact resistance, and thermal degradation arising from high power density operation. This review summarizes recent progress in understanding and mitigating these issues through interface engineering, optimized buffer and substrate doping, advanced ohmic contact techniques, and improved thermal management strategies. Developments in radiation hardness design and innovative device structures such as MIS-HEMTs and Fin-HEMTs structures further highlight the technological potential of the GaN-on-GaN platform. In the future, continued advances in epitaxy, high-field reliability, thermal engineering and packaging will be critical to fully release capabilities of GaN-on-GaN devices in the high-frequency and high-power application environment. It also outlines key research directions, including the need for integrated electrothermal co-design and mature packaging solutions tailored to the complex operating conditions that are possible in future GaN-on-GaN RF systems.

In this article, a fully vertical beta -Ga2O3 heterojunction barrier Schottky (HJBS) diode utilizing a sputtered p-gallium nitride (GaN) layer is reported. The device exhibits a high destructive breakdown voltage (BV) of 4335V, a turn-on voltage ( V-on) of 0.8V, and a specific on-resistance ( R-on,R-sp) of 6.79m Omega & sdot; cm(2), resulting in an outstanding Baliga's figure of merit (BFOM) of 2.77GW/cm(2). This high performance is primarily attributed to the effective electric-field modulation introduced by the p-GaN layer beneath the anode, which suppresses peak electric-field crowding and significantly delays the onset of breakdown. To further validate the material quality and structural integrity of the sputtered p-GaN layer, comprehensive characterization using scanning transmission electron microscopy (STEM), X-ray diffraction (XRD), and transmission electron microscopy (TEM) was conducted, demonstrating a dense morphology and well-oriented crystalline structure. These results confirm that sputtering is a viable and promising approach for integrating p-GaN, which is particularly important in the absence of effective p-type doping technology in beta -Ga2O3 . Furthermore, temperature-dependent-current-voltage ( I - V - T) measurements were carried out to investigate the reverse leakage transport mechanisms. It was found that in the low reverse voltage range (-1to -20V), the Poole-Frenkel (PF) emission dominates, with a trap barrier height ( q phi(t)) of 0.74eV. With increasing reverse bias (-20to -200V), the dominant transport mechanism transitions to 3-D Mott variable-range hopping (3-D Mott-VRH).

Integrating diamond with GaN provides an effective pathway to mitigate self-heating. However, the thermal boundary resistance (TBR) remains a persistent bottleneck for further heat dissipation. While carbon (C) diffusion into the SiNx interlayer is known to reduce TBR, the associated stress evolution and its impact on device performance remain underexplored. In this work, the synergistic regulation of heat transport and electrical performance induced by C diffusion was systematically investigated. Transmission electron microscopy (TEM) was employed to characterize the interfacial microstructure and the influence of C diffusion on the interface. To further assess the resulting impact on heat dissipation, transient thermoreflectance was utilized to precisely quantify the thermal transport within the heterostructures. Classical molecular dynamics (MD) simulations were then performed to analyze the underlying physical mechanisms, revealing that intensifying C diffusion increases the phonon density of states overlap and effectively reduces the TBR. Furthermore, the intrinsic stress was quantified through geometric phase analysis (GPA) based on TEM images, demonstrating that the stress induced during the diffusion process propagates to the AlGaN/GaN heterostructure. Crucially, this stress modulation enhances the piezoelectric polarization by approximately 32%, resulting in a 5% increase in the two-dimensional electron gas (2DEG) sheet density. These findings provide a comprehensive strategy for optimizing the thermal management and mechanical reliability of high-power GaN devices.

This study systematically reveals an intrinsic ternary trade-off among field-effect mobility (μFE), photoresponse, and negative bias stress (NBS) stability in amorphous indium zinc oxide (IZO) thin-film transistors (TFTs). Precise control over oxygen vacancy (VO) concentration and amorphous microstructures is achieved through two independent modulation strategies involving N2 doping and sputtering target composition adjustment. Comprehensive electrical characterizations demonstrate that VO acts as a primary controlling factor within the structurally stable amorphous network, while the overall relationships is additionally bounded by defect-state redistribution and network disorder. While an optimal VO concentration significantly promotes μFE and photoresponse through enhanced carrier density and efficient photogeneration, NBS stability is simultaneously compromised by intensified defect-assisted charge trapping and carrier ionization. This trade-off persists regardless of whether the modulation induces monotonic or nonmonotonic behaviors. These findings provide critical physical insights and design guidelines for tailoring oxide TFTs to diverse application-specific requirements.

This paper presents, for the first time, the structure-dependent parameter trade-off optimization on figure-of-merit (RonCoff) and power compression of AlGaN/GaN high electron mobility transistors (HEMTs) for radio frequency (RF) switch applications. For GaN HEMTs operating in switching mode, it was demonstrated that RonCoff can be effectively reduced by increasing the gate foot length (Lg_foot), decreasing the gate cap length (Lg_cap), reducing the gate bias resistance (rg), and adopting a high work function metal for the gate electrode (Φg). However, these parameter adjustments affect power compression and RonCoff in opposing manners. This paper also presents supplementary research on the effects of source-drain spacing (Lds) and gate width (Wg) on switching performance. This research achieves a dynamic balancing method for structural parameters, delivering application-specific design rules for different scenarios ranging from high-frequency to high-power applications.

In this paper, we demonstrate the excellent performance of InAlN/GaN high electron mobility transistors (HEMTs) for high-voltage radio frequency (RF) application. By using a composite cap layer structure of GaN cap layer and polycrystalline (PC)-AlN cap layer, the gate leakage is effectively suppressed, resulting in a 0.5-µm InAlN/GaN HEMTs achieving a high current on/off ratio (ON/OFF) of 7 × 107 as well as a record breakdown voltage (BV) of 270 V. The device yields a high peak transconductance (Gm) of 350 mS/mm and a low sub-threshold swing (SS) of 80 mV/decade while virtually free of drain induced barrier lowering (DIBL) effect (about 2.5 mV/V). Besides, the InAlN/GaN HEMTs with composite cap layer structure exhibit a current gain cut-off frequency/ maximum oscillation frequency (fT/fmax) of 22/64 GHz. To the best of our knowledge, the device has the highest figure-of-merit (FoM = fmax × BV × Lg) of 8.6 THz·V·µm compared to the InAlN/GaN HEMTs reported in the past. These results demonstrate that the design of the composite cap layer structure extends the RF InAlN/GaN HEMTs for high voltage applications.

The development of gallium nitride (GaN) devices toward higher power density and frequency has been seriously limited by self-heating effects, which significantly impact device performance. Although the integration with diamond provides a promising solution for GaN thermal management, the thermal boundary resistance (TBR) at the diamond/GaN interface remains the main factor limiting high-power-density operation. In this work, a molecular dynamics-modified diffuse mismatch model is established to analyze the thermal transport across the diamond/GaN interfaces with the impact of inner carbon diffusion. The deviation between the simulation results and the experiments is within 10%. This model effectively overcomes the challenges associated with mismatched mixed interatomic potentials in multi-material heterostructures. It enables the quantitative decomposition of complex interlayer structures to isolate specific thermal contributions. Crucially, the study reveals a compensation mechanism of TBR, where diffusion-enhanced transport mitigates thickness-induced penalties. This finding defines a high-stability process window, providing vital guidance for optimizing heat dissipation in diamond/GaN hetero-integration.

Based on the 0.25 μm gallium nitride (GaN) high electron mobility transistor (HEMT) process, a single-pole-single-throw (SPST) radio frequency (RF) switch operating in the 2 to 18 GHz frequency band was designed. This monolithic microwave integrated circuit (MMIC) process is implemented on 6-inch silicon carbide (SiC) wafers. By employing n+-type indium gallium nitride (InGaN) regrowth technology in the source and drain regions of the device, the ohmic contact resistance was effectively reduced. Furthermore, the compact coupling of the active region improves the isolation of the switch at high frequencies. Measurement results demonstrate that within the 2 to 18 GHz spectrum, the designed SPST switch exhibits an insertion loss (IL) of less than 1.1 dB and an isolation (ISO) greater than 42.5 dB. At 8 GHz, the input 1 dB compression point (P1dB) is greater than 33 dBm, and the output third-order intercept point (OIP3) reaches 48.3 dBm. The designed SPST switch demonstrates excellent isolation and linearity within its operating frequency band, showcasing the advantages of the 6-inch GaN-on-SiC process for RF module applications.

In this work, we present the first investigation into the impact mechanism of Fe doping tails on the radio frequency (RF) switching performance of AlGaN/gallium nitride (GaN) high electron mobility transistors (HEMTs). It is illustrated that a thicker unintentionally doped (UID) GaN layer combined with a thinner Fe-doped buffer layer significantly reduces Fe concentration in the near-channel region of the UID GaN layer. HEMTs with weaker Fe doping tails exhibit superior RF switching performance. This phenomenon occurs as the Fe tailing effect during high-power RF switch operation aggravates the dynamic resistance degradation of the series HEMT and modifies the channel potential distribution, which in turn induces a large vertical component capacitance in the shunt HEMT. Fabricated switch devices with 500 nm gate length on the optimized epitaxial structure demonstrated outstanding performance: P-max = 32 dBm at 3.6 GHz under -10 V gate bias, and P-max > 38 dBm with OIP3 = 56 dBm at -20 V gate bias. These experimental results demonstrate that controlled Fe tail effect engineering enables HEMTs to achieve both high-power handling and high linearity simultaneously, demonstrating a viable approach for developing high-performance RF switches compatible with Fe-doped buffer power amplifiers.

This letter presents high-performance millimeter-wave InGaN channel double-heterostructure high-electron-mobility transistors (DH-HEMTs) fabricated using a recess gate oxidation process. The device with a 2 mu m source-drain distance achieves a remarkable breakdown voltage of 76 V. When subjected to off-state high field bias conditions (-8 V, 30 V), the device exhibits a low saturation current collapse ratio of 8.1%. In 30 GHz large-signal power measurements, the device achieves a high saturation power density of 9.6 W/mm at V-DS=28 V and a high power-added efficiency (PAE) of 48.54% at V-DS=14 V. High-temperature stability test of the InGaN channel DH-HEMTs was also evaluated. These results substantiate the significant potential of InGaN channel DH-HEMTs for millimeter-wave applications.