Silicene is one of the most promising 2D materials for the realization of next-generation electronic devices, owing to its high carrier mobility and bandgap tunability through the imposition of an external electric field. To exploit this fundamental characteristic, it is necessary to engineer an insulating layer that can be interfaced directly to silicene without perturbing its bidimensional nature. At the same time, this insulating layer should exhibit low leakage currents even when highly scaled, to fully exploit the advantages of using a 2D material at the core of the device. CaF$_2$ is known to form a quasi van der Waals interface with 2D materials, as well as to maintain its insulating properties even at ultrathin scales. Here we investigate the growth of CaF$_2$ layers on silicene by molecular beam epitaxy: diffraction images show that CaF$_2$ grows epitaxially on silicene/Ag(111), with its domains fully aligned to the 2D silicon lattice. In-situ XPS analysis evidences that no changes in the chemical state of the silicon atoms can be detected upon CaF$_2$ deposition, excluding the formation of covalent bonds between Ca, F and Si. Polarized Raman analysis shows that silicene undergoes a structural change upon interaction with CaF$_2$, however retaining a bidimensional character and without transitioning to a sp3-hybridized, bulk-like silicon.

Many of graphene's remarkable properties arise from its linear dispersion of the electronic states, forming a Dirac cone at the K points of the Brillouin zone. Silicene, the 2D allotrope of silicon, is also predicted to show a similar electronic band structure, with the addition of a tunable bandgap, induced by spin-orbit coupling. Because of these outstanding electronic properties, silicene is considered as a promising building block for next-generation electronic devices. Recently, it has been shown that silicene grown on Au(111) still possesses a Dirac cone, despite the interaction with the substrate. Here, to fully characterize the structure of this 2D material, we investigate the vibrational spectrum of a monolayer silicene grown on Au(111) by polarized Raman spectroscopy. To enable a detailed ex situ investigation, we passivated the silicene on Au(111) by encapsulating it under few layers hBN or graphene flakes. The observed spectrum is characterized by vibrational modes that are strongly red-shifted with respect to the ones expected for freestanding silicene. By comparing low-energy electron diffraction (LEED) patterns and Raman results with first-principles calculations, we show that the vibrational modes indicate a highly (>7%) biaxially strained silicene phase.

The allotropic affinity for bulk silicon and unique electronic and optical properties make silicene a promising candidate for future high-performance devices compatible with mature complementary metal–oxide–semiconductor technology. However, silicene’s outstanding properties are not preserved on its most prominent growth templates, due to strong substrate interactions and hybridization effects. In this letter, we report the optical properties of silicene epitaxially grown on Au(111). A novel in situ passivation methodology with few-layer hexagonal boron nitride enables detailed ex situ characterization at ambient conditions via μ-Raman spectroscopy and reflectance measurements. The optical properties of silicene on Au(111) appeared to be in accordance with the characteristics predicted theoretically for freestanding silicene, allowing the conclusion that its prominent electronic properties are preserved. The absorption features are, however, modified by many-body effects induced by the Au substrate due to an increased screening of electron–hole interactions.

The stabilization of silicene at ambient conditions is essential for its characterization, future processing, and device integration. Here, we demonstrate in situ encapsulation of silicene on Ag(111) by exfoliated few-layer graphene (FLG) flakes, allowing subsequent Raman analysis under ambient conditions. Raman spectroscopy measurements proved that FLG capping serves as an effective passivation, preventing degradation of silicene for up to 48 h. The acquired data are consistent with former in situ Raman measurements, showing two characteristic peaks, located at 216 and 515 cm-1. Polarization-dependent measurements allowed to identify the two modes as A and E, demonstrating that the symmetry properties of silicene are unaltered by the capping process.

The resistance of ultrathin metal films (Ag, Au, Cr, Ir, Pt, and Ti) on hydrofluoric acid-treated Si(111) surfaces is investigated during room temperature evaporation at very low deposition rates (0.003–0.006 nm/s). High-resolution in situ measurements are performed using the four-point probe technique. The authors find that, in addition to the type of metal, the resistance versus metal thickness characteristics heavily depend on the doping of the Si substrate. Furthermore, for most metals on p-type Si, the resistance initially increases as a function of deposition time. The authors explain this by a conductive path at the surface due to H-terminated Si bonds which are destroyed during deposition.

The advent of microcomputers in the 1970s has dramatically changed our society. Since then, microprocessors have been made almost exclusively from silicon, but the ever-increasing demand for higher integration density and speed, lower power consumption and better integrability with everyday goods has prompted the search for alternatives. Germanium and III-V compound semiconductors are being considered promising candidates for future high-performance processor generations and chips based on thin-film plastic technology or carbon nanotubes could allow for embedding electronic intelligence into arbitrary objects for the Internet-of-Things. Here, we present a 1-bit implementation of a microprocessor using a two-dimensional semiconductor-molybdenum disulfide. The device can execute user-defined programs stored in an external memory, perform logical operations and communicate with its periphery. Our 1-bit design is readily scalable to multi-bit data. The device consists of 115 transistors and constitutes the most complex circuitry so far made from a two-dimensional material.

The integration of electrical and optical components on a single chip, favourable silicon, is a major goal in research. Thereby, a bottleneck is the integration of active and passive optical elements. Graphene, with its electrically tuneable absorption and ultrafast photoresponse, is a promising candidate to move a step closer towards high-speed on-chip integration. We fabricated a dual-gate tuneable pn-junction graphene phototdetector to investigate the relevant conversion mechanisms. The photodector is integrated on a silicon slot waveguide, which has twofold function. First, the two silicon strips of the slot waveguide are utilized as dual gate electrodes to create an electrically controllable pn-junction in the graphene. Second, the slot waveguide design allows confinement of light in subwavelength dimension. The confined light is directly absorbed in the slot between the n- and p-doped regions. At zero bias the conversion is dominated by the photo-thermoelectric effect, where we achieved a responsivity of 35 mA/W. While by applying a low bias of 300 mV, the responsivity increased to 76 mA/W due to an additional photoconductive contribution.The photoresponse of photodetectors based on the photo-thermoelectric effect arises from hot electrons, rather than lattice heating. Therefore, we could demonstrate that our graphene integrated photodetector based on a tuneable pn-junction reaches a setup-limited 3dB-bandwidth of 65 GHz, which is the highest value reported for a graphene-based phototedetector.

All-oxide solar cells based on electrodeposited p-type Cu2O absorber and atomic layer deposited n-type ZnMgO are investigated. The introduced solar cell architecture is free of precious metals that are usually employed as electrodes in Cu2O solar cells and is composed almost exclusively of oxide layers. Firstly, a detailed investigation is made on the potentiostatic electrodeposition of the absorber layer on the sputtered, highly conductive and reflective Cr/ITO (ITO: tin-doped indium oxide) electrode. The focus is set on adjusting the deposition parameters to obtain Cu2O layers, which are void-free and with large grains. A multi-textured film is obtained with prominent (111), (200) and (220) reflections. The absorber has a bandgap of 1.93eV and a rough, antireflective surface. Next, the n-type ZnMgO layer has been investigated and a linear relation of the optical bandgap (3.2–3.9eV) versus Mg content was found. The valence band maximum levels have been extracted from X-Ray photoelectron spectroscopy and the band alignment of the Cu2O/ZnMgO was evaluated. Solar cells employing ZnMgO films with ~10at% Mg show best photovoltaic performance, whereas for larger Mg contents a dramatic decrease of the performance takes place, presumably due to excessive, deep-level defects, leading to tunnel recombination. Best cells show short circuit current density of 6.8mA/cm2, open circuit voltage of 550mV, fill factor of 45% and power conversion efficiency of 1.67%.

In order to improve the electrical behaviour of metal-insulator-metal capacitors with ZrO2 insulator grown by Atomic Layer Deposition, the influence of the insertion of interfacial Cr layers between Pt electrodes and the zirconia is investigated. An improvement of the α-voltage coefficient of capacitance as low as 567 ppm/V2 is achieved for a single layer of Cr while maintaining a high capacitance density of 10.7 fF/μm2 and a leakage current of less than 1.2 × 10−8 A/cm2 at +1 V. The role of the interface is discussed by means of X-ray photoelectron spectroscopy and high-resolution transmission electron microscopy showing the formation of Zr stabilized chromia oxide phase with a dielectric constant of 16.

The impact of annealing temperature and annealing duration on the interface properties of n-Ge/Y2O3/Pt MOS-capacitors is investigated employing an ultrathin catalytically acting Pt-layer. X-ray photoelectron spectroscopy analysis has been used to verify an enhanced growth of GeO2 and thermally stabilizing yttrium germanate at the n-Ge/Y2O3 interface induced by an oxygen post deposition annealing (PDA). Especially at 500 °C and 550 °C high quality Ge/Y2O3 interfaces have been achieved resulting in very low interface trap density of 7.41*1010 eV−1 cm−2. It is shown that either a short oxygen annealing at higher temperatures (550 °C) or a long time annealing at lower temperatures (450 °C) are appropriate to realize low interface trap density (D it). It turns out that a Pt-assisted PDA in combination with a final PMA are needed to reduce hysteresis width significantly and to bring flat band voltages toward ideal values.

We perform a comprehensive electrical transport and physical characterization of metal oxide semiconductor heterostructure field effect transistors with ZrO2 gate dielectrics, having partially (referred here as MOS-HFET) and fully (here called true-MOS-FET) recessed GaN/AlGaN/GaN barrier, giving normally-on and normally-off behavior, respectively. The mobility of the MOS-HFETs decreases with the proximity of the Coulomb scattering centers, situated at the ZrO2/AlGaN interface. The effect of the etching procedure and ZrO2 deposition on the formation of the interfacial charges, Nint, is evaluated by X-ray Photoelectron Spectroscopy and by fitting the threshold voltage values to numerical model. For the both device types, the extracted value of Nint lies within 15% around 2.8×1013cm−2, which is of the order of polarization charge, showing that our low-damage three step etching procedure does not introduce extra interface states.

With its electrically tunable light absorption and ultrafast photoresponse, graphene is a promising candidate for highspeed chip-integrated photonics. The generation mechanisms of photosignals in graphene photodetectors have been studied extensively in the past years. However, the knowledge about efficient light conversion at graphene p-n junctions has not yet been translated into high-performance devices. Here, we present a graphene photodetector integrated on a silicon slot-waveguide, acting as a dual gate to create a p-n junction in the optical absorption region of the device. While at zero bias the photothermoelectric effect is the dominant conversion process, an additional photoconductive contribution is identified in a biased configuration. Extrinsic responsivities of 35 mA/W, or 3.5 V/W, at zero bias and 76 mA/W at 300 mV bias voltage are achieved. The device exhibits a 3 dB bandwidth of 65 GHz, which is the highest value reported for a graphene-based photodetector.

Metal Oxide Semiconductor capacitors are investigated, employing ALD grown Y2O3 as gate dielectric, and n-type (100) germanium as channel substrate. The effect of post deposition annealing (PDA) in oxygen and forming gas atmosphere using a thin catalytically acting platinum (Pt)-layer on the Y2O3/Ge interface is electrically analyzed for buffered hydrofluoric (BHF) and thermally pre-treated Ge-surfaces.The Pt-assisted PDA ensures even for BHF pre-treated samples very low values for the interface trap density D-it of 1.55 x 10(11) eV(-1) cm(-2) and low leakage current densities J of <7 x 10(-9) A/cm(2) outperforming conventional PDA treatments. The interfacial formation of GeO2 and yttrium germanate after PDA is proven by using X-ray Photoelectron Spectroscopy measurements. (C) 2016 Elsevier B.V. All rights reserved.

To advance existing in vitro cell impedance spectroscopy and improve reliability of impedimetric sensors for cell analysis, we have electrically insulated interdigitated microelectrodes using the high-k biomaterial zirconium dioxide (ZrO2). We report the smallest passivation thickness to electrode distance ratio of 10−3 using atomic layer deposition resulting in electrically insulated metal oxide films of 15nm thickness. For the first time the influence of the insulation on sensor performance is experimentally and theoretically analyzed using numerical simulations. In addition an equivalent electrical circuit model was established and validated using non-linear least square fitting. Results of the computational simulations revealed improved electrical current distribution across the electrically insulated interdigitated electrode structures in comparison to open (not passivated) electrodes. Furthermore, we found linear decrease of current density in z-direction within 5μm distance from the sensor surface in the presence of ZrO2 nanocoatings is ideally suited to assess confluent cell layers. Final practical application of the ZrO2 nanolayer passivated impedimetric sensors is demonstrated for nanotoxicological investigations, where sensitivity and repeatability are crucial parameters for cell analysis. Results of our study show that the reproducible and standardizable deposition of a uniform metal oxide nanocoating improves current density distributions, has no performance drawbacks compared to open sensors and enables sensitive detection of protein-coating effects on cytotoxic silica nanoparticles. The presented novel sensor design allows for the integration of alternative electrode materials such as aluminum enabling cost-effective fabrication of large-volume sensor arrays.

Rhodium Schottky barrier contacts on germanium substrates are investigated in terms of electrical, physical, and chemical properties. The Rh, deposited by electron beam evaporation on a n-type (100)-Ge substrate, has been annealed in N2H2 at different temperatures ranging from 450 degrees C up to 800 degrees C. Rh/Ge Schottky diodes were fabricated to extract the Schottky barrier height, the ideality factor as well as the forward to backward current ratio. By using various analyzing techniques such as Atomic Force Microscopy (AFM), X-ray Diffraction (XRD), Time-of-Flight Secondary Ion Mass Spectrometry (TOF-SIMS), and High-resolution Transmission Electron Microscopy (HR-TEM), the formation of polycrystalline Rh-germanide RhxGey phases has been proven. At 500 degrees C germanidation temperature an effective SBH of 0.59 eV is extracted showing a high current ratio of 5 x 10(3) and a remarkable low ideality factor of 1.07. (C) 2015 The Electrochemical Society. All rights reserved.

We provide theoretical and simulation analysis of the small signal response of SiO2/AlGaN/GaN metal insulator semiconductor (MIS) capacitors from depletion to spill over region, where the AlGaN/SiO2 interface is accumulated with free electrons. A lumped element model of the gate stack, including the response of traps at the III-N/dielectric interface, is proposed and represented in terms of equivalent parallel capacitance, Cp, and conductance, Gp. Cp -voltage and Gp -voltage dependences are modelled taking into account bias dependent AlGaN barrier dynamic resistance Rbr and the effective channel resistance. In particular, in the spill-over region, the drop of Cp with the frequency increase can be explained even without taking into account the response of interface traps, solely by considering the intrinsic response of the gate stack (i.e., no trap effects) and the decrease of Rbr with the applied forward bias. Furthermore, we show the limitations of the conductance method for the evaluation of the density of interface traps, Dit, from the Gp/ω vs. angular frequency ω curves. A peak in Gp/ω vs. ω occurs even without traps, merely due to the intrinsic frequency response of gate stack. Moreover, the amplitude of the Gp/ω vs. ω peak saturates at high Dit, which can lead to underestimation of Dit. Understanding the complex interplay between the intrinsic gate stack response and the effect of interface traps is relevant for the development of normally on and normally off MIS high electron mobility transistors with stable threshold voltage.

We report on fabrication of enhancement-mode True-MOS high electron mobility transistor (HEMT) with ZrO2 gate dielectric. The GaN cap and AlGaN layers in the gate area are completely recessed by dry etching up to the GaN channel layer. The increase in channel resistance subsequent to the recess is compensated by adopting sub-micrometer gates and the negative Vth shift is mitigated by using a high-k dielectric. The maximum output current of 0.45 A/mm for a 0.5 μm gate length shows that the above concept can be promising for switching applications.

The impact of thermal post deposition annealing in oxygen at different temperatures on the Ge/Y2O3 interface is investigated using metal oxide semiconductor capacitors, where the yttrium oxide was grown by atomic layer deposition from tris(methylcyclopentadienyl)yttrium and H2O precursors on n-type (100)-Ge substrates. By performing in-situ X-ray photoelectron spectroscopy, the growth of GeO during the first cycles of ALD was proven and interface trap densities just below 1 × 1011 eV−1 cm−2 were achieved by oxygen annealing at high temperatures (550 °C–600 °C). The good interface quality is most likely driven by the growth of interfacial GeO2 and thermally stabilizing yttrium germanate.