Due to the poor quality of the silicon carbide / silicon dioxide interface realization and their thin gate oxide layer, SiC mosfets are more susceptible to charge-trapping mechanisms than silicon mosfets. These phenomena are amplified over time, resulting in decreased transistor performance and increased losses. To monitor this aging mechanism, an analog method is proposed to extract a newly discovered health indicator from the gate voltage (V-GS) waveform. This is accomplished by slowing down a specific turn-on using a dual-channel active gate driver. The online health monitoring method is then experimentally validated on a 1200 V-36 A SiC mosfet in both no-load and pulsewidth modulation conditions.

To address their fragility and limitations in high-reliability, safety-critical applications, especially in future aeronautic on-board power systems, SiC MOSFETs are increasingly paired with smart gate drivers. These drivers provide health diagnostics, dv/dt control to reduce losses and EMI, and integrated fault detection. With newer generations, SiC MOSFETs demonstrate increasingly shorter short-circuit withstand times. A multi-channel parallel gate driver with extensive fault detection and gate-oxide integrity monitoring, based on gate-source voltage monitoring is proposed. On commercial 1200 V Gen. 3 SiC MOSFETs, Hard Switching Faults and Faults Under Load are detected within 890 ns and 235 ns, respectively. Gate-Oxide cracks are identified before controllability is compromised, and the robustness of this detection method is experimentally validated.

L’industrie du transport aérien est résolument engagée dans une trajectoire de décarbonation qui la mènera à la neutralité carbone en 2050. Depuis l’avènement de la propulsion à réaction, l’accroissement d’efficacité énergétique des avions de transport a été considérable, et pour une large partie portée par les technologies des systèmes propulsifs. Les technologies de propulsion thermique comportent encore une marge de progression, mais désormais celles-ci doivent être complétées d’une action renforcée sur tous les autres leviers à disposition : introduction de concepts disruptifs réduisant encore la consommation par le recours, notamment, à l’électrification ; optimisation des opérations en vol ; recours à des carburants substitutifs aux hydrocarbures fossiles. L’action de Safran s’étend à tous ces axes en simultané, mais nous développerons dans cet article quelques challenges auxquels faire face dans le cadre d’une plus grande électrification, en particulier l’hybridation électrique des moteurs.

In conventional power modules, the solid insulating material (epoxy, silicone gel) that covers the top of the devices, does not efficiently contribute to the heat extraction. Moreover, thermal conducting paths are formed by heterogeneous layers for electric insulation, causing inevitably high thermal resistance. As an alternative, the direct cooling of the devices using dielectric liquids in forced convection can pave the road toward a new class of high performance power modules. The aim of this paper is to evaluate the potentialities of using flowing dielectric liquids as encapsulating material in order to ensure the direct cooling of the devices as well as the electric insulation. The thermal interest of the solution is validated using thermal-hydraulic simulations while the dielectric properties of various liquids are evaluated experimentally over a wide temperature range. Results show that by selecting package structure allowing a high exchange area between the top device interconnection and the dielectric fluid, a reduction by more than 40% of the junction to fluid thermal resistance can be achieved. Moreover, based on the combination of the variation of the dielectric properties of liquids in motion issued from the literature and the measured dielectric properties (relative permittivity, electrical conductivity, breakdown voltage) of the dielectric fluids, the three evaluated candidates show their ability to insure a good insulation at temperature up to 175 °C for high voltage applications.

The short-circuit (SC) immunity of power silicon carbide (SiC) MOSFETs is critical for high-reliability applications, where robust monitoring and protection strategies are essential to ensure system safety. Despite their superior voltage blocking capabilities and high energy efficiency, SiC MOSFETs exhibit greater sensitivity to SC-induced degradation compared to their silicon counterparts. This increased vulnerability necessitates the precise assessment of the key SC performance metrics, such as short-circuit withstand time (TSCWT), as well as a deeper understanding of the failure mechanisms. In this study, a comprehensive experimental methodology for evaluating the SC behavior of SiC MOSFETs is presented and validated using industrial references. The investigation further explores the concept of a Safe Operating Area (SOA) under SC conditions, highlighting the significant impact of quasi-simultaneous SC events on device lifetime. Additionally, an application case study demonstrates how these events can drastically reduce the device’s lifespan.

Advancement of electrified aircraft propulsion (EAP) involves the increase of voltage and power levels. However, developing fast and safe DC Solid-State Circuit Breaker (SSCB) for a high voltage DC network bring considerable challenges. This paper deals with the design of a high voltage bidirectional SSCB for a 3 kV / 250 kW aircraft DC network. The design of high-power semiconductor switches using a combination of hybrid high-power Transient Voltage Suppression (TVS) diodes and Metal Oxide Varistors (MOV) for clamping voltage and clearing fault currents is presented. The possibility to use such a new configuration to replace the traditional SSCB for EAP systems is discussed in this paper.

Power modules can occasionally be exposed to brief power peaks, causing overheating and premature failure of the power semiconductor devices. In order to overcome this issue without oversizing the module or its cooling system, this study aims to design a new class of power modules with integrated Phase Change Material (PCM) in a container serving as a top device interconnection. Simulations and experiments are performed with two organic PCMs, and the interest in adding copper foam is discussed. Under various test conditions, the results show that the simulations agree well with the experiments. Hence, virtual prototyping can be very useful for sizing containers based on a specific mission profile. For a constant selected PCM volume (around 1 cm3/device) and with a convection heat transfer coefficient value of 800 W.m−2.K−1, the solution allows achieving a junction temperature reduction of about 35 °C (erythritol and 90% porosity copper foam) compared to a wire-bonded conventional technique. Repetitive power cycles can be achieved with both materials, but the selection of the PCM should be conducted cautiously based on the mission profile. The two selected organic PCMs show degradation of their latent heat of fusion and mass loss during high-temperature isothermal aging in air above 130 °C. By assuming as endpoint criterion the reduction of energy storage by 50% compared to the initial state, the lifetime of erythritol and RT100 is evaluated to be about 100 and 340 h, respectively, during aging at 150 °C.

In some applications, it can be useful to use occasionally power semiconductor devices above their nominal current for brief durations in order to deliver the additional requested power for the electric system. For such conditions, this study aims to design a new class of power modules with integrated phase change material (PCM) in a container serving as top device interconnection. This solution does not alter the cooling under nominal conditions where the bottom side of the power devices is conventionally used. During the over power duration, the PCM melts and absorbs rapidly the excessive heat. Hence, the increase of the junction temperature (T j ) in abnormal conditions can be slowed down. For a specified mission profile, the impact of the Cu to PCM vol. ratio on the T j is evaluated as well as the impact of the contact area between the Cu and the PCM. Moreover, the optimal thickness of the container is defined. Finally, in order to evaluate the effectiveness of the solution, a comparative analysis with other conventional assemblies presenting the same weight is achieved under various heat transfer coefficients.

Switching losses of a power converter is a relevant factor that contributes to total losses. For building an optimized design, it is essential to accurately estimate switching energy in order to define certain parameters such as maximum operating frequency and cooling system. Power SiC MOSFETs have high switching-speed capability, thus the voltage and current alignment should be performed carefully during classical dynamic characterization methods. In addition, the definition of integration limits of instantaneous power during switching events can generate erroneous results. In this paper, a new methodology for switching energy computation is proposed and validated for different manufacturers. This method is less sensitive to oscillations on voltage and current waveforms with respect to other classical methods.

Solid-state power controllers aim to protect and configure electrical systems. They act as a normally-on switch until the occurrence of a short circuit event where the breaking current can reach several times the nominal one. The overheating of power semiconductor devices during this phase should be avoided. This paper aims to investigate the thermal performance of assemblies based on various substrates in order to reduce the thermal impedance in the time range 10 (exp -3) to 1 s. Based on simulations and experimental results, the calculated device junction temperature for a specific overcurrent trip curve is used to select potential technologies. Finally, a comparative analysis between these potential technologies and a conventional substrate joined to various baseplate materials with different thicknesses is achieved.

The proposed dual-port gate driver architecture relies on a quasi-flying gate concept to protect SiC power mosfet s against short-circuit events. Hard switching faults (HSFs) extract charges from the gate by causing a leakage current toward the source, while faults under load (FUL) lead to charge injection into the gate through the reverse transfer capacitance ( C GD ). Such phenomena lead to perturbations of the gate–source voltage ( V GS ), which are amplified by the gate resistor, acting as an enhancer of short-circuit signatures. Thus, a small gate resistance is used to ensure high switching dynamics, while a larger one is switched on during pulsewidth modulation on -state operation to identify possible faults. A dual-port gate driver is then proposed to ensure fast switching with HSF and FUL monitoring. The fault detection scheme relies on comparing two thresholds to V GS relative changes to the nominal gate voltage. Experimental results using TO-247 package 1.2-kV/36-A SiC mosfet s exhibit promising inverter leg short-circuit detection and protection against faults in less than 300 ns.

This paper deals with online measurement of degradation sensitive electrical parameters of silicon carbide (SiC) power MOSFET. The purpose is to target a health monitoring approach for power module allowing more reliable power electronic converter. The on-state resistance $\mathbf{R}_{\mathbf{DS}_{\mathbf{ON}}}$ is one of the key aging indicator of SiC MOSFETs as it can provide information on both chip and packaging degradation. This on-state resistance can be deduced using both the on-state current and voltage of the power semiconductor. This paper focuses on an on-state voltage measurement circuit for medium-to-high voltage SiC power modules for aerospace applications up to 3.3 kV. In the literature, power module bondwires resistance can not be measured due to high switching voltage oscillations. An on-state voltage measurement circuit that can withstand such oscillations is proposed. The dedicated circuit is successfully tested on a double pulse bench for various module base plate temperatures and compared to data obtained with a static curve tracer Keysight B1505. Finally, the proposed circuit scope of application is discussed in a PWM inverter context.

This paper presents the development of a Field Grading Material (FGM) to be applied for the insulation of high voltage wide bandgap power device embedded in printed circuit board (PCB) technology. This composite encapsulant is made up with an epoxy resin matrix and high permittivity particles (barium titanate: $\text{BaTi}{\mathrm{O}}_3$ ). The permittivity gradient is obtained through a gradient of particle concentrations achieved by the way of an electrophoresis process (i.e., application of a DC electric field to drift particles around the high potential electrode). The characterizations carried out include digital microscope and scanning electron microscope (SEM) observations to determine the morphology of the FGM layers and their particle density. The breakdown voltage of a test structure made with two FGMencapsulated copper tracks on top of a FR4 prepreg was also evaluated and has shown an insulation enhancement compared to control test chip (full FR4 or epoxy).

The effect of large amplitude thermal cycles between −50°C and 180°C on power assemblies based on pressureless sintering of successive silver layers on an Aluminium Nitride (AlN) heat sink is investigated. In order to evaluate the impact of various adhesion layers on AlN as well as the relative density of the current track layers, various configurations with silver cermet, TiNiAg and WNiAg adhesion layers and track layer relative density of 81% and 66% were tested. Results show that the use of silver cermet as adhesion layer and a track layer with a high relative density of about 81% and a closed porosity presents the best behaviour with a low delaminated area ratio (16%) and acceptable shear stress value (7 MPa) after 1000 thermal cycles. For this configuration, the surface analysis performed after the shear tests on 1000 cycles aged samples show that the fracture takes place at the interface between the die attach layer and the device as well as the interface between the die attach and the track layer. However, for all other tested configurations, the fracture surface analysis performed at the end of the cycling tests highlights that the interfaces between the adhesion layer and the sintered track layers or the AlN ceramic are the weakest points of the assembly. The relationship between cracks observed after the aging and the adhesion layer nature, the track layer density, the die attach thickness as well as the void presence in the die attach is discussed. Finally, main guidelines allowing achieving device to heat sink assemblies able to withstand large amplitude thermal cycles are proposed.

Robustness of 1.2kV and 1.7kV Silicon Carbide MOSFETs submitted to short-circuit operations mode is studied. Experimental results confirm two main failure modes: a safe fail-to-open mode and an unsafe fail-to-short mode. A technique based on direct depolarization of gate source voltage is used to increase the short-circuit withstand capability and to partially obtain a fail-to-open mode. Electro-thermo-metallurgical simulations are investigated to deeply explain the fail-to-open mechanisms. Finally, using lock-in-thermography and scanning-electronic-microscopy imaging, a new and spectacular lift-off effect of gate-finger is highlighted to clearly confirm the fail-to-open mode capability such devices.

This paper presents the study of the influence of the thickness and the concentration of high- k particles (BaTiO 3 ) on composite AC breakdown where the matrix is an epoxy resin. The studied samples thicknesses are between $25\mu\mathrm{m}$ and $700\mu\mathrm{m}$. The BaTiO 3 particle concentration is ranging between 0 and 30 vol%. The AC breakdown results show an impact of the particle content on the breakdown as well as the thickness. A difference on the scale parameter “ $\alpha$”, representative of the breakdown voltage, highlighted that the breakdown strength for the composites is proportional to ~d −0.5 (>200 $\mu\mathrm{m}$), for all concentrations.

The purpose of this paper is to present analyses of the junction temperature of planar power 4H-SiC MOSFET under short-circuit events especially when failure appears. To characterize the junction temperature related to this failure type, various planar power SiC MOSFETs from several manufacturers were studied. The junction temperature during a short circuit was estimated using ANSYS Multiphysics software with dimensions and physical parameters of each device individually adjusted according to its experimental characteristics. Obtained results approximatively show the same junction temperature rating at instant of failure overall devices under test. This junction temperature threshold seems to be responsible for thermal runaway phenomenon triggering the failure process. Below this critical junction temperature, the device can safely turn-off the short circuit current or fail into a “soft failure” due to a short circuit between gate and source.

This paper presents the embedding of prepackaged GaN-components for an application of power propulsion unit (PPU) for satellite applications. First embedding trials of the packages with only minor preconditioning resulted in massive failure of the modules in reflow-tests. These failures have been analyzed and understood thanks to finite elements simulations.