We investigated the effect of growth temperature on the structural and electrical properties of InAlAs layers grown on InP (100) substrates by metalorganic chemical vapor deposition (MOCVD) method. Flat surface morphology of InAlAs layers with root mean square (RMS) surface roughness values below 0.4 nm were obtained at 500 degrees C and 660 degrees C, while RMS surface roughness values of InAlAs layers grown in the region of intermediate temperature increase from 0.7 nm at 540 degrees C to 3.9 nm at 620 degrees C with increasing growth temperature. This increase in surface roughness is caused by the phase separation of the InAlAs layer, which is divided into In-rich and Al-rich column regions. The resistivity values of the InAlAs layers grown at 500 degrees C and 660 degrees C, in which the phase separation was not observed, were analyzed by the transmission line method (TLM) and those values were similar to 1 x 10(4) Omega-cm and 0.06 Omega-cm, respectively. We propose that oxygen atoms being incorporated into InAlAs layers during growth were the cause effect explaining the change in resistivity depending on the growth temperature. In order to evaluate high-resistivity InAlAs layers grown at 500 degrees C for a buffer layer of devices, we fabricated InGaAs-channel metal oxide field effect transistors (MOSFETs). The on/off current ratio values obtained from ID-VG transfer measurement was a value of 6.10 x 10(5), indicating a high-performance characteristic.

In this work, we report high-performance InGaAs quantum-well MOSFETs with optimized bi-layer high-k gate dielectrics incorporating high-quality plasma-assisted atomic -layer-deposited (PA-ALD) HfOxNy interfacial layer (IL). With more than 1 nm IL deposition to passivate the InGaAs surface, excellent sub-threshold characteristics (SSmin = 68 mV/dec) were achieved through the proposed gate stack technology. We performed positive-bias-temperature-instability (PBTI) measure -ments in order to ensure a reliable gate operation. The proposed bi-layer III-V gate stack achieved the excellent value of maximum gate overdrive voltage (VOV, max) of 0.49 V with CET = 1.04 nm. The proposed gate stack has a great potential for III-V MOSFET technology to low power logic applications.

We developed a high-quality plasma enhanced atomic layer deposited (PEALD) aluminum oxynitride (AlOxNy) process for the metal-oxide-semiconductor (MOS) gate insulator of fully-recessed-gate AlGaN/GaN-on-Si MOS-heterojunction field-effect transistors (MOS-HFETs). It was found that the cyclic nitrogen incorporation into aluminum oxide (Al2O3) during PEALD process improved the conduction band offset at GaN interface resulting in higher forward breakdown field strength, which also contributed to suppressed trapping effects under forward gate bias stress. Improved interface characteristics, which resulted from suppressed surface oxidation, led to significant improvement of threshold voltage stability. A low threshold voltage hysteresis of 180 mV at maximum gate sweep voltage of 10 V was obtained with AlOxNy gate insulator. The MOS channel mobility was also improved to 235 cm(2) V-1 s(-1). The fabricated fully-recessed-gate AlGaN/GaN-on-Si MOS-HFET with PEALD AlOxNy gate insulator exhibited excellent overall performances such as a threshold voltage of 3.2 V, a maximum drain current density of 481 mA mm(-1), an on/off current ratio of similar to 10(10), an ON-resistance of 12 m Omega mm, and a breakdown voltage of 1050 V.

This paper reports the first-time evaluation of the time-dependent dielectric breakdown of recessed AlGaN/GaN-on-Si metal-oxide-semiconductor heterostructure field-effect transistors (MOS-HFETs) with plasma enhanced chemical vapor deposition (PECVD) SiO2 gate oxide. The interface fixed charge density and oxide bulk charge density extracted from the flat-band voltage characteristics were 2.7 x 10(11) +/- 6.54 x 10(10) cm(-2) and -9.71 x 10(17) +/- 5.18 x 10(16) cm(-3), respectively. The time dependent dielectric breakdown (TDDB) characteristics exhibited longer lifetime estimation as the SiO2 thickness increased. The excellent reliability of the PECVD SiO2 film was validated for use as the gate oxide of recessed AlGaN/GaN MOS-HFET.

This letter reports the excellent radio frequency output characteristics of AlGaN/GaN-on-Si power amplifier (PA) monolithic microwave integrated circuits (MMICs) operating at the Ka-band, employing a recessed metal-insulator-semiconductor (MIS) structure with SiNx/HfON dual dielectric layers. The fabricated 0.15-mu m AlGaN/GaN-on-Si high electron-mobility transistor (HEMT) exhibited a low OFF-state current and reduced current collapse in comparison with the conventional Schottky gate HEMT; therefore, an enhanced output power of the PA MMIC is achieved. The fabricated two-stage PA MMIC exhibited a continuous-wave output power of >29 dBm with a power-added efficiency (PAE) of 14.5% at the drain voltage of 20 V, at 26.5 GHz.

This letter reports high-quality plasmaassisted atomic-layer-deposited HfOxNy by using isopropyl alcohol (IPA) oxidant and cyclic N-2 plasma treatment demonstrated on n-type In0.53Ga0.47As. Improved interface characteristics, with suppressed frequency dispersion and surface oxidation, were demonstrated and resulted in significantly decreased interface trap density (D-it) of 4.5 x 10(11) eV(-1) cm(-2) at the mid-gap level with outstanding inversion behaviors. In addition, to verify true inversion, transition frequency (omega(m)) of 4 kHz was extracted. The improvement mechanism of the proposed technology is assumed to be that nitrogen plasma reduces oxygen vacancies that act as oxygen diffusion paths and with the use of IPA oxidant the interface would be strongly protected during pre- and post-dielectric deposition.

We have investigated the interface fixed charge density and the oxide bulk charge density of the metal/PECVD SiO2/recessed GaN MOS structure. The fabricated AlGaN/GaN-on-Si recessed MOS-HFETs exhibited the excellent on/off ratio characteristics. The extracted effective interface fixed charge density and effective oxide bulk charge density for the PECVD SiO2 deposited on the recessed GaN surface were -5.94 x 10(11) cm(-2) and -2.19 x 10(17) cm(-3), respectively. The negative bulk charges in the SiO2 layer were responsible for the positive shift in the threshold voltage as the SiO2 thickness increased.

The effects of post-metallization annealing (PMA) have been investigated for thermally-grown SiO2 on 4H-SiC metal-oxide-semiconductor (MOS) with a molybdenum (Mo) gate electrode. Mo is a great metal gate material for Silicon carbide (SiC) due to its high thermal budget and low thermal expansion coefficient, which allows high-temperature processing after the gate electrode formation. In this study, PMA process was carried out after Mo gate formation on thermally-grown SiO2/4H-SiC in the temperature range from 600 to 1000 °C in N2 or a forming gas ambient. The fabricated Mo/SiO2/4H-SiC MOS device annealed at 800 °C exhibited excellent interface characteristics with negligible hysteresis in comparison with as-grown or post-oxidation annealed samples.

2018 International Conference on Solid State Devices and Materials,Fabrication of In0.53Ga0.47As homo-junction TFET with optimized gate stack by employing surface treatment and post metallization annealing

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We have developed a nitrogen-incorporated silicon oxide (SiOxNy) deposition process using plasma enhanced atomic layer deposition (PEALD) for the gate insulator of recessed-gate Al-GaN/GaN metal-insulator-semiconductor heterojunction field-effect transistors. The SiOxNy film deposited on a recessed GaN surface exhibited a breakdown field of 13.2 MV/cm and a conduction band offset of 3.37 eV, which are the highest values reported for GaN MIS structures to the best of our knowledge. The fabricated normally-off transistor exhibited very promising characteristics such as a threshold voltage of 2.2 V, a maximum drain current density of 428 mA/mm, and a breakdown voltage of 928 V.

A high‐performance E‐mode AlGaN/GaN MIS‐HEMTs is fabricated with atomic layer deposited 5 nm SiON/16 nm HfON and with atomic layer deposited 22 nm HfON gate insulator and their characteristics are compared. Plasma nitridation is employed in every atomic layer deposition cycle to deposit SiON and HfON dielectrics. SiON is used as an interfacial layer to ensure a high‐quality AlGaN/dielectric interface, and high‐k HfON is employed to realize a large transconductance, a high on‐state current, and a high on/off current ratio. The E‐mode AlGaN/GaN MIS‐HEMT with 5 nm SiON/16 nm HfON exhibited more excellent DC and dynamic characteristics than that with 22 nm HfON. The fabricated MIS‐HEMT with dual gate insulator showed a high on/off ratio of ≈1.2 × 1011, a low off‐state drain leakage current less than 10−11 A mm−1, a threshold voltage of 1.1 V, a subthreshold slope of 77 mV dec−1, a specific on‐resistance of 1.34 mΩ cm2, and a breakdown voltage of 800 V.

The effect that insertion gate metals have on GaN millimeter-wave devices undergoing a postmetallization annealing (PMA) process was investigated. It was found that the PMA process increases the gate resistance (Rg), which is responsible for a decrease in the maximum oscillation frequency (fmax). The resistance was examined as a function of line patterns containing various gate metal stacks, including Ni/Au and Ni/Mo/Au, before and after annealing from a low temperature to 550 °C. The metal stack with an Mo insertion layer effectively suppressed Au diffusion into GaN and reduced the increase in the gate metal resistance. For the fabricated AlGaN/GaN-on-Si high-electron-mobility transistors with a Ni/Mo/Au gate, stable gate reliability, improved current collapse characteristics, and small-signal characteristics were also achieved compared to those of the Ni/Au gate.

This letter reports an AlGaN/GaN-on-Si power amplifier (PA) monolithic microwave integrated circuit (MMIC) operating at V-band using advanced gate processing technology. The AlGaN/GaN-on-Si high electron mobility transistors (HEMTs) employed a gate length of 100 nm with a double-deck shaped (DDS) field-plate, which resulted in a cut-off frequency of 68 GHz and a maximum oscillation frequency of 160 GHz at the drain voltage of 15 V with significant reduction in gate resistance and improvement of current collapse phenomenon. A 60 GHz three-stage PA MMIC composed of two 4 × 37 μm and an 8 × 37 μm AlGaN/GaN-on-Si HEMTs successfully demonstrated using the DDS field-plate gate technology, which exhibited a continuous wave output power of >23.5 dBm at the drain voltage of 18 V at 58 GHz. This is the highest output power performance for V-band power amplification based on AlGaN/GaN-on-Si technology.

In this paper, a new method to improve HfO2 /InGaAs interface is studied. Ultra-thin SiNx deposited by using PEALD technique shows enhanced performance in both C-VG and ID-VG characteristics. 1.5nm CET InGaAs MOS quantum well FET using SiNx interfacial layer is demonstrated. We suggest ultra-thin PEALD SiNx as a promising candidate for improvement of the high-k/III-V interface quality and further EOT

A 29.4-W X-band high-power amplifier has been substantialized using GaN on high-resistive silicon substrate. The developed GaN high electron mobility transistor (HEMT) with 3.6-mm gate periphery provides 29.4-W output power and 8-dB small signal gain at 8 GHz with power added efficiency of 39.4% under pulse condition at a duty of 10% with a pulsewidth 100 μs. Load-pull measurement at 8 GHz demonstrates an output power density of 8.1 W/mm. To the best of our knowledge, the presented amplifier exhibits the highest power density, delivering >10 W of output power in X-band for GaN HEMTs technology on silicon substrate.

AlGaN/GaN HEMTs have great potential in high power microwave applications [1]. Despite the remarkable improvement in GaN-device technology, the “current collapse” issue has not been completely solved yet, which plays an important role in RF performance. It has been reported that optimizing a surface passivation process can diminish the current collapse phenomenon [2]. In this study, we developed a SiNx re-deposition process to further improve the current collapse phenomenon. A pre-passivation process started with SiNx deposition at 350 o C using a remote ICP-CVD system in order to protect the surface during device fabrication. The key difference in the re-deposition process was that the SiNx pre-passivation layer was removed after high-temperature ohmic annealing by using a CF4/O2-based dry etching method and a new SiNx film was re-deposited on the entire surface before continuing the process. No significant difference in drain current density was observed between re-deposited and control devices whereas great improvement in pulse characteristics was observed for the re-deposited device. The SiNx pre-passivation layer was not removed for the control devices. The current collapse in pulse characteristics (VDS.Q = 30 V and VGS.Q = -5 V) decreased from ~33% to less than 8% when the re-deposition process was employed. It is speculated that the surface, even with the pre-passivation layer, was damaged during high-temperature ohmic annealing (800 °C, in N2 ambient). Removing the pre-passivation layer and re-depositing the fresh SiNx film turned out to be a very effective way to recover the damaged surface. As a result of the improved pulse characteristics, the re-deposited device exhibited superior characteristics to the control device; an output power density of 6.3 W/mm and PAE of 53.5% with the drain bias of 15V at 9.3 GHz.

AlGaN/GaN HEMTs have superior properties for high power application. However, current collapse effect prevents its potential by reducing the drain current and increasing the knee voltage. Many studies have been done to solve this problem and they are usually focused on surface passivation or epilayer design and growth. In this research, we propose a new approach to reduce current collapse effect by changing the gate metal stack. Recently, suppression of current collapse by using TiN gate [1] and reliability study by comparing pulse characteristics of Ni/Au and Mo/Au [2] was already observed. We thought modification of the Ni-based schottky metal would also suppress the current collapse effectively without changing the bottom metal unlike ohter studies. Our devices were fabricated in the same steps, only altering the gate metal. Both conventional Ni/Au (40/200 nm) and suggested Ni/Mo/Au (30/10/200 nm) schottky contact were annealed at 400 °C using a furnace. Table I shows the overall results of the measurement. Comparing with the reference, insertion of Mo showed no noticeable effect in DC performance. It resulted in similar transconductance and gate leakage current. On the other hand, significant improvement in pulsed I-V characteristics was measured. Current discrepancy has decreased considerably from 21.7 % to 10.6 %. Figure 1 shows how Mo insertion has effectively reduced the current collapse effect. We could obtain better suppression of current collapse without degradation of other DC characteristics by using the suggested metal stack. This result can be explained in several ways. One explanation is that, through annealing process, the Ni diffusion may eliminate the existing interface states, in the meanwhile, inducing new ones due to thermal stress. Thus, Mo may help reducing the thremal stress leading to better interface. Another explanation is that Ni and Mo may react, and Ni-Mo alloy may create a smoother interface resulting in less interface trap. The exact mechanism needs to be studied further. As a conclusion, through optimization of the ratio of insertion metal with appropriate annealing, current collapse phenomenon can be more reduced.

Monolithic Microwave Integrated Circuits (MMICs) are essential components of modern communication and radar systems at millimeter-wave frequencies [1]. GaAs and InP technology has limited the high-power amplifiers due to the properties of those semiconductor materials. AlGaN/GaN high electron mobility transistors (HEMTs) on SiC substrates which have better lattice match and good thermal management are expected for high frequency power applications for the next generations, although SiC substrates are lacked for large-size wafer availability [2]. GaN HEMTs grown on high-resistivity Si (111) substrates provide low cost solutions with good thermal conductivity, but more seriously suffer from current collapse effects. Recently, good current collapse and off-state breakdown characteristics were reported with advanced epitaxial structures in 0.1 μm AlGaN/GaN HEMTs on Si with maximum oscillation frequency up to 200 GHz [3]. However, only GaN on Si power amplifier for millimeter-wave with output power of over 12 dBm at 76 GHz was reported [4]. In this work, we have developed highly uniform double-deck shaped (DDS) [5] field-plate gate GaN HEMTs on Si with fmax of 160 GHz (fT = 70 GHz) and demonstrated 3-stage power amplifier with 20.1 dBm at 77 GHz for 18 V drain bias. Fig.1 shows a device structure used in GaN HEMTs MMICs. Sample was pre-deposited with 30 nm SiNx film before ohmic contacts and mesa isolation processes were performed. After 60 nm SiNx film was re-deposited, gate electrodes with gate length of 0.1 μm were formed. The 50 nm gate field-plate was defined to mitigate current collapse phenomena and gate-to-drain breakdown. DDS gate structure was fabricated with etch-back process of thick resist to reduce gate resistances which is the most important factor of increase fmax. A NiCr TFR with targeted sheet resistance of 20 Ω/sq and metallization of coplanar waveguide (CPW) line were followed. Fig. 2 shows gate-to-drain breakdown voltage characteristics with gate field-plate and without gate field-plate. We recorded breakdown voltage at IG = 1 mA/mm and more than 40 V higher breakdown voltage was achieved with gate field-plate device. The uniformity of the fabricated devices was simply estimated with transfer curves of 35 devices and highly uniform characteristics were shown in Fig. 3 with the average maximum extrinsic transconductance of 427 mS/mm at VDS = 5 V and the threshold voltage variation of ±270mV. A maximum drain current of the device with DDS field-plate gate structure was 910 mA/mm at VGS = 0 V. Fig. 4 shows current collapse effects investigated with pulsed I-V measurements for 500 ns pulse duration at VGS = 0 V. Even with 50 nm field-plate length for small parasitic capacitances, the current collapse phenomena were effectively suppressed by more than 50% at VGSQ = -5V and VDSQ = 20V compared with no gate field-plate HEMTs. The unity current gain cut-off frequency (fT) and the maximum oscillation frequency (fmax) were each determined by the extrapolation of the current gain |H21| and the Mason’s unilateral power gain U as shown in Fig. 5, and the value of fmax was 160 GHz for DDS-field-plate gate HEMT (fT = 70 GHz). For the design of the millimeter-wave MMICs, DDS field-plate gate HEMTs with a gate width of 4×37 μm and 8×37 μm were chosen. These devices were selected through the parametric study on GaN-on-Si HEMTs performed in our previous work [6]. Fig. 6 shows the chip image of the fabricated 77 GHz power amplifier MMIC. The circuit was designed with 3-stage common source type which consists of device with gate width of 4×37 μm at the first and second stage, and 8×37 μm at the third stage. Because the SRF (Self Resonance Frequency) of MIM capacitors cannot cover up to W-band range, coupled lines and λ/4 open stubs are applied for the purpose of DC block and RF short. Fig. 7 shows the measured S-parameter results. The measured power gain was 3.9 ~ 5.0 dB from 70.5 GHz to 78 GHz and the input/output return loss was below -10 dB from 71 GHz to 77.5 GHz. Fig. 8 (a) and (b) represents the measured output power at 77 GHz and the saturated power sweep according to frequencies. The fabricated 77 GHz PA MMIC represent the output power of 20.1 dBm at 77 GHz and 19 ~ 22 dBm from 72 GHZ to 78 GHz (the peak power at 72 GHz)