In molecular layer deposition (MLD), the growth per cycle (GPC) depends on process conditions with no well-defined temperature window. During MLD of polyurea using toluene diisocyanate (TDIC) and ethylendiamine (ED) as MLD precursors, the GPC decreased with deposition temperature from 0.22 nm at 0 degrees C to 0.022 nm at 45 degrees C. While we observed the reaction of toluene diisocyanate with the underlying SiO2 at 45 degrees C, at 22 degrees C, in situ infrared spectroscopy indicates that the MLD film is not anchored to the substrate via covalent bonds. TDIC and ED displayed different temperature-dependent interactions with the growing polyurea film during MLD. Specifically, at lower temperatures, ED was more likely to be added to the film via physisorption, and as a consequence, TDIC was more likely to double react with both its functional groups to -NH2 sites within the film. While the lower GPC at higher temperature is driven predominantly by a decrease in ED physisorption, the rate of TDIC double reaction must also decrease due to the lower density of available reactive sites. As a result, at higher temperatures, both ED physisorption and TDIC double reactions are suppressed, and the ratio of polyurea linkages formed in each half-cycle was closer to unity. While the GPC was the highest at 0 degrees C, we also show that the films deposited at a lower temperature were unstable in both vacuum and the ambient and showed up to similar to 15% decrease in thickness, most likely due to the desorption of physisorbed precursor molecules.

Abstract High aspect ratio (AR) etches play a critical role in defining 3D NAND memory devices. As 3D NAND devices scale predominantly in the z direction, AR dependent etching becomes a major limiting factor in cost scaling. In this work, deposition and etch process development understanding combined with integration and feature scale modeling is applied to cost-effectively merge etches with minimal downstream device impact. Merged SiO 2 /Si 3 N 4 (ONON) memory channel and SiO 2 interlayer dielectric (ILD) contact etch was achieved by doping the ILD to enable SiO x contact etch depth and profile control while maintaining the same memory channel cryo etch process. Furthermore, co-doping the SiO x ILD layer shows high etch rates while enabling profile control through etch byproduct redeposition management. In addition, co-doping minimizes downstream integration impact and device properties based on hot phosphoric wet etch rate and blanket oxide leakage current measurements, respectively.

Vertical scaling of 3D NAND devices calls for higher SiO2 and SiN etching rates and meaningful reduction of aspect ratio dependent etching. Recently, evolutionary improvements of the fluorocarbon gas process have been replaced by novel so-called cryo etching processes using HF as the main etch gas. In this paper, we report computational results for the activation Gibbs free energies Delta G double dagger for the reaction of HF and various additive gases with SiO2 and SiN. The results are compared with available experimental trends. We find that the dipole moment of the additive gas is an indicator of its catalytic effect.

During reactive ion etching of SiNx in fluorine-based plasmas where HF is produced through a combination of gas-phase and surface reactions, ammonium fluorosilicate (AFS) has been reported to form on the SiNx surface. However, the underlying mechanism for AFS formation and its role in SiNx etching is still unclear, particularly during etching under energetic ion bombardment. In this work, using in situ attenuated total reflection Fourier-transform infrared spectroscopy, we show that during SiNx etching with a CH2F2/Ar plasma, when the substrate was at room temperature at a bias voltage of −240 V, an etch stop occurred with the simultaneous accumulation of graphitic hydrofluorocarbon and AFS on the SiNx surface. Under nominally similar conditions in a CH2F2/Ar plasma, but with the substrate at 70 or 120 °C, no etch stop was observed along with the absence of hydrofluorocarbon and AFS. By eliminating the formation of a graphitic hydrofluorocarbon layer in a SF6/H2 plasma, also at a bias voltage of −240 V, we reveal that AFS accumulation does not necessarily lead to an etch stop, and a steady-state thickness of AFS appears on surface as a result of a balance between AFS formation due to SiNx etching and AFS decomposition due to the impingement of energetic ions and H radicals. The effect of the substrate bias voltage on the etch behavior and surface composition was also studied in CH2F2/Ar and SF6/H2 plasmas. Our results show that the AFS is likely mixed with the underlying SiNx film under energetic ion bombardment instead of being present as a well-defined uniform layer. As a result, the presence of AFS does not necessarily lead to an etch stop. AFS formed on the SiNx surface decomposed when exposed to H radicals generated in H2 plasma under self-bias. Therefore, we conclude that the H radicals can play a dual role where they facilitate AFS formation by scavenging F radicals to form HF, but can also directly remove AFS formed on the surface. Finally, the slow removal of AFS by increasing the temperature to 70 °C suggests that AFS accumulation can be controlled with the substrate temperature.

Molecular layer deposition (MLD) is of interest as a technique for growing ultrathin polymeric films for various applications. However, the basic surface adsorption and reaction process are still not well understood, leading to challenges in achieving high growth rates and good reproducibility. This study uses in situ Fourier-transform infrared spectroscopy in combination with in situ ellipsometry to better understand the initial stages of MLD of polyurea. 1,4 diisocyanatobutane (DICB) and diethylene triamine (DETA) were used as MLD precursors, and polyurea was grown through the reaction between an isocyanate group supplied by DICB and an amine group supplied by DETA. The growth per cycle was fit from ellipsometry measurements to be 0.022 nm/cycle. Film growth was also confirmed by infrared spectroscopy, which showed isocyanate groups being alternately added and consumed during the DICB and DETA half-cycles. Amide I/II modes increased in absorbance with every half-cycle as polyurea linkages were formed between incoming molecules and the growing film. We show that although some surface reactive sites are terminated during film deposition, new sites are introduced by precursor physisorption. Furthermore, we show that different precursors have different rates of double reaction and physisorption, highlighting the complex interactions between the molecular precursors and the growing film. DICB has a high rate of double reactions and a low rate of physisorption, as evidenced by the loss of isocyanate sites throughout initial stages of growth. To maintain linear film growth, DETA physisorbs into the film, thereby adding new amine sites for incoming molecules to react with. These results provide useful insight into mechanisms that control the MLD of thin films.

Advanced electronic devices are integrated in the vertical direction, and critical challenges in etching deep structures with high aspect ratios must be addressed to advance the technology roadmap. Among the enabling applications, vertical etching of SiO 2 and SiN for flash memory devices features prominently. Recently, HF is used in high aspect ratio plasma etching of SiO 2 , SiN and multilayer stacks of these films at wafer temperatures below room temperature. The etching mechanisms for these so called cryo etch processes are very different from traditional dielectric etching. Instead of reactive fluorocarbon polymers which react with SiO 2 and SiN under ion bombardment, the process forms ammonium fluorosilicate (NH 4 ) 2 SiF 6 or AFS as an intermediate reaction product. In this paper, we will present experimental results on plasma and vapor etching of SiO 2 and SiN. The underlaying etching mechanisms will be explained using molecular dynamics and density functional theory. The new cryo etching process is fast evolving to meet profile requirements for future nodes and achieves higher etch rates. This is enabled by chemistry and RF technology innovation.

Two-dimensional scaling of integrated circuits has been the backbone of Moore’s Law until recently. As feature sizes reach physical limits, new approaches are needed. Monolithic scaling in the third dimension is one of the solutions. NAND flash memory started to grow in the vertical direction in 2014 with just 24 layers of memory cells with 128Gbit storage. The fact that the industry is targeting 1000 layers only 10 years later is testament to the stunning success of vertical integration. Logic and dynamic random-access memories (DRAM) are also conquering the third dimension. The structures of these devices are very complicated and novel lateral integration involving conformal deposition and isotropic etching are key enablers. In this talk we will discuss examples of combined use of ALD and ALE to realize thin smooth and crystalline films, selective deposition and lateral stacked films. The etching can be performed using radical etch, thermal etch and thermal ALE depending on the process requirements.

Advanced electronic devices are integrated in the vertical direction, and critical challenges in etching deep structures with high aspect ratios must be addressed to advance the technology roadmap. Among the enabling applications, vertical etching of SiO 2 and SiN for flash memory devices features prominently. Recently, HF is used in high aspect ratio plasma etching of SiO 2 , SiN and multilayer stacks of these films at wafer temperatures below room temperature. The etching mechanisms for these so called cryo etch processes are very different from traditional dielectric etching. Instead of reactive fluorocarbon polymers which react with SiO 2 and SiN under ion bombardment, the process forms ammonium fluorosilicate (NH 4 ) 2 SiF 6 or AFS as an intermediate reaction product. In this paper, we will present experimental results on plasma and vapor etching of SiO 2 and SiN. Included in this study are experimental processing regimes characterized by varied ion flux and energy levels with varying degrees of RF power. The underlaying etching mechanisms will be explained using molecular dynamics and density functional theory. The new cryo etching process is fast evolving to meet profile requirements for future nodes and achieves higher etch rates. This is enabled by chemistry and RF technology innovation.

Two-dimensional scaling of integrated circuits was the backbone of Moore’s law for 50 years. Today, however, as feature sizes reach physical limits, new approaches are needed. Monolithic scaling in the third dimension is one of the solutions. NAND flash memory started to grow in the vertical direction in 2014 with just 24 layers of memory cells with 128 Gbit of storage. The fact that the industry is targeting 1000 layers only 10 years later is testament to the stunning success of vertical integration. One thousand layers will enable petabyte solid state drives by 2030. Cryogenic reactive ion etch (RIE) of high aspect ratio holes in silicon-based dielectrics is one of its enabling technologies. Logic and dynamic random access memory (DRAM) are also conquering the third dimension. The structures of these devices are very complicated and demand novel selective etching processes which can remove material in the lateral direction.

Plasma etching is an essential semiconductor manufacturing technology required to enable the current microelectronics industry. Along with lithographic patterning, thin-film formation methods, and others, plasma etching has dynamically evolved to meet the exponentially growing demands of the microelectronics industry that enables modern society. At this time, plasma etching faces a period of unprecedented changes owing to numerous factors, including aggressive transition to three-dimensional (3D) device architectures, process precision approaching atomic-scale critical dimensions, introduction of new materials, fundamental silicon device limits, and parallel evolution of post-CMOS approaches. The vast growth of the microelectronics industry has emphasized its role in addressing major societal challenges, including questions on the sustainability of the associated energy use, semiconductor manufacturing related emissions of greenhouse gases, and others. The goal of this article is to help both define the challenges for plasma etching and point out effective plasma etching technology options that may play essential roles in defining microelectronics manufacturing in the future. The challenges are accompanied by significant new opportunities, including integrating experiments with various computational approaches such as machine learning/artificial intelligence and progress in computational approaches, including the realization of digital twins of physical etch chambers through hybrid/coupled models. These prospects can enable innovative solutions to problems that were not available during the past 50 years of plasma etch development in the microelectronics industry. To elaborate on these perspectives, the present article brings together the views of various experts on the different topics that will shape plasma etching for microelectronics manufacturing of the future.

Silicon oxide, SiO2, and silicon nitride, SiN, are widely used in memory and logic devices because of their dielectric properties, compatibility with silicon-based devices and etching selectivity. Advanced electronic devices are integrated increasingly in vertical direction, and critical etching challenges must be addressed to advance the technology roadmap. Among the enabling applications are vertical etching of SiO2 and SiN with high aspect ratio as well as lateral or isotropic etching of these films with high selectivity. Hydrofluoric acid gas has been used for over 30 years for isotropic etch of SiO2 (1, 2). The process has many similarities with wet etching using HF and requires the presence of water at the surface. Gas-phase etching of silicon nitride films has been demonstrated using moist HF vapor followed by heating of the wafer to remove ammonium fluorosilicate (NH4)2SiF6 or AFS as an intermediate reaction product (3). Recently, HF is used in high aspect ratio plasma etching of SiO2, SiN and multilayer stacks of these films at wafer temperatures below room temperatures (4). The elementary reactions bare resemblance with the vapor etch analogues. In this paper, we will present experimental results on plasma and vapor etching of SiO2 and SiN. The underlaying etching mechanisms will be explained using molecular dynamics and density functional theory. References: Miki, H. Kikuyama, I. Kawanabe, M. Miyashita, T. Ohmi, IEEE Transactions on Electron Devices 37, 107 (1990). R. Helms, B. E. Deal, J. Vac. Sci. Technol. A 10, 806 (1992). Vereecke, M. Schaekers, K. Verstraete, S. Arnauts, M. M. Heyns, W. Plante, J. Electrochem. Soc. 147, 1499 (2000). Kihara, M. Tomura, W. Sakamoto, M. Honda, M. Kojima, 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) , Kyoto, Japan, 2023, pp. 1-2

Etching of high aspect ratio features into alternating SiO2 and SiN layers is an enabling technology for the manufacturing of 3D NAND flash memories. In this paper, we study a low-temperature or cryo plasma etch process, which utilizes HF gas together with other gas additives. Compared with a low-temperature process that uses separate fluorine and hydrogen gases, the etching rate of the SiO2/SiN stack doubles. Both materials etch faster with this so-called second generation cryo etch process. Pure HF plasma enhances the SiN etching rate, while SiO2 requires an additional fluorine source such as PF3 to etch meaningfully. The insertion of H2O plasma steps into the second generation cryo etch process boosts the SiN etching rate by a factor of 2.4, while SiO2 etches only 1.3 times faster. We observe a rate enhancing effect of H2O coadsorption in thermal etching experiments of SiN with HF. Ammonium fluorosilicate (AFS) plays a salient role in etching of SiN with HF with and without plasma. AFS appears weakened in the presence of H2O. Density functional theory calculations confirm the reduction of the bonding energy when NH4F in AFS is replaced by H2O.

Atomic layer etching (ALE) is becoming an important technology for patterning and shaping of electronic and photonic devices. This tutorial briefly recaps the fundamentals of thermal, directional and plasma assisted atomic layer etching. Performance benefits and limitations for ALE in comparison to the continuous processing analogues such as reactive ion etching, radical and vapor etching are the consequence of the cyclic self-limited structure of ALE processes. Selection criteria for the appropriate etching technology for a given task will be presented. The enormous progress in the development of new ALE process and chemistries will be illustrated using published and potential practical applications in the manufacturing of electronic and photonics devices. They include multi-patterning, advanced planar and 3D logic and memory devices, 2D materials, emerging memories comprised of hard to etch materials, power and optical devices and combinations of ALE and atomic layer deposition.

Thermal atomic layer etching is rapidly becoming an important complementary processing technology in the manufacturing of 5 and 3 nm devices in the semiconductor industry. Critically, architectures such as 3D NAND and 3D DRAM require conformal isotropic etching to remove material such as HfO2 in hard-to-reach locations with aspect ratios that can be greater than 50:1. To achieve repeatable device performance throughout a 3D stack, the removal rate (etch per cycle) of the etched material during an etch process needs to be controlled such that the overall etch amount is the same from top to bottom of the device stack. In this work, the reaction kinetics of reactants and byproducts during a cyclical ligand exchange-based atomic layer etching (ALE) process have been modelled. This ALE process consists of two steps: a fluorination step followed by a fluorine-to-chlorine ligand exchange-based removal step. Modeling was performed for each of those steps separately. Experimental data revealed that the fluorine dosing during the fluorination step was predominantly responsible for controlling the etch rate of the ALE process but had only a minimal impact on the etch profile inside high aspect ratio holes. The ligand exchange dosing, on the other hand, predominantly controlled the etch profile (depth loading) with equal etch rates from top-to-bottom, obtained when the step was operated close to saturation. The model predicts that the chemical reaction rate of dimethylaluminum chloride (DMAC) on a fluorinated surface during the ligand exchange step is 9.1 s−1, about 46 times greater than the reaction rate of hydrogen fluoride (HF) on the hafnium oxide surface during the fluorination step (only 0.2 s−1). Furthermore, modeling results revealed that the sticking coefficient for DMAC on a hafnium fluoride surface far exceeded that of HF on a hafnium oxide surface in the conditions modelled (0.94 s−1 for DMAC vs 0.0058 s−1 for HF). With these modeling results, the different roles fluorination and ligand exchange steps have regarding the control of etch rate per cycle and profile inside high aspect ratio holes can be explained.

Atomic layer etching (ALE) has emerged as a promising technique for the precise and controlled removal of materials in nanoscale devices. ALE processes have gained significant attention due to their ability to achieve high material selectivity, etch uniformity, and atomic-scale resolution. This article provides a perspective of the important role of plasma in ALE including thermal ALE for nanometer-scale device manufacturing. Advantages as well as challenges of ALE are discussed in contrast to classic reactive ion etching. A tally-up of known plasma-based ALE processes is listed, and novel thermal ALE processes are described that are based on the so-called ligand addition mechanism. We explain the potential of using plasma for increasing wafer throughput in a manufacturing environment, its use when it comes to anisotropy tuning, the benefits in enabling a wider range of pre-cursors in thermal ALE, and the advantages it may bring for thermal ALE of crystalline materials. The benefits and challenges of different plasma sources in ALE are discussed, and an outlook for future development is provided. Finally, applications of plasma for productivity reasons such as particle avoidance and process stability are outlined.

This paper studies the transport of neutral etch species in cylindrical holes, which are of interest for advanced memory devices. The etching of these devices utilizes ions and neutral reactive species, which must travel to the etch front deep inside the feature. For gas pressures in the millitorr and feature sizes in the nanometer range, neutrals reach the bottom of an etching feature via the Knudsen transport(1,2). For an aspect ratio of depth to diameter of 100:1, the flux at the bottom of the feature is only 1.3% of the incoming flux. This is a challenge for etching of advanced memory devices with ever increasing aspect ratios. We present computational results for the neutral transport in high aspect ratio features as a function of aspect ratio, profile shape, and surface processes such as adsorption, desorption, and diffusion of neutral species. Pertinent parameters are varied over a wide range to identify salient trends. When available, we include values for the case of fluorine radicals on silicon and silicon oxide in the parameter scans. The results predict that steady state transmission probability increases meaningfully in the presence of surface diffusion. Spontaneous and collision induced desorption of adsorbed neutrals on their own does not change steady state transmission probability, but they affect the time to reach it. In the presence of surface diffusion, however, spontaneous desorption increases the transmission probability, while desorption due to collisions with co-flowing nonreactive gas reduces it. These results indicate an enhancement of neutral transport at low surface temperatures that facilitate physisorption and surface diffusion.

High aspect ratio (HAR) silicon nitride and silicon oxide (ONON) channel hole patterning in 3D NAND flash presents great challenges. This report summarizes some of the recent progress in patterning from the perspective of HAR etching and deposition-etch co-optimization (DECO). HAR etching mechanisms will be discussed, with a focus on how to reduce the aspect ratio-dependent etching (ARDE) effect. Highlights of the new low-temperature etch process will be presented, with significant improvement in the ARDE being observed. New simulation results from a Monte Carlo feature-scale model provide insights into ion scattering and mask interactions on the control of the channel hole profile. DECO is a new frontier to enable better control of the channel hole shape at HAR. Film tier optimization and carbon liner insertion results show improvement in channel hole profile control.

Thermal atomic layer etching (ALE) of CoO, ZnO, Fe2O3, and NiO was achieved using chlorination and ligand-addition reactions at 250 degrees C. This two-step process was accomplished by first chlorinating the metal oxide with SO2Cl2. Subsequently, ligand addition to the metal chloride was performed using tetramethyle-thylenediamine (TMEDA). In situ quadrupole mass spectrometry (QMS) studies on metal oxide powders revealed that CoO, ZnO, Fe2O3, and NiO all formed stable and volatile MCl2(TMEDA) compounds (M = Co, Zn, Fe, Ni) as etch products at 250 degrees C. These QMS studies of the sequential SO2Cl2 and TMEDA exposures were facilitated by a new reactor design with two nested inlet lines that transport the reactants separately to the powder substrate. The time-dependence of the reactants and products could also be monitored by the QMS investigations. The large SO2+ ion intensity observed at the beginning of the SO2Cl2 exposure was consistent with the chlorination reaction MO + SO2Cl2 -> MCl2 + SO2 + (1/2)O2. The time-dependent QMS studies also observed the MClx(TMEDA)+ ion intensity peaking at the beginning of the TMEDA exposures. The subsequent decay of the MClx(TMEDA)+ ion intensity, while the (TMEDA)+ ion intensity remained constant, was evidence for a self-limiting ligand-addition reaction. The mass loss of the metal oxide powders was confirmed after sequential SO2Cl2 and TMEDA exposures. The etching of two of these metal oxides was also verified using separate experiments on flat substrates using SO2Cl2 and TMEDA exposures at 250 degrees C. For CoO thermal ALE, an etch rate of 4.1 angstrom/cycle at 250 degrees C was measured using X-ray reflectivity (XRR) studies. For ZnO thermal ALE, an etch rate of 0.12 angstrom/cycle at 250 degrees C was measured using quartz crystal microbalance (QCM) investigations. Other first row transition metal oxides were surveyed in addition to CoO, ZnO, Fe2O3, and NiO. QMS studies of TiO2, Cr2O3, and MnO2 showed no volatile species formation during sequential SO2Cl2 and TMEDA exposures at 250 degrees C. In contrast, V2O5 and CuO were spontaneously etched using SO2Cl2 at 250 degrees C, as determined by the observation of volatile VOCl3 and CuCl3 etch products, respectively. Calculated Gibbs free energy changes for the various etching reactions also supported the experimental observations for the first row transition metal oxides. These studies illustrate that the chlorination and ligand-addition reaction mechanism can provide a new avenue for the thermal ALE of a variety of transition metal oxides that have nonvolatile metal chlorides.